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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVTC16244 1.8/2.5/3.3V 16-Bit Buffer/Driver with 3-State Outputs Product Features PI74ALVTC family is designed for low voltage operation, VDD = 1.8V to 3.6V Supports Live Insertion 3.6V I/O Tolerant Inputs and Outputs Bus Hold High Drive, -32/64mA @ 3.3V Uses patented noise reduction circuitry Power-off high impedance inputs and outputs Industrial operation at 40C to +85C Packages available: 48-pin 240 mil wide plastic TSSOP (A) 48-pin 173 mil wide plastic TVSOP (K) 48-pin 300 mil wide plastic SSOP (V) Product Description Pericom Semiconductors PI74ALVTC series of logic circuits are produced in the Companys advanced 0.35 micron CMOS technology, achieving industry leading speed. The PI74ALVTC16244 buffer/driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs. To ensure the high-impedance state during power up or power down, OE should be tied to Vdd through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The family offers both I/O Tolerant, which allows it to operate in mixed 1.8/3.6V systems, and "Bus Hold," which retains the data input's last state whenever the data input goes to high-impedance, preventing "floating" inputs and eliminating the need for pullup/ down resistors. Logic Block Diagram 1OE 1 3OE 25 1A1 47 2 1Y1 3A1 36 13 3Y1 46 1A2 3 1Y2 3A2 35 14 3Y2 44 1A3 5 1Y3 3A3 33 16 3Y3 43 1A4 6 1Y4 3A4 32 17 3Y4 2OE 48 4OE 24 2A1 41 8 30 2Y1 4A1 19 4Y1 40 2A2 9 29 2Y2 4A2 20 4Y2 38 2A3 11 27 2Y3 4A3 22 4Y3 37 2A4 12 26 2Y4 4A4 23 4Y4 1 PS8159D 11/23/98 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVTC16244 16-Bit Buffer Driver With 3-State Outputs Product Pin Description Pin Name nOE nAx nYx GND VCC Description 3-State Output Enable Inputs (Active LOW) Inputs 3-State Outputs Ground Power Truth Table(1) Inputs nOE L L H Note: 1. H L X Z nAX H L X Outputs nYx H L Z = High Signal Level = Low Signal Level = Don't Care or Irrelevant = High Impedance Product Pin Configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 1OE 1Y1 1Y2 2OE 1A1 1A2 GND 1Y3 1Y4 GND 1A3 1A4 VCC 2Y1 2Y2 VCC 2A1 2A2 GND 2Y3 2Y4 3Y1 3Y2 GND 2A3 2A4 3A1 3A2 GND 3Y3 3Y4 48-PIN A48 K48 V48 36 35 34 33 32 31 30 29 28 27 26 25 GND 3A3 3A4 VCC 4Y1 4Y2 VCC 4A1 4A2 GND 4Y3 4Y4 4OE GND 4A3 4A4 3OE 2 PS8159D 11/23/98 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVTC16244 16-Bit Buffer Driver With 3-State Outputs Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Supply Voltage Range, VDD................................................. -0.5V to 4.6V Input Voltage Range, VI ....................................................... -0.5V to 4.6V Output Voltage Range, VO (3-Stated) .................................. -0.5V to 4.6V Output Voltage Range, VO(1) (Active) ........................ -0.5V to VDD +0.5V DC Input Diode Current (IIK) VI<0V .............................................. -50mA DC Output Diode Current (IOK) VO<0V ......................................................................................... -50mA VO>VDD ....................................................................................... +50mA DC Output Source/Sink Current (IOH/IOL) ............................... -64/128mA DC VDD or GND Current per Supply Pin (ICC or GND) ..............100mA Storage Temperature Range, Tstg ................................ -65C to150C Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended Operating Conditions2 M in. VDD VIH VIL VI VO Supply voltage High- level input voltage Low- level input voltage Input voltage O utput voltage Active State O ff State VDD = VDD = VDD = VDD = 3.0V to 3.6V 2.7V to 3.0V 2.3V to 2.7V 1.8V 0 - 40 O perating Data Retention O nly VDD = 2.7V to 3.6V VDD = 2.7V to 3.6V - 0.3 0 0 1.8 1.2 2.0 0.8 3.6 VDD 3.6 - 32/64 24 18 6 10 85 mA ns/V C V M ax. 3.6 3.6 Unit IO t/v TA O utput current in IOH/IOL Input transistion rise or fall rate(3) O perating free- air temperture Notes 1. Absolute maximum of IO must be observed. 2. Unused control inputs must be held HIGH or LOW to prevent them from floating. 3 As measured between 0.8V and 2.0V, VDD = 3.0V. 3 PS8159D 11/23/98 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVTC16244 16-Bit Buffer Driver With 3-State Outputs Electrical Characteristics over Recommended Operating Free-Air Temperature Range (unless otherwise noted) DC Characteristics (2.7V 3.0 3.6 Notes 1. Duration of test must not exceed 1 second with only 1 output tested at a time. 4 PS8159D 11/23/98 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVTC16244 16-Bit Buffer Driver With 3-State Outputs Electrical Characteristics over Recommended Operating Free-Air Temperature Range (unless otherwise noted) DC Characteristics (2.3V VDD 2.7V) De s s ription VIH VIL VOH Parame te rs HIGH Level Input Voltage LOW Level Input Voltage IOH = - 100A HIGH Level Output Voltage IOH = - 12mA IOH = - 18mA IOL = 100A VOL LOW Level Output Voltage IOL = 12mA IOL = 18mA IOL = 2mA II IOZ IOFF IODL IODH IHOLD(1) IDD DD Input Leakage Current 3- STATE Output Leakage Power- OFF Leakage Current Output Current Low Output Current High Bus Hold Current A or B Outputs Quiescent Supply Current Increase in IDD per input V1 = VDD or GND VO = 3.6V VI or VO 3.6V VIN = VIH or VIL, VO = 1.5V(2) VIN = VIH or VIL, VO = VI = 0.7V VI = 1.7V VI = VDD or GND VDD (VI,VO) 3.6V VIH = VDD - 0.6V, Inputs at VDD or Gnd 2.3 - 2.7 1.5V(2) 2.7 2.3 0 2.7 110 - 30 90 - 90 40 40 400 A 2.3 2.3 - 2.7 Conditions VDD M in. 1.6 0.7 VDD - 0.2 1.8 1.7 0.2 0.4 0.5 0.55 5.0 10 10 264 - 60 mA A V Typ. M ax. Units 2.3 2.3 - 2.7 2.5 Notes 1. Not Guaranteed 2. Duration of test must not exceed 1 second with only 1 output tested at a time. 5 PS8159D 11/23/98 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVTC16244 16-Bit Buffer Driver With 3-State Outputs Electrical Characteristics over Recommended Operating Free-Air Temperature Range (unless otherwise noted) DC Characteristics (1.8V VDD 2.3V) D e s cription VIH VIL VOH Parame te rs HIGH Level Input Voltage LO W Level Input Voltage HIGH Level O utput Voltage IOH = - 100A IOH = - 6mA IOL = 10 A IOL = 6mA V1 = VDD or GND VO = 3.6V VI = VO 3.6V VIN = VIH or VIL, VO = 0.9V(2) VIN = VIH or VIL, VO = 0.9V(2) VI = 0.4 VI = 1.3 VI = VDD or GND VDD (VI,VO) 3.6V VI = VDD - 06V, O ther inputs at VDD or Gnd 1.8 2.3 1.8 0 1.8 50 - 14 50 - 50 20 20 400 A 1.8 Conditions VDD 1.8 - 2.3 M in. 0.7 x VDD 0.2 x VDD VDD - 0.2 1.4 0.2 0.3 5.0 10 10 137 - 34 mA A V Typ. M ax. Units VOL II IOZ IOFF IODL IODH IHOLD(1) LO W Level O utput Voltage Input Leakage Current 3- STATE O utput Leakage Power- O FF Leakage Current O utput Current Low O utput Current High Bus Hold Current A or B O utputs Q uiescent Supply Current Increase in IDD per input IDD DD Note: 1. Not guaranteed 2. Duration of test must not exceed 1 second with only 1 output tested at a time. 6 PS8159D 11/23/98 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVTC16244 16-Bit Buffer Driver With 3-State Outputs AC Electrical Characteristics TA = -40C to +85C, CL = 50pF, RL = 500 Symbol Parame te r VDD = 3.3V 0.3V M in. tPHL, tPLH tPZL, tPZH tPLZ, tPHZ tOSHL tOSLH Prop Delay O utput Enable Time O utput Disable Time O utput to O utput Skew (Note 1) 0.8 0.5 1.5 M ax. 2.4 2.9 3.6 0.5 VDD = 2.5V 0.2V M in. 1.0 1.5 1.0 M ax. 2.8 3.4 3.8 0.5 VDD = 1.8V M in. 1.5 2.0 1.5 M ax. 3.5 4.0 4.5 0.5 ns Units Note 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH or LOW (tOSHL) or LOW to HIGH (tOSLH). Capacitance Symbol CIN COUT CPD Parame te r Input Capacitance Conditions VDD = 1.8, 2.5V or 3.3V, VI = 0V or VDD TA = +25C Typical 6 7 20 pF Units Output Capacitance VI = 0V or VDD, VDD = 1.8V, 2.5V or 3.3V Power Dissipation Capacitance VI = 0V or VDD, F = 10 MHz VDD = 1.8V, 2.5V or 3.3V 7 PS8159D 11/23/98 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVTC16244 16-Bit Buffer Driver With 3-State Outputs Test Circuits and Switching Waveforms Parameter Measurement Information (VDD = 1.8V - 3.6V) 2 x VDD R1 500 Open 50pF CL (See Note A) Switch Position Te s t S1 Open 2 x VDD GND tpd tPLZ/tPZL tPHZ/tPZH Pulse Width From Output Under Test RL 500 GND VDD Low-High-Low Pulse tW VDD VDD/2 0V Setup, Hold, and Release Timing Data Input tSU Timing Input tH VDD VDD/2 0V VDD VDD/2 0V High-Low-High Pulse VDD/2 0V Propagaton Delay VDD VDD/2 Input tPLH Output tPHL tPLH VDD Opposite Phase Input Transition VDD/2 0V tPHL 0V VDD VDD/2 VOL Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50, tr 2ns, tf 2ns, measured from 10% to 90%, unless otherwise specified. D. The outputs are measured one at a time with one transition per measurement. Enable Disable Timing VDD Output Control (Active LOW) VDD/2 tPZL VDD VDD/2 +0.15V tPZH VDD/2 0V tPHZ -0.15V VOH VOL tPLZ 0V VDD Output Waveform 1 S1 at 2xVDD (see Note B) Output Waveform 2 S1 at GND (see Note B) Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com 8 PS8159D 11/23/98 |
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