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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16841T/162841T 20-BIT TRANSPARENT LATCH
PI74FCT16841T PI74FCT162841T
Fast CMOS 20-Bit Transparent Latch
Product Features:
Common Features: * PI74FCT16841T and PI74FCT162841T are high-speed, low power devices with high current drive * VCC = 5V 10% * Hysteresis on all inputs * Packages available: - 56-pin 240 mil wide plastic TSSOP (A) - 56-pin 300 mil wide plastic SSOP (V) PI74FCT16841T Features: * High output drive: IOH = -32 mA; IOL = 64 mA * Power off disable outputs permit "live insertion" * Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25C PI74FCT162841T Features: * Balanced output drivers: 24 mA * Reduced system switching noise * Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25C
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Product Description:
Pericom Semiconductor's PI74FCT series of logic circuits are produced in the Company's advanced 0.8 micron CMOS technology, achieving industry leading speed grades. The PI74FCT16841T and PI74FCT162841T are 20-bit wide transparent latches designed to provide temporary storage of data and can be used as I/O ports, memory address latches, and bus drivers. The Output Enable and Latch Enable controls allow the devices to be operated as two 10-bit latches or one 20-bit latch. Signal pins are arranged in a flow-through organization for ease of layout and hysteresis is designed into all inputs to improve noise margin. The output buffers on the PI74FCT16841T and PI74FCT162841T are especially designed for driving high-capacitance loads and low impedance backplanes and include a Power-Off Disable function allowing "live insertion" of boards when the devices are used as backplane drivers. The PI74FCT162841T has 24 mA balanced output drivers. It is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. This eliminates the need for external terminating resistors for most interface applications.
3 4 5 6 7 8 9
Logic Block Diagram
1OE 1LE 1D1
2OE 2LE
10
D C
D C
2D1
11
2Q1
1Q1
12 13
To 9 other channels
To 9 other channels
14 15
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PS2078A 01/15/95
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16841T/162841T 20-BIT TRANSPARENT LATCH
Product Configuration
1OE 1Q1 1Q2
Product Pin Description
56 55 54 53 52 51 50 49 48 47
1LE 1D1 1D2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
GND
1Q3 1Q4
GND
1D3 1D4
Pin Name xDx xLE xOE xQx
Description Data Inputs Latch Enable Input (Active LOW) Output Enable Input (Active LOW) 3-State Outputs
VCC
1Q5 1Q6 1Q7
VCC
1D5 1D6 1D7
GND
1Q8 1Q9 1Q10 2Q1 2Q2 2Q3
GND
2Q4 2Q5 2Q6
46 45 44 56-PIN V56 43 A56 42 41 40 39 38 37 36 35 34 33 32 31 30 29
GND
1D8 1D9 1D10 2D1 2D2 2D3
Truth Table(1)
Inputs Outputs
xDx H L X X 1.
xLE H H L X
xOE L L L H
xQx H L Q(2) Z
GND
2D4 2D5 2D6
VCC
2Q7 2Q8
VCC
2D7 2D8
2.
GND
2Q9 2Q10 2OE
GND
2D9 2D10 2LE
H = High Voltage Level L = Low Voltage Level X = Don't Care Z = High Impedance Output level before xLE HIGH-to-LOW Transition.
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PS2078A 01/15/95
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16841T/162841T 20-BIT TRANSPARENT LATCH
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................................................... -65C to +150C Ambient Temperature with Power Applied .................................... -40C to +85C Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. -0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ........... -0.5V to +7.0V DC Input Voltage ............................................................................ -0.5V to +7.0V DC Output Current ..................................................................................... 120 mA Power Dissipation ..........................................................................................1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
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0.55 100 V A
DC Electrical Characteristics (Over the Operating Range, TA = -40C to +85C, VCC = 5.0V 10%)
Parameters Description VIH VIL IIH IIL IOZH IOZL VIK IOS IO VH Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current High Impedance Output Current Clamp Diode Voltage Short Circuit Current Output Drive Current Input Hysteresis Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max. VCC = Max. VCC = Min., IIN = -18 mA VCC = Max.(3), VOUT = GND VCC = Max.(3), VOUT = 2.5V Min. 2.0 VIN = VCC VIN = GND VOUT = 2.7V VOUT = 0.5V -80 -50 -0.7 -140 100 0.8 1 -1 1 -1 -1.2 -200 -180 Typ(2) Max. Units V V A A A A V mA mA m V
PI74FCT16841T Output Drive Characteristics (Over the Operating Range)
Parameters Description VOH Output HIGH Voltage Test Conditions(1) VCC = Min., VIN = VIH or VIL IOH = -3.0 mA IOH = -15.0 mA IOH = -32.0 mA IOL = 64 mA Min. 2.5 2.4 2.0 -- Typ(2) 3.5 3.5 3.0 0.2 -- Max. Units V
VOL IOFF
Output LOW Voltage Power Down Disable
VCC = Min., VIN = VIH or VIL VCC = 0V, VIN or VOUT 4.5V
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PI74FCT162841T Output Drive Characteristics (Over the Operating Range)
Parameters Description VOH VOL IODL IODH Output HIGH Voltage Output LOW Voltage Output LOW Current Output HIGH Current Test Conditions(1) VCC = Min., VIN = VIH or VIL IOH = -24.0 mA VCC = Min., VIN = VIH or VIL IOL = 24 mA VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) Min. 2.4 60 -60 Typ(2) 3.3 0.3 115 -115 Max. 0.55 150 -150 Units V V mA mA
Capacitance (TA = 25C, f = 1 MHz)
Parameters(4) CIN COUT Description Input Capacitance Output Capacitance Test Conditions VIN = 0V VOUT = 0V Typ 4.5 5.5 Max. 6 8 Units pF pF
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Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested.
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PS2078A 01/15/95
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16841T/162841T 20-BIT TRANSPARENT LATCH
Power Supply Characteristics
Parameters Description ICC ICC ICCD Quiescent Power Supply Current Supply Current per Input @ TTL HIGH Supply Current per Input per MHz(4) VCC = Max. VCC = Max. VCC = Max., Outputs Open OE = GND; LE = Vcc One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fCP = 10 MHZ 50% Duty Cycle OE = GND; LE = Vcc fI = 5 MHZ One Bit Toggling VCC = Max., Outputs Open fCP = 10 MHZ 50% Duty Cycle OE = GND; LE = Vcc Eight Bits Toggling fI = 2.5 MHZ 50% Duty Cycle Test Conditions(1) VIN = GND or VCC VIN = 3.4V(3) VIN = VCC VIN = GND Min. Typ(2) 0.1 0.5 0.15 Max. 500 2.5 0.25 Units A mA mA/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND
1.7
4.0(5)
mA
2.0
5.0(5)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND
3.2
6.5(5)
5.2
14.5(5)
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + FINI) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz.
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PS2078A 01/15/95
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16841T/162841T 20-BIT TRANSPARENT LATCH
PI74FCT16841 Switching Characteristics over Operating Range
16841AT Com.
(1)
1
16841CT Com. Min Max Min 16841DT Com. Max Min 16841ET Com. Max Unit
16841BT Com. Min Max
2
ns ns ns ns ns ns ns ns ns ns ns ns
Parameters tPLH tPHL
Description Propagation Delay XDX to XQX (LE = HIGH) Propagation Delay XLE to XQX
Conditions
Min
Max
tPLH tPHL
tPZH tPZL
Output Enable Time XOE to XQX
tPHZ tPLZ
Output Disable Time(3) XOE to XQX
tSU tH tW tSK(O)
Setup Time HIGH or LOW, XDX to XLE Hold Time HIGH or LOW, XDX to XLE xLE Pulse Width HIGH(3) Output Skew(4)
CL = 50 pF RL = 500 CL = 300 pF(3) RL = 500 CL = 50 pF RL = 500 CL = 300 pF(3) RL = 500 CL = 50 pF RL = 500 CL = 300 pF(4) RL = 500 CL = 5 pF(3) RL = 500 CL = 50 pF RL = 500 CL = 50 pF RL = 500
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 2.5 2.5 4.0 --
9.0 13.0 12.0 16.0 11.5 23.0 7.0 8.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 2.5 2.5 4.0 --
6.5 13.0 8.0 15.5 8.0 14.0 6.0 7.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 2.5 2.5 4.0 --
5.5 13.0 6.4 15.0 6.5 12.0 5.7 6.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.0 1.0 4.0 --
4.2 13.0 4.0 8.0 4.8 9.0 4.0 5.4 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.0 1.0 3.0 --
3.4 7.5 3.7 7.5 4.4 9.0 4.0 4.0 -- -- -- 0.5
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Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
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PS2078A 01/15/95
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16841T/162841T 20-BIT TRANSPARENT LATCH
PI74FCT16841 Switching Characteristics over Operating Range
162841AT Com.
(1)
162841BT Com. Min Max
162841CT Com. Min Max
162841DT Com. Min Max
162841ET Com. Min Max Unit
Parameters tPLH tPHL
Description Propagation Delay XDX to XQX (LE = HIGH) Propagation Delay XLE to XQX
Conditions
Min
Max
tPLH tPHL
tPZH tPZL
Output Enable Time XOE to XQX
tPHZ tPLZ
Output Disable Time(3) XOE to XQX
tSU tH tW tSK(O)
Setup Time HIGH or LOW, XDX to XLE Hold Time HIGH or LOW, XDX to XLE xLE Pulse Width HIGH(3) Output Skew(4)
CL = 50 pF RL = 500 CL = 300 pF(3) RL = 500 CL = 50 pF RL = 500 CL = 300 pF(3) RL = 500 CL = 50 pF RL = 500 CL = 300 pF(4) RL = 500 CL = 5 pF(3) RL = 500 CL = 50 pF RL = 500 CL = 50 pF RL = 500
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 2.5 2.5 4.0 --
9.0 13.0 12.0 16.0 11.5 23.0 7.0 8.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 2.5 2.5 4.0 --
6.5 13.0 8.0 15.5 8.0 14.0 6.0 7.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 2.5 2.5 4.0 --
5.5 13.0 6.4 15.0 6.5 12.0 5.7 6.0 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.0 1.0 4.0 --
4.2 13.0 4.0 8.0 4.8 9.0 4.0 5.4 -- -- -- 0.5
1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.0 1.0 3.0 --
3.4 7.5 3.7 7.5 4.4 9.0 4.0 4.0 -- -- -- 0.5
ns ns ns ns ns ns ns ns ns ns ns ns
Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
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PS2078A 01/15/95

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