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SM6451B Audio Variable Volume IC OVERVIEW The SM6451B is a 3-wire serial-controlled electronic variable volume IC for audio applications. It provides electronic volume control for a stereo system (left and right channels), and independent channel attenuation and muting, with greatly enhanced digital zip noise suppression. The chip address function allows up to four SM6451B devices to be connected and individually controlled over the 3-wire control interface from a single CPU. It is available in 16-pin TSSOP packages. FEATURES I I PINOUT (Top view) I I I I I I I Stereo inputs and outputs Attenuation function * 2-channel independent control * 1.0dB/step over 80 steps * 0 to -80dB range Mute function 3-wire serial data control (MDT, MCK, MLEN) Chip addressing (up to 4 devices can be connected in parallel) Low noise * 0.003% THD + noise * 12Vrms residual noise 2.5 to 3.6V single power supply Silicon-gate CMOS process Package: 16-pin TSSOP (Pb free) RSTN ADRS1 ADRS2 DVDD LOUT LIN AVDD VRL 1 16 MDT MCK MLEN DVSS ROUT RIN AVSS 8 9 VRR APPLICATIONS I PACKAGE DIMENSIONS (Unit: mm) Weight: 0.07g Audio equipment ORDERING INFORMATION Device SM6451BT Package 16-pin TSSOP 4.40 0.1 6.40 0.2 0.44TYP 1.00TYP 0 to 8 0.225TYP 0.65 0.08 + 0.08 0.22 - 0.07 0.50 0.10 5.20MAX 5.00 0.08 0.17 0.05 + 0.03 0.07 - 0.04 0.13 M NIPPON PRECISION CIRCUITS INC.--1 + 0.03 1.07 - 0.07 1.00 0.05 SM6451B BLOCK DIAGRAM DVDD DVSS Attenuation Control 1/2VDD LIN LOUT MLEN MCK MDT RSTN Chip Address Decoder ADRS1 ADRS2 VRL Reference Voltage Circuits Attenuation Decoder Attenuation Control Interface Control VRR 1/2VDD RIN ROUT AVDD AVSS PIN DESCRIPTION Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1. Name RSTN ADRS1 ADRS2 DVDD LOUT LIN AVDD VRL VRR AVSS RIN ROUT DVSS MLEN MCK MDT I/O1 Ip Ip Ip - O I - O O - I O - Ip Ip Ip A/D1 D D D D A A A A A A A A D D D D Description System reset input (LOW-level reset) Chip address set 1 Chip address set 2 Digital supply Left-channel audio output Left-channel audio input Analog supply Left-channel reference voltage (0.5VDD). Connect a 10 F capacitor between VRL and AVSS. Right-channel reference voltage (0.5VDD). Connect a 10 F capacitor between VRR and AVSS. Analog ground Right-channel audio input Right-channel audio output Digital ground Microcontroller latch enable input Microcontroller clock input Microcontroller data input Ip = input pin with pull-up, A = analog, D= digital NIPPON PRECISION CIRCUITS INC.--2 SM6451B SPECIFICATIONS Absolute Maximum Ratings DVSS = AVSS = 0 V, DVDD = AVDD = VDD Parameter Supply voltage Input voltage Power dissipation Storage temperature Note. Rating applies at power-ON and power-OFF. Symbol VDD VIN PD Tstg Rating -0.3 to 7.0 VSS - 0.3 to VDD + 0.3 150 -55 to 125 Unit V V mW C Recommended Operating Conditions DVSS = AVSS = 0 V, DVDD = AVDD = VDD Parameter Supply voltage Supply voltage deviation Operating temperature Symbol VDD DVDD - AVDD, DVSS - AVSS Topr Rating 2.5 to 3.6 0.1 -40 to 85 Unit V V C DC Characteristics DVDD = AVDD = VDD = 2.5 to 3.6 V, VSS = 0 V, Ta = -40 to 85 C Rating Parameter Symbol Condition min IDDD1 IDDD2 AVDD Current consumption HIGH-level input voltage1 LOW-level input voltage1 Input current1 Input leakage current1 1. IDDA VIH VIL IIL IIH VIN = 0 V VIN = VDD Data transfer stopped, MDT, MCK, MLEN, RSTN, ADRS1, ADRS2 = VDD ADRS1 = ADRS2 = 0V, 0.8 Vrms analog input, ATT = 0 dB, data transfer active - - - 0.7VDD - - - typ 0.2 0.4 1.9 - - 70 - max 1.0 1.0 5.5 - 0.3VDD 150 1.0 A mA mA V V A A Unit DVDD Current consumption MDT, MCK, MLEN, RSTN, ADRS1, ADRS2 NIPPON PRECISION CIRCUITS INC.--3 SM6451B AC Digital Characteristics DVDD = AVDD = VDD = 2.5 to 3.6 V, VSS = 0 V, Ta = -40 to 85 C Serial inputs (MDT, MCK, MLEN) Rating Parameter MCK, MLEN rise time MCK, MLEN fall time MCK pulse cycle MDT setup time MDT hold time MLEN setup time MLEN hold time MLEN LOW-level pulsewidth MLEN HIGH-level pulsewidth Symbol min tr tf tMCK tMDS tMDH tMCS tMCH tMEWL tMEWH - - 100 50 50 50 50 16 50 typ - - - - - - - - - max 100 100 10000 - - - - - 5000 ns ns ns ns ns ns ns tMCK ns Unit MDT tMDS MCK tMCS MLEN tMEWL tf MCK MLEN 0.9VDD 0.1VDD 0.5VDD tMDH 0.5VDD tMCH 0.5VDD tMEWH tr 0.9VDD 0.1VDD 0.5VDD Reset input (RSTN) Rating Parameter RSTN LOW-level pulsewidth Symbol min tRSTN 100 typ - max - ns Unit NIPPON PRECISION CIRCUITS INC.--4 SM6451B AC Analog Characteristics VDD = 3.0 V, 0.8 Vrms amplitude, 1 kHz input frequency, 100 k output load resistance, Ta = 25 C, AC-coupled inputs Analog inputs (LIN, RIN) Rating Parameter Reference input amplitude Input resistance Input clipping voltage Symbol VAI RIN VCLP THD + N = 1%, ATT = 0 dB Condition min - 40 - typ 0.8 50 1.1 max - 60 - Vrms k Vrms Unit Analog outputs (LOUT, ROUT) Rating Parameter Residual noise voltage Signal-to-noise ratio Total harmonic distortion + noise Gain control range Step size Attenuation error (1k to 20kHz) Symbol VNS SNR THD + N RCNT Step ERR1 ERR2 AT0 AT2 Absolute attenuation (1 kHz) AT4 AT6 AT8 Mute attenuation (1 kHz) Channel crosstalk Frequency response Quiescent output zip noise voltage (while ATT value adjusting) Minimum driver load resistance Mute CT FR NJ RML 0 to -60 dB -61 to -80 dB ATT = 0 dB ATT = -20 dB ATT = -40 dB ATT = -60 dB ATT = -80 dB ATT = Mute ATT = 0 dB ATT = 0 dB, f = 200 kHz 0 Vrms input ATT = 0 dB, THD + N = 1% Condition min Input signal: 0 Vrms, A-weight filter, 0 dBr = 0.8 Vrms, ATT = 0 dB ATT = 0 dB, 20 kHz lowpass filter - 92 - - 80 0.8 -2 -6 - - - - - - 85.0 - 103 - 10 - - typ 12 96 0.0025 - 1.0 - - - 0.0 - 20.0 - 40.0 - 60.4 - 84.2 - 88.0 - 105 -8 - 8 max 20 - 0.005 0 1.8 1 0 - - - - - - - - 3 12 Vrms dBr % dB dB dB dB dB dB dB dB dB dB dB dB mV k Unit Reference voltage (VRL, VRR) Rating Parameter Reference voltage output Symbol VREF Condition min 0.45VDD typ 0.5VDD max 0.55VDD V Unit NIPPON PRECISION CIRCUITS INC.--5 SM6451B MEASUREMENT CIRCUIT Chip address: ADRS1 = LOW, ADRS2 = LOW 0.001F 1 RSTN 2 ADRS1 3 ADRS2 4 DVDD MDT 16 MCK 15 MLEN 14 DVSS 13 ROUT 12 RIN 11 AVSS 10 VRR 9 0.022F + 10F + 1F + 1F 100k CPU SM6451 + 10F 0.022F 5 LOUT 6 LIN 7 AVDD + 10F 8 VRL 0.022F + 10F 0.022F + + 1F 1F 100k Generator Analyzer Audio Precision System Two SYS - 2322A NIPPON PRECISION CIRCUITS INC.--6 SM6451B MICROCONTROLLER INTERFACE The SM6451B uses a 3-wire serial interface comprising MDT (data), MCK (clock) and MLEN (latch enable) to select channels and attenuation levels for the addressed device. Input Timing The microcontroller data input timing is shown in figure 1. MDT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MCK MLEN Figure 1. Microcontroller data input timing Data is shifted into the internal shift register on the rising edge of MCK, and the attenuation value is updated on the rising edge of MLEN. Accordingly, data on MDT should be changed on the falling edge of MCK. Note, however, a minimum of 16 MCK input pulses are required. Data Format The format of microcontroller input data is shown in figure 2. Attenuation Data 7 Attenuation Data 6 Attenuation Data 5 Attenuation Data 4 Attenuation Data 3 Attenuation Data 2 Attenuation Data 1 MDT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 Figure 2. Microcontroller data format D15, D14 Don't care. D13, D12 Chip address bits. D13 corresponds to ADRS1 and D12 corresponds to ADRS2. The device is addressed only when ADRS1:ADRS2 matches D13:D12. Example 1: If D13 = LOW, D12 = HIGH and ADRS1 = LOW, ADRS2 = LOW, then the device is not addressed since ADRS2 and D12 do not match. Example 2: If D13/D12 = LOW and ADRS1/ADRS2 = LOW, then the device is addressed and all input data is read and the attenuation settings updated. D11, D10 Don't care. NIPPON PRECISION CIRCUITS INC.--7 Attenuation Data 0 Chip Address 1 Chip Address 2 Channel Select Channel Select Don't Care Don't Care Don't Care Don't Care D0 SM6451B D9, D8 Channel select bits. The selected channel(s) are shown in table 1. Table 1. Channel select D9 LOW LOW HIGH HIGH D8 LOW HIGH LOW HIGH Selected channel Both left and right channels Left channel Right channel No change D7 to D0 Attenuation register (ATT) set bits. Table 2. Attenuation setting1 Attenuation 0 dB -1 dB -2 dB : -15 dB -16 dB -17 dB : -63 dB -64 dB -65 dB : -79 dB -80 dB Mute Mute : Mute Mute 1. ATTH 00 01 02 : 0F 10 11 : 3F 40 41 : 4F 50 51 52 : FE FF D7 LOW LOW LOW : LOW LOW LOW : LOW LOW LOW : LOW LOW LOW LOW : HIGH HIGH D6 LOW LOW LOW : LOW LOW LOW : LOW HIGH HIGH : HIGH HIGH HIGH HIGH : HIGH HIGH D5 LOW LOW LOW : LOW LOW LOW : HIGH LOW LOW : LOW LOW LOW LOW : HIGH HIGH D4 LOW LOW LOW : LOW HIGH HIGH : HIGH LOW LOW : LOW HIGH HIGH HIGH : HIGH HIGH D3 LOW LOW LOW : HIGH LOW LOW : HIGH LOW LOW : HIGH LOW LOW LOW : HIGH HIGH D2 LOW LOW LOW : HIGH LOW LOW : HIGH LOW LOW : HIGH LOW LOW LOW : HIGH HIGH D1 LOW LOW HIGH : HIGH LOW LOW : HIGH LOW LOW : HIGH LOW LOW HIGH : HIGH HIGH D0 LOW HIGH LOW : HIGH LOW HIGH : HIGH LOW HIGH : HIGH LOW HIGH LOW : LOW HIGH Outputs are muted after system reset. Attenuation error is changed dependent on the supply voltage when attenuation level is under - 60dB. In the case of the supply voltage being under 2.6V, mute level inverses up to the same level of - 80dB setting or more. (see Figure 6) NIPPON PRECISION CIRCUITS INC.--8 SM6451B ANALOG PERFORMANCE CHARACTERISTICS DVDD = AVDD = 3.0 V, 100 k output load resistance, Ta = 25 C 1 f=1kHz ATT=0dB 20kHz LPF 0.1 ATT=0dB 20kHz LPF THD+N(%) VDD=3.3V VDD=3.0V VDD=2.7V THD+N(%) 0.1 VIN=0.2Vrms 0.01 VIN=0.5Vrms 0.01 VIN=0.8Vrms 0.001 .1 .2 .5 1 1.2 VIN(Vrms) 0.001 20 100 1k 10k 20k Frequency(Hz) Figure 3. THD + N vs. input amplitude Figure 4. THD + N vs. input frequency 2 1 0 VIN=0.8Vrms f=1kHz -64 -68 -72 Ideal Gain Error(dB) -1 -2 -3 -4 -5 0 -10 -20 -30 -40 -50 -60 -70 -80 Gain(dB) -76 -80 -84 -88 -92 -64 -68 -72 -76 -80 Mute VDD=3V VDD=2.7V VDD=2.5V ATT(dB) ATT(dB) Figure 5. Attenuation error Figure 6. Attenuation characteristic (- 64dB to MUTE) 20 +10 VIN=0Vrms A-Weight Filter +0 -10 -20 ATT=0dB VIN=0.8Vrms Residual Noise(Vrms) 16 ATT=-20dB 12 Gain(dB) -30 -40 -50 -60 -70 -80 -90 ATT=MUTE ATT=-60dB ATT=-40dB 8 4 ATT=-80dB 0 0 -10 -20 -30 -40 -50 -60 -70 -80 -100 20 100 1k 10k 100k 200k ATT(dB) Frequency(Hz) Figure 7. Residual noise vs. ATT Figure 8. Frequency response NIPPON PRECISION CIRCUITS INC.--9 SM6451B -40 +0 VIN=0.8Vrms ATT=0dB -60 -20 FFT Spectrum(dBr) Cross Talk(dB) VIN=0.8Vrms=0dBr f=1kHz ATT=0dB BH Window -40 -60 -80 -100 -120 -80 -100 -120 -140 20 100 1k 10k 100k 200k -140 0 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k Frequency(Hz) Frequency(Hz) Figure 9. Crosstalk frequency response Figure 10. FFT spectrum 100 6 10 Current Consumption(mA) VIN=0.8Vrms f=1kHz ATT=0dB 20kHz LPF 5 AVDD+DVDD ADRS1=ADRS2=0V THD+N(%) 4 3 2 1 0 2.4 1 0.1 0.01 0.001 1 10 Load Resistance(k) 100 2.7 3 3.3 3.6 Power Supply(V) Figure 11. THD + N vs. load resistance Figure 12. Current consumption vs. supply voltage 6 Current Consumption(mA) 5 AVDD+DVDD ADRS1=ADRS2=0V 4 3 2 VDD=2.7V VDD=3.3V VDD=3.0V 1 0 -50 -25 0 25 50 75 100 Operating Temperature(C) Figure 13. Current consumption vs. operating temperature NIPPON PRECISION CIRCUITS INC.--10 SM6451B TYPICAL APPLICATIONS Connection Guidelines Decoupling capacitors of approximately 10 F should be connected from AVDD, VRL, VRR to AVSS, and from DVDD to DVSS. In addition, approximately 0.01 F capacitors should also be connected from AVDD, VRL, VRR to AVSS, and from DVDD to DVSS to suppress digital switch noise. An approximately 0.001 F capacitor connected from RSTN to DVSS will force a system reset when power is applied. Connection 1 (to DAC) CPU MDT MCK MLEN LPF DAC LPF 2.5 to 3.6V RIN ROUT R-ch OUT LIN LOUT L-ch OUT SM6451 DVDD AVDD ADRS1 DVSS AVSS ADRS2 Connection 2 When there is a possibility that the input peak-to-peak amplitude will exceed the supply voltage, input protection diodes should be connected to prevent device breakdown. AVDD L-ch Input LIN LOUT L-ch Output SM6451 R-ch Input RIN ROUT R-ch Output AVSS NIPPON PRECISION CIRCUITS INC.--11 SM6451B Please pay your attention to the following points at time of using the products shown in this document. The products shown in this document (hereinafter "Products") are not intended to be used for the apparatus that exerts harmful influence on human lives due to the defects, failure or malfunction of the Products. Customers are requested to obtain prior written agreement for such use from NIPPON PRECISION CIRCUITS INC. (hereinafter "NPC"). Customers shall be solely responsible for, and indemnify and hold NPC free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. NPC reserves the right to change the specifications of the Products in order to improve the characteristic or reliability thereof. NPC makes no claim or warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. Therefore, NPC shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in this document. Any descriptions including applications, circuits, and the parameters of the Products in this document are for reference to use the Products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or modification. Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome, Koto-ku, Tokyo 135-8430, Japan Telephone: +81-3-3642-6661 Facsimile: +81-3-3642-6698 http://www.npc.co.jp/ Email: sales@npc.co.jp NC9925DE 2005.01 NIPPON PRECISION CIRCUITS INC.--12 |
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