View TM6820_1326902.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TM6820
tenx technology
GENERAL DESCRIPTION The TM6820 is an embedded high-performance 4-bit microcomputer with LCD driver. It contains all the necessary functions, such as 4-bit parallel processing ALU, ROM, RAM, I/O ports, timer, clock generator, dual clock operation, Resistance to Frequency Converter(RFC), EL panel driver, LCD driver, look-up table, watchdog timer and key matrix scanning circuitry in a signal chip. FEATURE 1. Low power dissipation. 2. Powerful instruction set (142 instructions). Binary addition, subtraction, BCD adjust, logical operation in direct and index addressing mode. Single-bit manipulation (set, reset, decision for branch). Various conditional branch. 16 working registers and manipulation. Table look-up. LCD driver data transfer. 3. Memory capacity. ROM capacity RAM capacity 2048 128 x 16 bits. x 4 bits.
4 Bit Microcontroller
4. LCD driver output. 5 common outputs and 35 segment outputs (up to drive 175 LCD segments). 1/2 Duty, 1/3 Duty, 1/4 Duty or 1/5 Duty is selected by mask option. 1/2 Bias or 1/3 Bias is selected by mask option. Single instruction to turn off all segments. Segment outputs(SEG1~35) could be defined as CMOS or P_open drain output type by mask option. 5. Input/output ports. Port IOA 4 pins (with internal pull-low), muxed with SEG24~27. Port IOB 4 pins (with internal pull-low), muxed with SEG28~31. Port IOC 4 pins (with internal pull-low/low-level-hold), muxed with SEG32~35. IOC port had built in the input signal chattering prevention circuitry. 6. 8 level subroutine nesting. 7. Interrupt function. External factor 2 Internal factor 4 (INT pin, Port IOC). (Pre-Divider, Timer1, Timer2 & RFC).
8. Built-in EL panel driver. ELC, ELP (Muxed with SEG28, SEG29).
tenx technology, inc.
V1.4 10/08/01
TM6820
9. Built in Alarm, clock or single tone melody generator. BZB, BZ (Muxed with SEG30, SEG31). 10. Built-in R to F Converter circuit. CX, RR, RT, RH (Muxed with SEG24~SEG27). 11. Two 6-bit programmable timer with programmable clock source. 12. Watch dog timer. 13. Built-in Voltage doubler, tripler charge pump circuit. 14. Dual clock operation slow clock oscillation can be defined as X'tal or external RC type oscillator by mask option. fast clock oscillation can be defined as 3.58MHz ceramic resonator, internal R or external R type oscillator by mask option. 15. HALT function. 16. STOP function. 17. Built-in control circuitry to switch the internal operating voltage in order to perform the low power consumption or provide a stable operating voltage. 18. Built-in Low Battery Detect function 19. Heavy Loading protection function
APPLICATION Timer / Calendar / Calculator / Thermometer
2
tenx technology, inc.
V1.4 10/08/01
TM6820
BLOCK DIAGRAM
B1-4 ELC,ELP BZ,BZB A1-4 CX RR,RT,RH C1-4 COM1-5 SEG1-35 VL1-3
VBAT POWER SWITCH Lower Battery Detect
B-PORT EL DRIVER ALARM
LCD DRIVER A-PORT RFC C-PORT SEGMENT PLA 4 BITS DATA BUS
FREQUENCY GENERATOR
INDEX ROM 256(16-N) X 8 BITS
ALU
DATA RAM 128 X 4 BITS
PRE-DIVIDER
6 BITS PRESET TIMER 1 & 2 CONTROL CIRCUIT RESET INT
8 LEVELS STACK
INSTRUCTION DECODER MASK ROM 128N X 16 BITS
OSCILLATOR
11 BITS PROGRAM COUNTER
CUP1,2
XTIN,OUT
TM6820 BLOCKDIAGRAM
N:1->16
PAD DIAGRAM
1 50 40
10
(ROM)
30
20
3
tenx technology, inc.
V1.4 10/08/01
TM6820
The substrate of chip should be connected to GND. PAD COORDINATE No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 Name BAK XIN XOUT GND VL1 VL2 VL3 CUP1 CUP2 COM1 COM2 COM3 COM4 COM5 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 X 197.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 427.5 542.5 657.5 772.5 887.5 1002.5 1117.5 1232.5 1347.5 1462.5 1577.5 1692.5 Y 1602.5 1576.5 1446.5 1331.5 1216.5 1101.5 986,5 871.5 756.5 641.5 526.5 411.5 296.5 166.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 77.5 No 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 Name SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24/IOA1/CX SEG25/IOA2/RR SEG26/IOA3/RT SEG27/IOA4/RH SEG28/IOB1/ELC SEG29/IOB2/ELP SEG30/IOB3/BZB SEG31/IOB4/BZ SEG32/IOC1 SEG33/IOC2 SEG34/IOC3 SEG35/IOC4 RESET INT TEST VBAT X 1822.5 1822.5 1822.5 1822.5 1822.5 1822.5 1822.5 1822.5 1822.5 1822.5 1822.5 1822.5 1822.5 1822.5 1692.5 1577.5 1462.5 1347.5 1232.5 1117.5 1002.5 887.5 772.5 657.5 542.5 427.5 312.5 Y 77.5 207.5 322.5 437.5 552.5 667.5 782.5 897.5 1012.5 1127.5 1242.5 1357.5 1472.5 1602.5 1602.5 1602.5 1602.5 1602.5 1602.5 1602.5 1602.5 1602.5 1602.5 1602.5 1602.5 1602.5 1602.5
4
tenx technology, inc.
V1.4 10/08/01
TM6820
PIN DESCRIPTION
Name VBAT BAK VL1,2,3 RESET I/O P P P I Description Positive supply voltage. Positive Back-up voltage. Connected a 0.1u capacitor to GND. LCD supply voltage. Connect 0.1u capacitors between VL1,2,3 and GND. Input pin for external reset request signal, built-in internal pull-down resistor. . Reset cycle time can be defined as "PH15/2" or "PH12/2" by mask option. . Reset Type can be defined as "Level reset" or "Pulse reset" by mask option.. Input pin for external INT request signal. . Falling edge or rising edge triggered is defined by mask option. . Internal pull-down or pull-up resistor is defined by mask option. Test signal input pin. Switching pins for supply the LCD driving voltage to the VL1,2,3 pins. . Connect the CUP1 and CUP2 pins with non-polarized electrolytic capacitor when chip operated in 1/2 or 1/3 bias mode. . In no BIAS mode application, leave these pins opened. Time base counter frequency (clock specified. LCD alternating frequency. Alarm signal frequency) or system clock oscillation. . 32KHz Crystal oscillator. . In FAST mode, connect an external resistor could compose the RC oscillator(mask option). . In SLOW mode, connect an external resistor could compose the RC oscillator(mask option). Output pins for driving the common pins of the LCD panel. Output pins for driving the LCD panel segment. Input / Output port A. (Muxed with SEG24~SEG27) Input / Output port B. (Muxed with SEG28~SEG31) Input / Output port C. (Muxed with SEG32~SEG35) 1 input pin and 3 output pins for RFC application. (Muxed with SEG24~SEG27) Output port for EL panel driver. (Muxed with SEG28,SEG29) Output port for alarm, clock or single tone melody generator. (Muxed with SEG30~SEG31) Negative supply voltage.
INT
I
TESTA CUP1,2
O
XIN XOUT
I O
COM1~5 SEG1-35 IOA1-4 IOB1-4 IOC1-4 CX RR/RT/RH ELC/ELP BZB/BZ GND
O O I/O I/O I/O I O O O P
5
tenx technology, inc.
V1.4 10/08/01
TM6820
ABSOLOUTE MAXIMUM RATINGS
at Ta= -20 to 70,GND= 0V Name Maximum Supply Voltage Maximum Input Voltage Maximum output Voltage Maximum Operating Temperature Maximum Storage Temperature Symbol VBAT Vin Vout Topg Tstg Range -0.3 to 3.6 -0.3 to VBAT +0.3 -0.3 to BAK,VL1/2/3+0.3 -20 to +70 -25 to +125 Unit V V V
POWER CONSUMPTION
at Ta=-20 to 70,GND= 0V Name HALT mode Condition Only 32.768KHz Crystal oscillator operating, IHALT1 without loading. Ag mode, VBAT =1.5V, BCF = 0 Only 32.768KHz Crystal oscillator operating, IHALT2 without loading. Li mode, VBAT =3.0V, BCF = 0 ISTOP Sym. Min. Typ. 2 Max. 5 Unit uA
2
5
uA
STOP mode
1
uA
Note : When RC oscillator function is operating, the current consumption will depend on the frequency of oscillation.
6
tenx technology, inc.
V1.4 10/08/01
TM6820
ALLOWABLE OPERATING CONDITIONS
at Ta= -20 to 70,GND= 0V Name Oscillator Start-Up Voltage Oscillator Sustain Voltage Supply Voltage Supply Voltage Input "H" Voltage Input "L" Voltage Input "H" Voltage Input "L" Voltage Input "H" Voltage Input "L" Voltage Operating Freq BAK VBAT VBAT Vih1 Vil1 Vih2 Vil2 Vih3 Vil3 Fopg1 Fopg2 Crystal Mode RC Mode RC Mode OSCIN Crystal Mode Ag Mode Li Mode 1.0 1.2 2.4 1.8 3.6 V V V V V V V V V KHZ 500 KHZ BAK Crystal Mode 1.3 V Symb. Condition Min. Max. Unit
VBAT-0.7 VBAT+0.7 -0.7 0.8xBAK 0 0.8xBAK 0 32 10 0.7 BAK 0.2xBAK BAK 0.2xBAK
ELECTRICAL CHARACTERISTICS
at#1:VBAT=1.2V(Ag); at#2:VBAT=2.4V(Li):
Input Resistance
Name "L" Level Hold Tr.(IOC) Sym. Rllh1 Rllh2 IOA/B/C Pull-Down Tr. Rmad1 Rmad2 INT Pull-up Tr. Rintu1 Rintu2 INT Pull-Down Tr. Rintd1 Rintd2 RES Pull-Down R Rres1 Rres2 Condition Vi=0.2VBAT,#1 Vi=0.2VBAT,#2 Vi=VBAT,#1 Vi=VBAT#2 Vi=VBAT,#1 Vi=VBAT,#2 Vi=GND,#1 Vi=GND,#2 Vi=GND or VBAT,#1 Vi=GND or VBAT,#2 Min. 10 10 200 200 200 200 200 200 10 10 Typ. 40 40 500 500 500 500 500 500 50 50 Max. 100 100 1000 1000 1000 1000 1000 1000 100 100 Unit Kohm Kohm Kohm Kohm Kohm Kohm Kohm Kohm Kohm Kohm
7
tenx technology, inc.
V1.4 10/08/01
TM6820
DC Output Characteristics
Name Symb. Condition Port Min. 0.8 1.5 SEG1~35 0.2 0.3 Typ. 0.9 1.8 0.3 0.6 Max. 1.0 2.1 0.4 0.9 Unit V V V V Voh1c Ioh=-200uA,#1 Output "H" Voltage Voh2c Ioh=-1mA,#2 Vol1c Output "L" Voltage Vol2c Iol=400uA,#1 Iol=2mA,#2
Analog Circuit Characteristics (In operation mode) (VBAT=3.0V for Li-B or 1.5V for Ag-B, GND=0V, fosc=32,768Hz,Ta=25)
Name Internal Voltage Symb. VL1 Condition Connects a 1M load resistance between GND and VL1 (No panel load) VL2 Connects a 1M load resistance between GND and VL2 (No panel load) VL3 1/2Bias Display Mode(VL3 connect to VL2) Connects a 1M load resistance between GND and VL3 (No panel load) 1/3Bias Display Mode Connects a 1M load resistance between GND and VL3 (No panel load) BLD voltage VBLD VBLD BLD circuit response time TBLD Li-B Ag-B 2.25 1.10 2.40 1.20 2.55 1.30 100 V V us 3xVL1 x0.9 3xVL1 +0.1 V 2xVL1 x0.9 2xVL1 +0.1 V 2xVL1 x0.9 2xVL1 +0.1 V Min. 0.95 Typ. 1.05 Max. 1.15 Unit V
8
tenx technology, inc.
V1.4 10/08/01
TM6820
TYPICAL APPLICATION CIRCUIT
This application circuit is simply an example, and is not guaranteed to work.
LCD Panel
15P XIN 15P 32.768KHz Crystal XOUT
COM1~5, SEG1~35 CUP1
0.1u
CUP2 VBAT VL3
RH RT RR
VL2 VL1
0.1u 0.1u 0.1u 0.1u 1.5V
BAK CX GND
0.1u
TM6820
0.1u
L RESET INT ELC ELP
EL Plant
External INT.
I/O Port
IOA,IOB,IOC Choke BZ(BZB) Buzzer
Ag power mode, 1/3 Bias, 1/5 Duty
9
tenx technology, inc.
V1.4 10/08/01

▲Up To Search▲

Price & Availability of TM6820

	To Download TM6820 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .