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| TS616 DUAL WIDE BAND OPERATIONAL AMPLIFIER WITH HIGH OUTPUT CURRENT s LOW NOISE : 2.5nV/Hz s HIGH OUTPUT CURRENT : 420mA s VERY LOW HARMONIC AND INTERMODULATION DISTORTION s HIGH SLEW RATE : 420V/s s -3dB BANDWIDTH : 40MHz@gain=12dB on 25 load single ended. s 20.7Vp-p DIFFERENTIAL OUTPUT SWING on 50 load, 12V power supply DW SO8 Exposed-Pad (Plastic Micro package) s CURRENT FEEDBACK STRUCTURE s 5V to 12V POWER SUPPLY s SPECIFIED FOR 20 and 50 DIFFERENTIAL LOAD DESCRIPTION The TS616 is a dual operational amplifier featuring a high output current of 410mA. The drivers can be configured differentially for driving signals in telecommunication systems using multiple carriers. The TS616 is ideally suited for xDSL (High Speed Asymmetrical Digital Subscriber Line) applications. This circuit is capable of driving a 10 or 25 load at 2.5V, 5V, 6V or +12V power supply. The TS616 is able to reach a -3dB bandwidth of 40MHz on 25 load with a 12dB gain. This device is designed for high slew rates supporting low harmonic distortion and intermodulation. ORDER CODE Part Number TS616IDW TS616IDWT Temperature Range -40, +85C -40, +85C Package DW DW DW = Small Outline Package with Exposed-Pad, T = Tape & Real PIN CONNECTIONS (top view) Output1 1 Inverting Input1 2 Non Inverting Input1 3 VCC - 4 8 VCC + + 7 Output2 + 6 Inverting Input2 5 Non Inverting Input2 APPLICATION Cross Section View Showing Exposed-Pad This pad can be connected to a (-Vcc) copper area on the PCB s Line driver for xDSL s Multiple Video Line Driver December 2002 1/27 TS616 ABSOLUTE MAXIMUM RATINGS Symbol VCC Vid Vin Toper Tstd Tj Rthjc Rthja Pmax. ESD only pins 1, 4, 7, 8 Parameter Supply voltage 1) 2) Value 7 2 6 -40 to + 85 -65 to +150 150 16 60 2 1.5 2 200 1.5 2 100 4) Unit V V V C C C C/W C/W W kV kV V kV kV V Differential Input Voltage Input Voltage Range 3) Operating Free Air Temperature Range Storage Temperature Maximum Junction Temperature Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient Area Maximum Power Dissipation (@Ta=25C) for Tj=150C CDM : Charged Device Model HBM : Human Body Model MM : Machine Model CDM : Charged Device Model HBM : Human Body Model MM : Machine Model Output Short Circuit ESD only pins 2, 3, 5, 6 1. 2. 3. 4. All voltage values, except differential voltage are with respect to network terminal. Differential voltage are non-inverting input terminal with respect to the inverting input terminal. The magnitude of input and output voltage must never exceed VCC +0.3V. An output current limitation protects the circuit from transient currents. Short-circuits can cause excessive heating. Destructive dissipation can result from short circuit on amplifiers. OPERATING CONDITIONS Symbol VCC Vicm Power Supply Voltage Common Mode Input Voltage Parameter Value 2.5 to 6 -VCC+1.5V to +VCC-1.5V Unit V V TYPICAL APPLICATION: Differential Line Driver for xDSL Applications 3 2 8 + _ +Vcc 1 12.5 1/2TS61 5 6 Vi R2 R1 GND R4 Vo 25 Vo 12.5 1:2 100 Vi 4 5 _ R3 1/2TS616 1/2TS615 + 4 -Vcc 2/27 TS616 ELECTRICAL CHARACTERISTICS VCC = 6Volts, Rfb=910,Tamb = 25C (unless otherwise specified) Note: As described on page 24 (table 71), the TS616 requires a 620 feedback resistor for an optimized bandwidth with a gain of 12B for a 12V power supply. Nevertheless, due to production test constraints, the TS616 is tested with the same feedback resistor for 12V and 5V power supplies (910). Symbol DC PERFORMANCE Vio Vio Iib+ IibZIN+ ZINCIN+ CMR SVR Parameter Test Condition Tamb Tmin. < Tamb < Tmax. Tamb = 25C Tamb Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax. Min. Typ. 1 1.6 5 7.2 3 3.1 82 54 1 64 62 81 80 13.5 Max. 3.5 2.5 30 15 Unit Input Offset Voltage Differential Input Offset Voltage Positive Input Bias Current Negative Input Bias Current Input(+) Impedance Input(-) Impedance Input(+) Capacitance Common Mode Rejection Ratio 20 log (Vic/Vio) Supply Voltage Rejection Ratio mV mV A A k pF dB dB Vic = 4.5V Tmin. < Tamb < Tmax. Vcc=2.5V to 6V 58 72 Tmin. < Tamb < Tmax. 20 log (Vcc/Vio) ICC Total Supply Current per Operator No load DYNAMIC PERFORMANCE and OUTPUT CHARACTERISTIC Vout = 7Vp-p, RL = 25 ROL Open Loop Transimpedance Tmin. < Tamb. < Tmax. Small Signal Vout<20mVp -3dB Bandwidth AV = 12dB, RL = 25 Large Signal Vout=3Vp Full Power Bandwidth BW AV = 12dB, RL = 25 Small Signal Vout<20mVp Gain Flatness @ 0.1dB AV = 12dB, RL = 25 Vout = 6Vp-p, AV = 12dB, RL Tr Rise Time = 25 Vout = 6Vp-p, AV = 12dB, RL Tf Fall Time = 25 Vout = 6Vp-p, AV = 12dB, RL Ts Settling Time = 25 Vout = 6Vp-p, AV = 12dB, RL SR Slew Rate = 25 RL=25 Connected to GND VOH High Level Output Voltage RL=25 Connected to GND VOL Low Level Output Voltage Vout = -4Vp Output Sink Current Tmin. < Tamb < Tmax. Iout Vout = +4Vp Output Source Current Tmin. < Tamb < Tmax. 17 mA M 5 13.5 5.7 40 25 MHz 26 7 10.6 12.2 50 330 4.8 -320 330 420 5.05 -5.3 -490 -395 420 370 -5.1 MHz ns ns ns V/s V V mA 3/27 TS616 Note: As described on page 24 (table 71), the TS616 requires a 620 feedback resistor for an optimized bandwidth with a gain of 12B for a 12V power supply. Nevertheless, due to production test constraints, the TS616 is tested with the same feedback resistor for 12V and 5V power supplies (910). Symbol Parameter Test Condition F = 100kHz F = 100kHz F = 100kHz Vout = 14Vp-p, AV = 12dB F= 110kHz, RL = 50 diff. Vout = 14Vp-p, AV = 12dB F= 110kHz, RL = 50 diff. F1= 100kHz, F2 = 110kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1= 370kHz, F2 = 400kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1 = 100kHz, F2 = 110kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1 = 370kHz, F2 = 400kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. Min. Typ. 2.5 15 21 -87 -83 -76 Max. Unit nV/Hz pA/Hz pA/Hz dBc dBc NOISE AND DISTORTION eN Equivalent Input Noise Voltage iNp Equivalent Input Noise Current (+) iNn Equivalent Input Noise Current (-) 2nd Harmonic Distortion HD2 (differential configuration) HD3 3rd Harmonic Distortion (differential configuration) IM2 2nd Order Intermodulation Product (differential configuration) dBc -75 -88 dBc -87 IM3 3rd Order Intermodulation Product (differential configuration) 4/27 TS616 ELECTRICAL CHARACTERISTICS VCC = 2.5Volts, Rfb=910,Tamb = 25C (unless otherwise specified) Symbol DC PERFORMANCE Vio Vio Iib+ IibZIN+ ZINCIN+ CMR SVR ICC Input Offset Voltage Differential Input Offset Voltage Positive Input Bias Current Negative Input Bias Current Input(+) Impedance Input(-) Impedance Input(+) Capacitance Common Mode Rejection Ratio 20 log (Vic/Vio) Supply Voltage Rejection Ratio 20 log (Vcc/Vio) Vic = 1V Tmin. < Tamb. < Tmax. Vcc=2V to 2.5V Tmin. < Tamb. < Tmax. 63 55 Tamb Tmin. < Tamb < Tmax. Tamb = 25C Tamb Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax. 4 7 1.1 1.2 71 62 1.5 61 60 79 78 11.5 2 4.2 1.5 20 28 MHz 20 5.7 11 11.5 39 100 1.5 -300 200 130 1.7 -1.9 -400 -360 270 240 mA -1.7 MHz ns ns ns V/s V V 15 11 0.2 1 2.5 30 2.5 mV mV A A k pF dB dB mA Parameter Test Condition Min. Typ. Max. Unit Total Supply Current per Operator No load DYNAMIC PERFORMANCE and OUTPUT CHARACTERISTICS Vout = 2Vp-p, RL = 10 ROL Open Loop Transimpedance Tmin. < Tamb. < Tmax. -3dB Bandwidth BW Full Power Bandwidth Gain Flatness @ 0.1dB Tr Tf Ts SR VOH VOL Iout Rise Time Fall Time Settling Time Slew Rate High Level Output Voltage Low Level Output Voltage Output Sink Current Output Source Current Small Signal Vout<20mVp AV = 12dB, RL = 10 Large Signal Vout = 1.4Vp AV = 12dB, RL = 10 Small Signal Vout<20mVp AV = 12dB, RL = 10 Vout = 2.8Vp-p, AV = 12dB RL = 10 Vout = 2.8Vp-p, AV = 12dB RL = 10 Vout = 2.2Vp-p, AV = 12dB RL = 10 Vout = 2.2Vp-p, AV = 12dB RL = 10 RL=10 Connected to GND RL=10 Connected to GND Vout = -1.25Vp Tmin. < Tamb < Tmax. Vout = +1.25Vp Tmin. < Tamb < Tmax. M 5/27 TS616 Symbol Parameter Test Condition F = 100kHz F = 100kHz F = 100kHz Vout = 6Vp-p, AV = 12dB F= 110kHz, RL = 20 diff. Vout = 6Vp-p, AV = 12dB F= 110kHz, RL = 20 diff. F1= 100kHz, F2 = 110kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. F1= 370kHz, F2 = 400kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. F1 = 100kHz, F2 = 110kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. F1 = 370kHz, F2 = 400kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. Min. Typ. 2.5 15 21 -97 -98 -86 Max. Unit nV/Hz pA/Hz pA/Hz dBc dBc NOISE AND DISTORTION eN Equivalent Input Noise Voltage iNp Equivalent Input Noise Current (+) iNn Equivalent Input Noise Current (-) HD2 HD3 2nd Harmonic Distortion (differential configuration) 3rd Harmonic Distortion (differential configuration) IM2 2nd Order Intermodulation Product (differential configuration) dBc -88 -90 dBc -85 IM3 3rd Order Intermodulation Product (differential configuration) 6/27 TS616 Figure 1: Load Configuration Load: RL=25, VCC=6V Figure 4: Load Configuration Load: RL=10, VCC=2.5V + _ +6V 50 cable 49.9 + 50 +2.5V 50 cable TS616 -6V 25 33 1W TS616 10 49.9 _ -2.5V 11 0.5W 50 Figure 2: Closed Loop Gain vs. Frequency AV=+1 2 40 Figure 5: Closed Loop Gain vs. Frequency AV=-1 2 -140 gain 0 -2 -4 (Vcc=6V) 20 0 gain -160 (Vcc=2.5V) 0 -2 -4 phase (Vcc=2.5V) phase (Vcc=6V) -180 -200 -220 (gain (dB) Phase () -6 -8 -10 -12 -14 -16 (Vcc=2.5V) -40 (Vcc=6V) -60 -80 (Vcc=2.5V, Rfb=1.1k, Rload=10) (Vcc=6V, Rfb=750, Rload=25) -100 -120 100 1k 10k 100k 1M 10M 100M -6 -8 -10 -12 -14 -16 (Vcc=2.5V) (Vcc=6V) -240 -260 (Vcc=2.5V, Rfb=1k, Rin=1k, Rload=10) (Vcc=6V, Rfb=680, Rin=680, Rload=25) -280 -300 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Frequency (Hz) Figure 3: Closed Loop Gain vs. Frequency AV=+2 8 40 Figure 6: Closed Loop Gain vs. Frequency AV=-2 8 -140 gain 6 4 2 (Vcc=6V) 20 gain 6 4 2 -160 phase (Vcc=2.5V) 0 phase (Vcc=2.5V) (Vcc=6V) -180 -200 -220 (Vcc=6V) -240 -260 (gain (dB)) Phase () 0 -2 -4 -6 -8 -10 (Vcc=2.5V) (Vcc=6V) 0 -2 -4 -6 -8 -10 (Vcc=2.5V) -40 -60 -80 (Vcc=2.5V, Rfb=1k, Rload=10) (Vcc=6V, Rfb=680, Rload=25) -100 -120 100 1k 10k 100k 1M 10M 100M (Vcc=2.5V, Rfb=1k, Rin=510, Rload=10) (Vcc=6V, Rfb=680, Rin=750//620, Rload=25) -280 -300 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Frequency (Hz) 7/27 Phase () -20 (gain (dB)) Phase () -20 (gain (dB)) TS616 Figure 7: Closed Loop Gain vs. Frequency AV=+4 14 40 Figure 10: Closed Loop Gain vs. Frequency AV=-4 14 -140 gain 12 (Vcc=2.5V) 10 8 20 12 10 gain -160 (Vcc=2.5V) phase (Vcc=6V) 0 8 phase (Vcc=6V) -180 -200 -220 (gain (dB)) Phase () 6 4 2 0 -2 -4 (Vcc=2.5V) (Vcc=6V) 6 4 2 0 -2 (Vcc=2.5V) (Vcc=6V) -40 -60 -80 (Vcc=2.5V, Rfb=910, Rg=300, Rload=10) (Vcc=6V, Rfb=620, Rg=560//330, Rload=25) -100 -240 -260 (Vcc=2.5V, Rfb=1k, Rin=320//360, Rload=10) (Vcc=6V, Rfb=620, Rin=360//270, Rload=25) -280 -300 100 1k 10k 100k 1M 10M 100M -4 -120 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Frequency (Hz) Figure 8: Closed Loop Gain vs. Frequency AV=+8 20 40 Figure 11: Closed Loop Gain vs. Frequency AV=-8 20 -140 gain 18 (Vcc=2.5V) 16 14 20 18 16 0 14 gain -160 (Vcc=2.5V) phase (Vcc=6V) phase (Vcc=6V) -180 -200 -220 (gain (dB)) Phase () 12 10 8 6 4 2 (Vcc=2.5V) (Vcc=6V) 12 10 8 6 4 (Vcc=2.5V) (Vcc=6V) -40 -60 -80 (Vcc=2.5V, Rfb=680, Rg=240//160, Rload=10) (Vcc=6V, Rfb=510, Rg=270//100, Rload=25) -100 -240 -260 (Vcc=2.5V, Rfb=680, Rin=160//180, Rload=10) (Vcc=6V, Rfb=510, Rin=150//110, Rload=25) -280 -300 100 1k 10k 100k 1M 10M 100M 2 -120 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Frequency (Hz) Figure 9: Bandwidth vs. Temperature AV=+4, Rfb=910 50 Vcc=6V Load=25 45 Figure 12: Positive Slew Rate AV=+4, Rfb=620, VCC=6V, RL=25 4 2 40 Bw (MHz) VOUT (V) 35 0 30 -2 25 Vcc=2.5V Load=10 20 -40 -20 0 20 40 60 80 -4 0.0 10.0n 20.0n 30.0n 40.0n 50.0n Temperature (C) Time (s) 8/27 Phase () -20 (gain (dB)) Phase () -20 (gain (dB)) TS616 Figure 13: Positive Slew Rate AV=+4, Rfb=910, VCC=2.5V, RL=10 2 Figure 16: Positive Slew Rate AV= - 4, Rfb=620, VCC=6V, R L=25 4 1 2 VOUT (V) VOUT (V) 0 0 -1 -2 -2 0.0 10.0n 20.0n 30.0n 40.0n 50.0n -4 0.0 10.0n 20.0n 30.0n 40.0n 50.0n Time (s) Time (s) Figure 14: Negative Slew Rate AV=+4, Rfb=620, VCC=6V, RL=25 4 Figure 17: Positive Slew Rate AV= - 4, Rfb=910, VCC=2.5V, RL=10 2 2 1 VOUT (V) 0 VOUT (V) 10.0n 20.0n 30.0n 40.0n 50.0n 0 -2 -1 -4 0.0 -2 0.0 10.0n 20.0n 30.0n 40.0n 50.0n Time (s) Time (s) Figure 15: Negative Slew Rate AV=+4, Rfb=910, VCC=2.5V, RL=10 2 Figure 18: Negative Slew Rate AV= - 4, Rfb=620, VCC=6V, RL=25 4 1 2 VOUT (V) 0 VOUT (V) 10.0n 20.0n 30.0n 40.0n 50.0n 0 -1 -2 -2 0.0 -4 0.0 10.0n 20.0n 30.0n 40.0n 50.0n Time (s) Time (s) 9/27 TS616 Figure 19: Negative Slew Rate AV= - 4, Rfb=910, VCC=2.5V, RL=10 2 Figure 22: Input Voltage Noise Level AV=+92, Rfb=910, Input+ connected to Gnd via 10 5.0 + Input Voltage Noise (nV/Hz) 4.5 + 6V - 6V 910 910 Output _ 10 4.0 VOUT (V) 0 3.5 3.0 2.5 -2 0.0 10.0n 20.0n 30.0n 40.0n 50.0n 2.0 100 1k 10k 100k 1M Time (s) (Frequency (Hz) Figure 20: Slew Rate vs. Temperature AV=+4, Rfb=910, VCC=2.5V, RL=10 200 150 Figure 23: Transimpedance vs. Temperature Open Loop 30 25 100 Vcc=6V Slew Rate (V/s) Positive SR 50 20 ROL (M) Negative SR 0 -50 -100 15 10 Vcc=2.5V 5 -150 -200 -40 0 -40 -20 0 20 40 60 80 -20 0 20 40 60 80 Temperature (C) Temperature (C) Figure 21: Slew Rate vs. Temperature AV=+4, Rfb=910, VCC=6V, RL=25 600 500 400 300 Figure 24: Icc vs. Power Supply Open loop, no load 30 20 Icc(+) Slew Rate (V/s) 200 Positive&Negative SR Rfb=620 Positive&Negative SR Rfb=910 10 0 -100 -200 -300 -400 -500 -600 -40 ICC (mA) 100 0 -10 -20 Icc(-) -20 0 20 40 60 80 -30 0 1 2 3 4 5 6 7 8 9 10 11 12 Temperature (C) VCC (V) 10/27 TS616 Figure 25: Iib vs. Power Supply Open loop, no load 7 Figure 28: Iib(+) vs. Temperature Open loop, no load 8 6 IB+ 7 6 5 Vcc=6V 5 IB (A) 4 IIB(+) (A) IB - 4 3 2 Vcc=2.5V 1 0 3 2 1 0 5 6 7 8 9 10 11 12 -1 -40 -20 0 20 40 60 80 Vcc (V) Temperature (C) Figure 26: Iib(-) vs. Temperature Open loop, no load 5 Figure 29: Voh & Vol vs. Power Supply Open loop, RL=25 6 5 4 VOH 4 Vcc=6V 3 2 1 0 -1 -2 -3 3 IIB(-) (A) VOH & VOL (V) VOL 2 Vcc=2.5V 1 -4 -5 0 -40 -6 -20 0 20 40 60 80 5 6 7 8 9 10 11 12 Temperature (C) Vcc (V) Figure 27: Icc vs. Temperature Open loop, no load Figure 30: Voh vs. Temperature Open loop 6 14 12 10 8 6 4 Icc(+) for Vcc=6V Icc(+) for Vcc=2.5V 5 4 ICC (mA) VOH (V) 2 0 -2 -4 -6 -8 -10 -12 -14 -40 -20 0 20 40 60 80 Icc(-) for Vcc=6V Icc(-) for Vcc=2.5V Vcc=6vV Load=25 3 2 1 Vcc=2.5V Load=10 0 -40 -20 0 20 40 60 80 Temperature (C) Temperature (C) 11/27 TS616 Figure 31: Vol vs. Temperature Open loop 0 Vcc=2.5V Load=10 Figure 34: CMR vs. Temperature Open loop, no load 70 68 66 Vcc=6V -1 -2 64 -3 CMR (dB) VOL (V) 62 60 58 56 54 52 Vcc=2.5V -4 Vcc=6V Load=25 -5 -6 -40 -20 0 20 40 60 80 50 -40 -20 0 20 40 60 80 Temperature (C) Temperature (C) Figure 32: Differential Vio vs. Temperature Open loop, no load 450 Figure 35: SVR vs. Temperature Open loop, no load 84 400 Vcc=2.5V 82 Vcc=6V VIO (V) SVR (dB) Vcc=6V 350 80 300 78 250 76 200 -40 Vcc=2.5V -20 0 20 40 60 80 -40 -20 0 20 40 60 80 Temperature (C) Temperature (C) Figure 33: Vio vs. Temperature Open loop, no load 2.0 Vcc=6V 1.5 Figure 36: Iout vs. Temperature Open loop, VCC=6V, RL=10 300 250 200 150 100 50 Isource Iout (mA) VIO (mV) 1.0 0 -50 -100 -150 -200 -250 0.5 Isink 0.0 Vcc=2.5V -0.5 -40 -300 -350 -400 40 60 80 -450 -40 -20 0 20 40 60 80 -20 0 20 Temperature (C) Temperature (C) 12/27 TS616 Figure 37: Iout vs. Temperature Open loop, VCC=2.5V, RL=25 300 250 200 150 100 50 600 Figure 40: Isource vs. Output Amplitude. VCC=2.5V, Open Loop, no Load 700 Isource Iout (mA) 0 -50 -100 -150 -200 -250 -300 -350 -400 -450 -40 -20 0 20 40 60 80 Isource (mA) 500 400 300 Isink 200 100 0 0.0 0.5 1.0 1.5 2.0 2.5 Temperature (C) Vout (V) Figure 38: Maximum Output Amplitude vs. Load AV=+4, Rfb=620, VCC=6V 12 Figure 41: Isink vs. Output Amplitude VCC=6V, Open Loop, no Load 0 Vcc=6V 10 -100 VOUT-MAX (VP-P) 8 -200 Isink (mA) Vcc=2.5V 0 50 100 150 200 -300 6 -400 4 -500 2 -600 0 -700 -6 -5 -4 -3 -2 -1 0 RLOAD () Vout (V) Figure 39: Isink vs. Output Amplitude. VCC=2.5V, Open Loop, no Load 0 Figure 42: Isource vs. Output Amplitude VCC=6V, Open Loop, no Load 700 -100 600 -300 Isource (mA) -2.0 -1.5 -1.0 -0.5 0.0 -200 500 Isink (mA) 400 -400 300 -500 200 -600 100 -700 -2.5 0 0 1 2 3 4 5 6 Vout (V) Vout (V) 13/27 TS616 Figure 43: Group Delay VCC=6V, VCC=2.5V SAFE OPERATING AREA Figure 44: Safe Operating Area 100 90 80 70 60 50 40 30 20 10 Delay (ns) Av=4 Vcc=6V, Rfb=620, Load=25 Vcc=2.5V, Rfb=910, Load=10 IF Bw = 10Hz Smoothing=19.247MHz on 10ns/div scale 100 700 90 600 80 Delay (ns) VINPUT (mVRMS) 70 500 60 400 50 300 40 200 30 100 20 Vcc=+/-6V Ta=25C G=12dB RL=100 Av=4 Vcc=6V, Rfb=620, Load=25 Vcc=2.5V, Rfb=910, Load=10 IF Bw = 10Hz Smoothing=19.247MHz on 10ns/div scale SAFE OPERATING AREA 300k 1M 10M 50M Frequency (Hz) 10 0 300k 1M 1M 10M 10M 50M 100M Frequency (Hz) Frequency (Hz) Figure 44 shows the safe operating condition. This curve shows the input level vs. the input frequency. It's necessary to consider this characteristic to guarantee the design. In the dash-lined zone, the consumption increases. Moreover, this increased consumption could do damage to the chip if the temperature increases. 14/27 TS616 INTERMODULATION DISTORTION PRODUCT Non-ideal output of the amplifier can be described by the following series: 2 n Vout = C 0 + C 1 V in + C 2 V in + ...C n V in In this expression, we recognize the second order intermodulation IM2 by the frequencies (1-2) and (1+2) and the third order intermodulation IM3 by the frequencies (21-2), (21+2), (-1+22) and (1+22). The measurement of the intermodulation product of the driver is achieved by using the driver as a mixer by a summing amplifier configuration. In this way, the non-linearity problem of an external mixing device is avoided. Figure 45: Non-inverting Summing Amplifier for Intermodulation measurements due to non-linearity in the input-output amplitude transfer, where the input is Vin=Asint, C0 is the DC component, C1(Vin) is the fundamental and Cn is the amplitude of the harmonics of the output signal Vout. A one-frequency (one-tone) input signal contributes to harmonic distortion. A two-tone input signal contributes to harmonic distortion and intermodulation product. The study of the intermodulation/distortionfor a two-tone input signal is the first step in characterizing the driving capability of multi-tone input signals. In this case : + C ( A sin t + B sin t ) 2 1 2 2 n 1k 49.9 Vin1 1k + _ +Vcc 49.9 1/2TS616 1:2 50 100 49.9 910 Vin1 300 Rout1 Vout diff. 100 Rout2 910 2:1 50 1:2 50 100 300 ... + C ( A sin t + B sin t ) n 1 2 V = A sin t + B sin t in 1 2 49.9 1k _ 49.9 1/2TS616 + -Vcc 1k V o ut = C 0 + C 1 ( A sin 1 t + B sin 2 t ) 49.9 and : + C1 ( A sin 1 t + B sin 2 t ) C2 2 2 - ------- A cos 2 t + B cos 2 t 2 1 2 + 2 C2 AB ( cos ( 1 - 2 )t - cos ( 1 - 2 ) t ) C3 + 3 ------- 4 3 3 + C3 A sin 3 1 t + B sin 3 2 t 2 3C A B 1 3 + ----------------------- sin ( 2 1 - 2 )t - -- sin ( 2 1 + )t 2 2 2 2 3C A B 3 1 + ----------------------- sin ( - + 2 ) t - -- sin ( + 2 )t 1 1 2 2 22 ... + C n ( V in ) n The following graphs show the IM2 and the IM3 of the amplifier in different configurations. The two-tone input signal was generated by the multisource generator Marconi 2026. Each tone has the same amplitude. The measurement was performed using a HP3585A spectrum analyzer. A 2 + B2 V out = C 0 + C 2 -------------------- 2 A3 sin t + B 3 sin t + 2A 2 B sin t + 2AB 2 sin t 2 1 2 1 15/27 TS616 Figure 46: Intermodulation vs. Output Amplitude 370kHz & 400kHz, AV=+1.5, Rfb=1k, RL=14 diff.,VCC=2.5V Figure 49: Intermodulation vs. Load 370kHz & 400kHz, AV=+1.5, Rfb=1k, Vout=6.5Vpp,V CC=2.5V -30 -30 -40 -50 IM3 340kHz, 430kHz, 1140kHz, 1170kHz -40 IM2 and IM3 (dBc) -50 IM2 770kHz IM3 340kHz, 430kHz IM2 30kHz IM2 and IM3 (dBc) -60 -70 -80 -90 -60 IM2 30kHz IM2 770kHz -70 -80 -90 IM3 1140kHz, 1170kHz 0 1 2 3 4 5 6 7 8 -100 -110 0 20 40 60 80 100 120 140 160 180 200 -100 Differential Output Voltage (Vp-p) Differential Load () Figure 47: Intermodulation vs. Output Amplitude 370kHz & 400kHz, AV=+1.5, Rfb=1k, RL=28 diff.,VCC=2.5V -30 Figure 50: Intermodulation vs. Output Amplitude 100kHz & 110kHz, AV=+4, Rfb=620, RL=200 diff.,VCC=6V -30 -40 -50 IM3 90kHz, 120kHz IM3 310kHz IM3 320kHz -40 IM2 and IM3 (dBc) IM2 and IM3 (dBc) -50 -60 -70 -80 -90 -100 -110 IM2 210kHz -60 IM3 340kHz, 430kHz IM2 30kHz IM2 770kHz -70 -80 -90 IM3 1140kHz, 1170kHz 0 1 2 3 4 5 6 7 8 -100 2 4 6 8 10 12 14 16 18 20 22 Differential Output Voltage (Vp-p) Differential Output Voltage (Vp-p) Figure 48: Intermodulation vs. Gain 370kHz & 400kHz, RL=20 diff., Vout=6Vpp, VCC=2.5V Figure 51: Intermodulation vs. Output Amplitude 100kHz & 110kHz, AV=+4, Rfb=620, RL=50 diff., VCC=6V -30 -40 -50 IM3 340kHz, 430kHz, 1140kHz, 1170kHz -30 -40 -50 IM3 90kHz, 120kHz, 310kHz, 320kHz IM2 and IM3 (dBc) IM2 and IM3 (dBc) -60 -70 -80 -90 -100 -110 1.0 IM2 30kHz -60 -70 -80 -90 -100 -110 IM2 210kHz IM2 770kHz 1.5 2.0 2.5 3.0 3.5 4.0 2 4 6 8 10 12 14 16 18 20 22 Closed Loop Gain (Linear) Differential Output Voltage (Vp-p) 16/27 TS616 Figure 52: Intermodulation vs. Frequency Range AV=+4, Rfb=620, RL=50 diff., Vout=16Vpp, VCC=6V Figure 54: Intermodulation vs. Output Amplitude 370kHz & 400kHz, AV=+4, Rfb=620, RL=50 diff., VCC=6V -60 -65 -70 -75 f1=100kHz f2=110kHz f1=200kHz f2=230kHz f1=400kHz f2=430kHz -30 Quadratic Summation of all IM2 and IM3 components generated by each two-tones signal -40 -50 IM3 1140kHz, 1170kHz IM3 340kHz, 430kHz IM2 30kHz IM2 770kHz IM2 and IM3 (dBc) f1=1MHz f2=1.1MHz -60 -70 -80 -90 -100 -110 (dB) -80 -85 -90 -95 -100 100k 200k 300k 400k 500k 600k 700k 800k 900k 1M 1.1M 1M 0 2 4 6 8 10 12 14 16 18 20 22 Frequency (Hz) Differential Output Voltage (Vp-p) Figure 53: Intermodulation vs. Output Amplitude 370kHz & 400kHz, AV=+4, Rfb=620, RL=200 diff.,VCC=6V -30 -40 -50 IM2 770kHz IM2 and IM3 (dBc) IM2 30kHz IM3 1140kHz, 1170kHz -60 -70 -80 -90 -100 -110 0 2 4 6 IM3 340kHz, 430kHz 8 10 12 14 16 18 20 22 Differential Output Voltage (Vp-p) 17/27 TS616 PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS In the ADSL frequency range, printed circuit board parasites can affect the closed-loop performance. The implementation of a proper ground plane on both sides of the PCB is mandatory to provide low inductance and low resistance common return. The most important factors affecting gain flatness and bandwidth are stray capacitances at the output and inverting input. To minimize these capacitances, the space between signal lines and ground plane should be increased. Feedback components connections must be as short as possible in order to decrease the associated inductance which affects high frequency gain errors. It is very important to choose the smallest possible external components, for example, surface mounted devices (SMD) in order to minimize the size of all DC and AC connections. THERMAL INFORMATION The TS616 is housed in an Exposed-Pad plastic package. As depicted in figure 55, this package uses a lead frame upon which the die is mounted. This lead frame is exposed as a thermal pad on the underside of the package. The thermal contact is direct with the dice. This thermal path provides excellent colling. The thermal pad is electrically isolated from all pins in the package. It should be soldered to a copper area of the PCB underneath the package. Through these thermal paths within this copper area, heat can be conducted away from the package. In this case, the copper area should be connected to (-VCC). Figure 55: Exposed-Pad Package 1 DICE Side View Bottom View DICE Cross Section View Figure 56: Evaluation Board 18/27 TS616 Figure 57: Schematic Diagram R201 J205 R206 3 + Non-Inverting J206 R202 1 R216 R214 R211 R218 R220 J210 R207 3 + J206 R202 R207 1/2TS616 1/2TS616 2 _ 2 _ 1 R216 R214 R218 R220 J210 R203 R212 J207 R208 Inverting R215 R215 J208 7 R217 R204 R219 R221 J211 R209 6 _ J208 R204 R209 6 _ R211 1/2TS616 1/2TS616 7 R217 R219 R221 J211 5 + 5 + J209 R205 R210 R213 R213 Summing Amplifier R201 J205 R206 3 + J206 R202 R207 Differential Amplifier R207 R202 3 + 1/2TS616 2 _ 1 R216 R214 R218 R220 J210 J206 1/2TS616 2 _ 1 R216 R214 R218 R220 J210 R211 R212 Power Supply 100nF 100uF R215 C202 6 _ R211 +Vcc C205 +Vcc 100nF 8 3 2 + 1/2TS616 7 R217 R219 R221 J211 5 + J201 +Vcc J202 GND J303 -Vcc C203 100nF 100uF C201 1/2TS616 _ 1 4 C206 C204 J209 R205 R210 R213 -Vcc -Vcc Exposed-Pad 100nF +Vcc 1 J204 2 3 6 _ 1/2TS616 7 5 -Vcc + -Vcc 19/27 TS616 Figure 58: Component Locations - Top Side Figure 60: Top Side Board Layout Figure 59: Component Locations - Bottom Side Figure 61: Bottom Side Board Layout 20/27 TS616 NOISE MEASUREMENT Figure 62: Noise Model The output noise eNo is calculated using the Superposition Theorem. However it is not the simple sum of all noise sources. The square root of the sum of the square of each noise source. TS616 _ output k is the Boltzmann's constant, equal 1,374.10-23J/K. T is the temperature (K). to + R3 iN+ eN eNo = HP3577 Input noise: 8nV/Hz 2 2 2 2 2 2 V1 + V2 + V3 + V4 + V5 + V6 ,( eq1 ) N3 iN- N2 R1 R2 2 2 2 2 2 2 2 = eN x g + iNn x R2 + iNp x R3 x g R2 2 R2 2 ... + ------ x 4kTR1 + 4kTR2 + 1 + ------ x 4kTR3, ( eq2 ) R1 R1 eNo 2 N1 The input noise of the instrumentation must be extracted from the measured noise value. The real output noise value of the driver is: eNo = 2 2 ( Measured ) - ( instrumentation ) , ( eq3 ) eN : input voltage noise of the amplifier iNn : negative input current noise of the amplifier iNp : positive input current noise of the amplifier The closed loop gain is : R fb A V = g = 1 + --------R g The input noise is called the Equivalent Input Noise as it is not directly measured but it is evaluated from the measurement of the output divided by the closed loop gain (eNo/g). After simplification of the fourth and the fifth term of (eq2) we obtain: eNo 2 2 2 2 2 2 2 2 = eN x g + iNn x R2 + iNp x R3 x g R2 2 ... + g x 4kTR2 + 1 + ------ x 4kTR3, ( eq4 ) R1 The six noise sources are : R2 V1 = eN x 1 + ------ R1 V2 = iNn x R 2 Measurement of eN: We assume a short-circuit on the non-inverting input (R3=0). (eq4) comes: eNo = 2 2 2 2 eN x g + iNn x R2 + g x 4kTR2, ( eq5 ) R2 V3 = iNp x R3 x 1 + ------ R1 R2 V4 = - ------ x 4kTR1 R1 In order to easily extract the value of eN, the resistance R2 will be chosen as low as possible. In the other hand, the gain must be large enough. R1=10, R2=910, R3=0, Gain=92 Equivalent Input Noise: 2.57nV/Hz Input Voltage Noise: eN=2.5nV/Hz Measurement of iNn: R3=0 and the output noise equation is still the (eq5). This time the gain must be decreased to decrease the thermal noise contribution. R1=100, R2=910, R3=0, Gain=10.1 Equivalent Input Noise: 3.40nV/Hz Negative Input Current Noise: iNn =21pA/Hz Measurement of iNp: To extract iNp from (eq3), a resistance R3 is connected to the non-inverting input. The value of R3 must be chosen in order to keep its thermal noise V5 = 4 kTR2 R2 V6 = 1 + ------ 4kTR3 R1 We assume that the thermal noise of a resistance R is: wher F is the specified bandwidth. On 1Hz bandwidth the thermal noise is reduced to 4kTR 4kTRF 21/27 TS616 contribution as low as possible against the iNp contribution. R1=100, R2=910, R3=100, Gain=10.1 Equivalent Input Noise: 3.93nV/Hz Positive Input Current Noise: iNp=15pA/Hz Conditions: frequency=100kHz, VCC =2.5V Instrumentation: Spectrum Analyzer HP3585A (input noise of the HP3585A: 8nV/Hz) The following figure shows the case of a 5V single power supply configuration Figure 64: Circuit for +5V single supply +5V 10F IN +5V Rin 1k + 1/2 TS616 100F OUT 10 _ POWER SUPPLY BYPASSING Correct power supply bypassing is very important for optimizing the performance in high frequency ranges. Bypass capacitors should be placed as close as possible to the IC pins to improve high frequency bypassing. A capacitor greater than 1F is necessary to minimize the distortion. For a better quality bypassing a capacitor of 10nF can be added using the same implementation conditions. Bypass capacitors must be incorporated for both the negative and the positive supply. Figure 63: Circuit for Power Supply Bypassing +VCC + 10nF 10F R1 820 Rfb R2 820 + 1F 10nF + RG CG The TS616 operates with power supplies from 12V down to 5V. This can be achieved by either a dual power supplies of 6V or 2.5V or a single power supply of 12V or 5V referenced to the ground. In the case of asymmetrical supply, a new biasing is necessary to assume a positive output dynamic range between 0V and +VCC supply rails. Considering the values of VOH and VOL, the amplifier will provide an output dynamic from +0.5V to 10.6V on 25 load for a 12V supply and from 0.45V to 3.8V on 10 load for a 5V supply. The amplifier must be biased with a mid-supply (nominally +VCC/2), in order to maintain the DC component of the signal at this value. Several options are possible to provide this bias supply, such as a virtual ground using an operational amplifier or a two-resistance divider (which is the cheapest solution). A high resistance value is required to limit the current consumption. On the other hand, the current must be high enough to bias the non-inverting input of the amplifier. If we consider + TS616 - 10nF 10F + -VCC SINGLE POWER SUPPLY 22/27 TS616 this bias current (30A max.) as the 1% of the current through the resistance divider to keep a stable mid-supply, two resistances of 2.2k can be used in the case of a 12V power supply and two resistances of 820 can be used in the case of a 5V power supply. The input provides a high pass filter with a break frequency below 10Hz which is necessary to remove the original 0 volt DC component of the input signal, and to fix it at +VCC/2. CHANNEL SEPARATION - CROSSTALK The following figure shows the crosstalk from an amplifier to a second amplifier. This phenomenon, accentuated at high frequencies, is unavoidable and intrinsic to the circuit. Nevertheless, the PCB layout also has an effect on the crosstalk level. Capacitive coupling between signal wires, distance between critical signal nodes and power supply bypassing are the most significant factors. Figure 65: Crosstalk vs. Frequency AV=+4, Rfb=620, VCC=6V, Vout=2Vp -50 -60 -70 -80 -90 -100 -110 CHOICE OF THE FEEDBACK CIRCUIT Table 1: Closed-Loop Gain - Feedback Components VCC (V) Gain +1 +2 +4 +8 -1 -2 -4 -8 +1 +2 +4 +8 -1 -2 -4 -8 Rfb () 750 680 620 510 680 680 620 510 1.1k 1k 910 680 1k 1k 910 680 6 2.5 INVERTING AMPLIFIER BIASING In this case a resistance R is necessary to achieve good input biasing, see Figure 66. This resistance is calculated by assuming the negative and positive input bias current. The aim is to compensate for the offset bias current which could affect the input offset voltage and the output DC component. Assuming Ib-, Ib+, Rin, Rfb and a zero volt output, the resistance R comes: R = Rin // Rfb . Figure 66: Compensation of the Input Bias Current CrossTalk (dB) Rfb -120 -130 10k Ib100k 1M 10M Rin _ Vcc+ Output TS616 Frequency (Hz) + Ib+ R Vcc- Load 23/27 TS616 ACTIVE FILTERING Figure 67: Low-Pass Active Filtering. Sallen-Key preferable to use very stable resistors and capacitances values. In the case of R1=R2: C1 R1 IN R2 C2 + OUT TS616 R fb 2C - C --------2 1R g = ----------------------------------2CC 12 25 _ RG Rfb 910 INCREASING THE LINE LEVEL BY USING AN ACTIVE IMPEDANCE MATCHING With passive matching, the output signal amplitude of the driver must be twice the amplitude on the load. To go beyond this limitation, active matching impedance can be used. With this technique, it is possible to keep good impedance matching with an amplitude on the load higher than half of the output driver amplitude. This concept is shown in Figure 68 for a differential line. Figure 68: TS616 as a differential line driver with an active impedance matching The resistors Rfb and RG give the gain of the filter as a classical non-inverting amplification configuration : A V R fb = g = 1 + --------Rg Assume the following expression is the response of the system: Vout j g T j = ------------------- = --------------------------------------------Vinj 2 j ( j ) 1 + 2 ------ + ------------2 c c 1 100n + Vcc+ 1k _ Vcc+ GND Rs1 10n R2 R3 Vi 1/2 R1 Vo Vo 1:n Hybrid & Transformer Vcc/2 RL Vo 100 the cut-off frequency is not gain-dependent and it becomes: 1 c = ------------------------------------R1R2C 1C2 1/2 R1 R5 Vi 1k 10 100n Vo GND + _ 100n R4 Vcc+ GND Rs2 The damping factor becomes: 1 = -- c ( C1 R 1 + C1 R 2 + C2 R 1 - C1 R 1 g ) 2 The higher the gain, the more sensitive the damping factor is. When the gain is higher than 1 it is 24/27 TS616 Component Calculation Let us consider the equivalent circuit for a single-ended configuration as shown in Figure 69. Figure 69: Single ended equivalent circuit 2R2 R2 Vi 1 + ----------- + ------- R1 R3 Rs1Iout Vo = ----------------------------------------------- - ---------------------- ,( eq3 ) R2 R2 1 - ------1 - ------R3 R3 + Vi By identification of both equations (eq2) and (eq3), the synthesized impedance is, with Rs1=Rs2=Rs: Rs1 Vo Vo _ R2 Rs Ro = ---------------- ,( eq4 ) R2 1 - ------R3 -1 R3 1/2 R1 1/2 RL Figure 70: Equivalent schematic. Ro is the synthesized impedance. Ro Iout Let us consider the unloaded system. Assuming the currents through R1, R2 and R3 are respectively: 2Vi ( Vi - Vo ) ( Vi + Vo ) -------- , -------------------------- and -----------------------R1 R2 R3 Vi.Gi 1/2RL as Vo equals Vo without load, the gain in this case becomes : 2R2 R2 1 + ----------- + ------Vo ( noload ) R1 R3 G = -------------------------------- = -----------------------------------Vi R2 1 - ------R3 Unlike the level Vo required for a passive impedance, Vo will be smaller than 2Vo in our case. Let us write Vo=kVo with k the matching factor varying between 1 and 2. Assuming that the current through R3 is negligible, (eq4) becomes the following : kV oRL Ro = ----------------------------RL + 2R s1 The gain, for the loaded system will be (eq1): 2 R2 R2 1 + ----------- + ------Vo ( with load ) 1 R1 R3 GL = ------------------------------------- = -- ------------------------------------ ,( eq1 ) Vi 2 R2 1 - ------R3 After choosing the k factor, Rs will equal to 1/2RL(k-1). A good impedance matching assumes: 1 R o = -- RL ,( eq5 ) 2 As shown in Figure70, this system is an ideal generator with a synthesized impedance as the internal impedance of the system. From this, the output voltage becomes: Vo = ( ViG ) - ( RoIout ) ,( eq2 ) (eq4) and (eq5) give : R2 2Rs ------- = 1 - ---------- ,( eq6 ) R3 RL By fixing an arbitrary value of R2, (eq6) becomes : R2 R3 = -------------------2Rs 1 - ---------RL with Ro the synthesized impedance and Iout the output current. On the other hand Vo can be expressed as: Finally, the values of R2 and R3 allow us to extract R1 from (eq1), and it becomes: 25/27 TS616 2R2 R1 = ---------------------------------------------------------- ,( eq7 ) 1 - R2 GL - 1 - R2 2 ------------ R3 R3 with GL the required gain. Table 2 : Components Calculation for Impedance Matching Implementation GL (gain for the loaded system) R1 R2 (=R4) R3 (=R5) Rs Load viewed by each driver GL is fixed for the application requirements GL=Vo/Vi=0.5(1+2R2/R1+R2/R3)/(1-R2/R3) 2R2/[2(1-R2/R3)GL-1-R2/R3] Abritrary fixed R2/(1-Rs/0.5RL) 0.5RL(k-1) kRL/2 26/27 TS616 PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO Exposed-Pad) Millimeters Dim. Min. A A1 A2 B C D D1 E E1 e H h L k ddd 1.350 0.000 1.100 0.330 0.190 4.800 3.10 3.800 2.41 1.270 5.800 0.250 0.400 0d 6.200 0.500 1.270 8d 0.100 0.228 0.010 0.016 0d 4.000 0.150 Typ. Max. 1.750 0.250 1.650 0.510 0.250 5.000 Min. 0.053 0.001 0.043 0.013 0.007 0.189 Inches Typ. Max. 0.069 0.010 0.065 0.020 0.010 0.197 0.122 0.157 0.095 0.050 0.244 0.020 0.050 8d 0.004 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com 27/27 |
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