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TSH343
280MHz Single-Supply Triple Video Buffer

Bandwidth: 280MHz 5V single-supply operation Internal input DC level shifter No input capacitor required Internal gain of 6dB for a matching between 3 channels Very low harmonic distortion Slew rate: 780V/s Specified for 150 and 100 loads Tested on 5V power supply Data min. and max. are tested during production
Pin Connections (top view)
Pin1 identification
Top View
IN1 1
6dB
8 OUT1
Description
The TSH343 is a triple single-supply video buffer featuring an internal gain of 6dB and a large bandwidth of 280MHz. The main advantage of this circuit is that its input DC level shifter allows for video signals on 75 video lines without damage to the synchronization tip of the video signal, while using a single 5V power supply with no input capacitor. The DC level shifter is internally fixed and optimized to keep the output video signals between low and high output rails in the best position for the greatest linearity. Chapter 4 of this datasheet gives technical support when using the TSH343 as Y-Pb-Pr driver for video DAC output on a video line (see TSH344 for RGB signals). The TSH343 is available in the compact SO8 plastic package for optimum space-saving.
IN2 2
6dB
7 OUT2
IN3 3
DC Shifter
6dB
6 OUT3 5 GND
+Vcc 4
SO8
Applications

High-end video systems High Definition TV (HDTV) Broadcast and graphic video Multimedia products
Order Codes
Part Number TSH343ID TSH343IDT Temperature Range -40C to +85C Package SO-8 Packing Tube Tape & Reel Marking TSH343I TSH343I
January 2006
Rev. 2
1/14
www.st.com
14
Absolute Maximum Ratings
TSH343
1
Table 1.
Symbol VCC Vin Toper Tstd Tj Rthjc Rthja Pmax. ESD
Absolute Maximum Ratings
Key parameters and their absolute maximum ratings
Parameter Supply voltage
(1)
Value 6 0 to +1.4 -40 to +85 -65 to +150 150 28 157 800 2 1.5 200
Unit V V C C C C/W C/W mW kV kV V
Input Voltage Range (2) Operating Free Air Temperature Range Storage Temperature Maximum Junction Temperature SO8 Thermal Resistance Junction to Case SO8 Thermal Resistance Junction to Ambient Area Maximum Power Dissipation (@Ta=25C) for Tj=150C CDM: Charged Device Model HBM: Human Body Model MM: Machine Model
1. All voltage values, except differential voltage, are with respect to network terminal. 2. The magnitude of input and output voltage must never exceed VCC +0.3V.
Table 2.
Symbol VCC
Operating conditions
Parameter Power Supply Voltage Value 3 to 5.5(1) Unit V
1. Tested in full production at 0V/5V single power supply
2/14
Rev. 2
TSH343
Electrical Characteristics
2
Table 3.
Symbol
Electrical Characteristics
VCC = +5V Single Supply, Tamb = 25C (unless otherwise specified)
Parameter Test Condition Min. Typ. Max. Unit
DC Performance VDC Input DC shift RL = 150, Tamb -40C < Tamb < +85C Input Bias Current Input Resistance Input Capacitance Supply Current per Buffer -40C < Tamb < +85C Power Supply Rejection Ratio 20 log (Vout/VCC) (see Figure 25 and Figure 26) DC Voltage Gain Variation of the DC Voltage Gain between inputs of 0.3V and 1V Gain Matching between 3 channels Gain Matching between 3 channels input to GND, F = 1MHz CLF=470nF CHF=100uF RL = 150, Vin = 1V Input step from 0.3V to 1V Input = 1V Input = 0.3V 1.92 14.9 70 1.99 0.26 0.5 0.5 2.05 0.8 2 2 dB V/V % % % Tamb , input to GND -40C < Tamb < +85C Tamb Tamb no Load, input to GND ICC 0.4 0.6 0.53 18.2 20.7 4 1 14.4 18 mA 35 A G pF 0.8 mV
Iib Rin Cin
PSRR G DG MG1 MG 0.3
Dynamic Performance and Output Characteristics -3dB Bandwidth Bw Gain Flatness @ 0.1dB FPBW D SR VOH VOL Full Power Bandwidth Delay between each channel (see Figure 30) Slew Rate (1) High Level Output Voltage Low Level Output Voltage Output Current IOUT Output Short Circuit Current (Isource) Small Signal Vout = 20mVp RL = 150 Small Signal Vout = 20mVp RL = 150 Vout = 2Vp-p, VICM = 0.5V, RL = 150 0 to 30MHz Input step from 0V to 1V, RL = 150 Vin DC = +1.5V, R L = 150 RL = 150 Vout = 2V, Tamb -40C < Tamb < +85C 45 500 3.7 130 160 280 MHz 65 200 0.5 780 3.9 40 90 mA 82 100 mA MHz ns V/s V mV
Rev. 2
3/14
Electrical Characteristics Table 3.
Symbol Noise and Distortion F = 100kHz, R IN = 50 eN Total Input Voltage Noise 10kHz to 30MHz 10kHz to 100MHz Vout = 2Vp-p, RL = 150 F= 10MHz F= 30MHz Vout = 2Vp-p, RL = 150 F= 10MHz F= 30MHz 29 158 290 -58 -45 -72 -50
TSH343
VCC = +5V Single Supply, Tamb = 25C (unless otherwise specified)
Parameter Test Condition Min. Typ. Max. Unit
nV/Hz Vrms
HD2
2nd Harmonic Distortion
dBc
HD3
3rd Harmonic Distortion
dBc
1. Non-tested value. Guaranteed value by design.
4/14
Rev. 2
TSH343 Figure 1.
10 8 6 4
Electrical Characteristics Frequency response Figure 2.
6,20 6,15 6,10 6,05
Gain flatness
Gain (dB)
2 0 -2 -4 -6 -8 -10 1M
Gain (dB)
Vcc=5V Load=150
10M 100M 1G
6,00 5,95 5,90 5,85 5,80 5,75 5,70 1M
Vcc=5V Load=150
10M 100M 1G
Frequency (Hz)
Frequency (Hz)
Figure 3.
0 -10 -20 -30
Cross-talk vs. frequency (amp1)
Figure 4.
0
Cross-talk vs. frequency (amp2)
Small Signal Vcc=5V Load=150
-10 -20 -30
Small Signal Vcc=5V Load=150
Gain (dB)
-50 -60 -70 -80 -90 -100 1M
Gain (dB)
-40
-40 -50 -60 -70
2/1 2/3
1/2
1/3
-80 -90 -100 1M
10M
100M
10M
100M
Frequency (Hz)
Frequency (Hz)
Figure 5.
0 -10 -20 -30
Cross-talk vs. frequency (amp3)
Figure 6.
Input noise vs. frequency
Vcc=5V input in short-circuit
Input Noise (nV/VHz)
Small Signal Vcc=5V Load=150
Gain (dB)
-40 -50 -60 -70 -80 -90 -100 1M
100
NA
3/1 3/2
10M
100M
10 10
100
1k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
Rev. 2
5/14
Electrical Characteristics Figure 7.
-30 -35 -40 -45
TSH343 Figure 8.
-30 -35 -40 -45
Distortion on 150 load - 10MHz
Distortion on 100 load - 10MHz
HD2 & HD3 (dBc)
-55 -60 -65 -70 -75 -80 -85 -90 -95 -100 0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0 HD3 HD2
HD2 & HD3 (dBc)
-50
Vcc=5V F=10MHz input DC component = 0.65V Load=150
-50 -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 0,0
Vcc=5V F=10MHz input DC component = 0.65V Load=100
HD2
HD3
0,5
1,0
1,5
2,0
2,5
3,0
3,5
4,0
Output Amplitude (Vp-p)
Output Amplitude (Vp-p)
Figure 9.
-10 -15 -20 -25
Distortion on 150 load - 30MHz
Figure 10. Distortion on 100 load - 30MHz
-10 -15 -20 -25
HD2 & HD3 (dBc)
-35 -40 -45 -50 -55 -60 -65 -70 -75 -80 0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0 HD3 HD2
HD2 & HD3 (dBc)
-30
Vcc=5V F=30MHz input DC component = 0.65V Load=150
-30 -35 -40 -45 -50 -55 -60 -65 -70 -75 -80 0,0
Vcc=5V F=30MHz input DC component = 0.65V Load=100
HD2
HD3
0,5
1,0
1,5
2,0
2,5
3,0
3,5
4,0
Output Amplitude (Vp-p)
Output Amplitude (Vp-p)
Figure 11. Output DC shift vs. frequency
1,4
Figure 12. Slew rate
3,5
3,0
Output Response (V)
1,2
SR+
2,5
Gain (dB)
2,0
1,0
1,5
SR-
0,8
1,0
Vcc=5V Load=150
0,6 1M 10M 100M
0,5
Vcc=5V Load=150
-5 -4 -3 -2 -1 0 1 2 3 4 5
0,0
Frequency (Hz)
Time (ns)
6/14
Rev. 2
TSH343 Figure 13. Reverse isolation vs. frequency
0 -10 -20 400 -30 350 300 250 200 -80 -90 -100 1M 150 100 -40
Electrical Characteristics Figure 14. Bandwidth vs. temperature
500
Vcc=5V Load=100
450
Gain (dB)
-50 -60 -70
Bw (MHz)
-40
Vcc=5V Load=150
-20 0 20 40 60 80
10M
100M
Frequency (Hz)
Temperature (C)
Figure 15. Quiescent current vs. Supply
50 45 40 35
Figure 16. Input DC shift vs. temperature
0,8
Vcc=5V Input to ground, no load
0,7
Total Icc (mA)
0,6 30 25 20 15 10 0,3 5 0 0,0 0,2 -40
DCshift (V)
0,5
0,4
Vcc=5V Load=150
-20 0 20 40 60 80
0,5
1,0
1,5
2,0
2,5
3,0
3,5
4,0
4,5
5,0
Vcc (V)
Temperature (C)
Figure 17. Isource vs. output voltage
0 -10 -20 -30
Isource +5V VOH
without load
Figure 18. Voltage gain vs. temperature
2,05 2,04 2,03 2,02
Isource (mA)
-40 -50 -60 -70 -80 -90 -100 -110 -120 0,0 0,5 1,0 1,5 2,0
0V
V
Gain (dB)
2,01 2,00 1,99 1,98 1,97 1,96 1,95 -40
Vcc=5V Load=150
-20 0 20 40 60 80
2,5
3,0
3,5
4,0
4,5
5,0
V (V)
Temperature (C)
Rev. 2
7/14
Electrical Characteristics Figure 19. Ibias vs. temperature
24 22 20
TSH343 Figure 20. Gain deviation vs. temperature
1,0
0,8
Gain deviation between 0.3V and 1V input voltages Vcc=5V Load=150
IBIAS (A)
18 16 14
GD (%)
Vcc=5V Load=150
-20 0 20 40 60 80
0,6
0,4
0,2 12
10 -40
0,0 -40
-20
0
20
40
60
80
Temperature (C)
Temperature (C)
Figure 21. Supply current vs. temperature
17
Figure 22. Output current vs. temperature
110
16
100
15
14
Isource (mA)
Vcc=5V no Load
-20 0 20 40 60 80
90
ICC (mA)
80
13
70
12 60
11
Vcc=5V Load=150
-20 0 20 40 60 80
10 -40
50 -40
Temperature (C)
Temperature (C)
Figure 23. Output higher rail vs. temperature
4,2 4,1 4,0
Figure 24. Gain matching vs. temperature
1,0
0,8
Gain matching between 3 channels Vcc=5V Load=150 Vin=0.3V and 1V
VOH (V)
3,9 3,8 3,7
GM (%)
Vcc=5V Load=150
-20 0 20 40 60 80
0,6
0,4
0,2 3,6
3,5 -40
0,0 -40
-20
0
20
40
60
80
Temperature (C)
Temperature (C)
8/14
Rev. 2
TSH343
Power Supply Considerations and improvement of the PSRR
3
Power Supply Considerations and improvement of the PSRR
Correct power supply bypassing is very important for optimizing performance in low and high-frequency ranges. Bypass capacitors should be placed as close as possible to the IC pin (pin 4) to improve high-frequency bypassing. A capacitor (C LF) greater than 100uF is necessary to improve the PSRR in low frequencies. For better quality bypassing, a capacitor of 470nF (C HF) is added using the same implementation conditions to improve the PSRR in the higher frequencies. Figure 25. Circuit for power supply bypassing
+VCC CLF + CHF 4
Y Pb Pr
TSH343
5
The following graph in Figure 26 shows the evolution of the PSRR against the frequency when the power supply decoupling is achieved carefuly or not. Figure 26. PSRR improvement
0 -10 -20 -30 -40 -50 -60 -70 -80 1k 10k 100k 1M 10M 100M
Vcc=5V Load=150 PSRR=20 log (VCC/Vout) without capacitor without C LF C HF=100nF without C LF C HF=470nF C LF=100uF C HF=470nF
PSRR (dB)
Frequency (Hz)
Rev. 2
9/14
Using the TSH343 to Drive Y-Pb-Pr Video Components
TSH343
4
Using the TSH343 to Drive Y-Pb-Pr Video Components
Figure 27. Shapes of video signals coming from DACs
Y Video DAC Pb Pr Y signal (synchronization tip) 100 IRE
White Level Image Content Image Content
R Video DAC G B
R,G,B,Pb,Pr signals (no synchronization tip)
30 IRE
Black Level
300mV
1Vp-p
0 IRE
GND
Figure 28. Implementation of the video driver on output video DACs
(1) DAC output (2) Amplifier input (3) Amplifier output
Amplifier output rail (3.7V min.)
(4) On the line
Content of the video signal+ tip synchro.
3,24V 2Vp-p 1Vp-p 1,24V
Amplifier output rail (70mV max.)
1Vp-p 620mV 0V
1Vp-p 20mV 0V
620mV 0V
+600mV
0V
+5V
Video DAC
Y
1Vpp
Reconstruction Filtering 600mV
LPF
+
+6dB
75
75 Cable
1Vpp
TV
75
2Vpp
Video DAC
Pb
Reconstruction Filtering
600mV
LPF
0.7Vpp
+
+6dB
75
75 Cable
0.7Vpp
75
1.4Vpp
Video DAC
Pr
Reconstruction Filtering
600mV
LPF
0.7Vpp
+
+6dB
TSH343
75
75 Cable
0.7Vpp
75
1.4Vpp
-5V
GND
10/14
Rev. 2
TSH343
Using the TSH343 to Drive Y-Pb-Pr Video Components
Figure 28 shows a schematic diagram of the use of the TSH343 to drive video output from DACs.
The TSH343 is used to drive high definition video signals up to 30MHz on 75-ohm video lines. It is dedicated to driving YPbPr signals where the synchronization tip--close to zero volts--is included in Y signal, as seen in (1). An internal input DC value of 600mV is added to the video signal in order to shift the bottom from 0V to 600mV as seen in (2). The shift is not based on the average of the signal, but is an analog summation of a DC component to the video signal. Therefore, no input capacitors are required which provides a real advantage in terms of cost and board space. Under these conditions, it is possible to drive the signal in single supply without any saturation of the driver against the lower rail. Assuming that we lose half of the signal by output impedance-matching in order to properly drive the video line, the shifted signal is multiplied by a gain of 2 or +6dB (3).
4.1
Delay between channels
Figure 29. Measurement of the delay between each channel
5V
600mV
75 +6dB
75 Cable
+
V1 75
Vin 75
600mV
75 +6dB
75 Cable
+
V2 75 75
600mV
+
+6dB
75 Cable
V3 75
Delay between each video component is an important aspect in high definition video systems. To drive porperly the three video components without any relative delay, the dice of the TSH343 is layouted out with a very symetrical geometry. The effect is direct on the synchronization of each channel, as shown in Figure 30. No delay appears between each channel when the same Vin signal is applied on the three inputs. Note that the delay from the inputs the outputs equals 4ns.
Rev. 2
11/14
Using the TSH343 to Drive Y-Pb-Pr Video Components Figure 30. Relative delay between each channel
3 Output responses (V1, V2, V3)
TSH343
Vcc=5V Load=150
Input (Vin)
-4ns -2ns
0s
2ns
4ns
6ns
8ns 10ns 12ns 14ns 16ns 18ns 20ns
Time
12/14
Rev. 2
TSH343
Package Mechanical Data
5
Package Mechanical Data
SO-8 MECHANICAL DATA
DIM. A A1 A2 B C D E e H h L k ddd 0.1 5.80 0.25 0.40 mm. MIN. 1.35 0.10 1.10 0.33 0.19 4.80 3.80 1.27 6.20 0.50 1.27 8 (max.) 0.04 0.228 0.010 0.016 TYP MAX. 1.75 0.25 1.65 0.51 0.25 5.00 4.00 MIN. 0.053 0.04 0.043 0.013 0.007 0.189 0.150 0.050 0.244 0.020 0.050 inch TYP. MAX. 0.069 0.010 0.065 0.020 0.010 0.197 0.157
0016023/C
Rev. 2
13/14
Revision History
TSH343
6
Table 4.
Date
Revision History
Document revision history
Revision 1 2 Description of Changes First release of datasheet. Capa-load option paragraph deleted in page 11.
Dec. 2005 Jan. 2006
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
14/14
Rev. 2

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