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PD - 95213A IRF7821PBF HEXFET(R) Power MOSFET Applications l High Frequency Point-of-Load Synchronous Buck Converter for Applications in Networking & Computing Systems. l Lead-Free Benefits l Very Low RDS(on) at 4.5V VGS l Low Gate Charge l Fully Characterized Avalanche Voltage and Current VDSS 30V RDS(on) max 9.1mW@VGS= 10V Qg(typ.) 9.3nC S S S G 1 2 3 4 8 7 A A D D D D 6 5 Top View SO-8 Absolute Maximum Ratings Parameter VDS VGS ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C PD @TA = 70C TJ TSTG Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Max. 30 20 13.6 11 100 2.5 1.6 0.02 -55 to + 155 Units V f f c A W W/C C Linear Derating Factor Operating Junction and Storage Temperature Range Thermal Resistance RJL RJA g fg Junction-to-Ambient Junction-to-Drain Lead Parameter Typ. --- --- Max. 20 50 Units C/W Notes through are on page 10 www.irf.com 05/23/07 1 IRF7821PBF Static @ TJ = 25C (unless otherwise specified) Parameter BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th) IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Parameter Single Pulse Avalanche Energy Avalanche Current Min. Typ. Max. Units 30 --- --- --- 1.0 --- --- --- --- --- 22 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.025 7.0 9.5 --- - 4.9 --- --- --- --- --- 9.3 2.5 0.8 2.9 3.1 3.7 6.1 6.3 2.7 9.7 7.3 1010 360 110 --- --- 9.1 12.5 --- --- 1.0 150 100 -100 --- 14 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- pF nC nC V Conditions VGS = 0V, ID = 250A V/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 13A V VGS = 4.5V, ID = 10A VDS = VGS, ID = 250A e e mV/C A VDS = 24V, VGS = 0V nA S VDS = 24V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VDS = 15V, ID = 10A VDS = 15V VGS = 4.5V ID = 10A See Fig. 16 VDS = 10V, VGS = 0V VDD = 15V, VGS = 4.5V ns ID = 10A Clamped Inductive Load VGS = 0V VDS = 15V = 1.0MHz Max. 44 10 e Avalanche Characteristics EAS IAR dh Units mJ A Diode Characteristics Parameter IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)Ah Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Min. Typ. Max. Units --- --- --- --- --- --- --- --- 28 23 3.1 A 100 1.0 42 35 V ns nC Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 10A, VGS = 0V TJ = 25C, IF = 10A, VDD = 20V di/dt = 100A/s e e 2 www.irf.com IRF7821PBF 100 VGS 10V 4.5V 3.7V 3.5V 3.3V 3.0V 2.7V BOTTOM 2.5V TOP 100 ID, Drain-to-Source Current (A) 10 ID, Drain-to-Source Current (A) VGS 10V 4.5V 3.7V 3.5V 3.3V 3.0V 2.7V BOTTOM 2.5V TOP 10 1 2.5V 2.5V 20s PULSE WIDTH Tj = 25C 0.1 0.1 1 10 100 20s PULSE WIDTH Tj = 150C 1 0.1 1 10 100 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100.0 2.0 TJ = 150C RDS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current () ID = 13A VGS = 10V 10.0 1.5 T J = 25C (Normalized) 1.0 1.0 0.1 2.0 3.0 VDS = 15V 20s PULSE WIDTH 4.0 5.0 6.0 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 VGS, Gate-to-Source Voltage (V) T J , Junction Temperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRF7821PBF 10000 VGS , Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd 12 ID= 10A 10 8 6 4 2 0 VDS= 24V VDS= 15V C, Capacitance (pF) 1000 Ciss Coss 100 Crss 10 1 10 100 0 5 10 15 20 VDS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100.0 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) ISD, Reverse Drain Current (A) 10.0 T J = 150C ID, Drain-to-Source Current (A) 100 10 100sec 1msec 1.0 T J = 25C VGS = 0V 0.1 0.0 0.5 1.0 1.5 VSD, Source-toDrain Voltage (V) 1 Tc = 25C Tj = 150C Single Pulse 0.1 1.0 10.0 10msec 0.1 100.0 1000.0 VDS , Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF7821PBF 14 12 2.6 VGS(th) Gate threshold Voltage (V) ID , Drain Current (A) 10 8 6 4 2 0 25 50 75 100 125 150 2.2 1.8 ID = 250A 1.4 1.0 -75 -50 -25 0 25 50 75 100 125 150 T J , Junction Temperature (C) T J , Temperature ( C ) Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10. Threshold Voltage Vs. Temperature 100 D = 0.50 Thermal Response ( Z thJA ) 10 0.20 0.10 0.05 0.02 0.01 1 0.1 SINGLE PULSE ( THERMAL RESPONSE ) 0.01 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient www.irf.com 5 IRF7821PBF RDS(on), Drain-to -Source On Resistance ( m) 30 100 25 EAS, Single Pulse Avalanche Energy (mJ) ID = 13A 80 ID 4.5A TOP 8.0A BOTTOM 10A 20 60 15 T J = 125C 10 40 5 T J = 25C 20 0 2.0 4.0 6.0 8.0 10.0 0 25 50 75 100 125 150 VGS, Gate-to-Source Voltage (V) Starting T J , Junction Temperature (C) Fig 12. On-Resistance Vs. Gate Voltage Fig 13c. Maximum Avalanche Energy Vs. Drain Current LD 15V VDS VDS L DRIVER VDD D.U.T RG VGS 20V D.U.T IAS tp + V - DD VGS A 0.01 Pulse Width < 1s Duty Factor < 0.1% Fig 13a. Unclamped Inductive Test Circuit V(BR)DSS tp Fig 14a. Switching Time Test Circuit 90% VDS 10% VGS I AS td(on) tf td(off) tr Fig 13b. Unclamped Inductive Waveforms Fig 14b. Switching Time Waveforms 6 www.irf.com IRF7821PBF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt - - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD VDD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs Current Regulator Same Type as D.U.T. Vds Vgs Id 50K 12V .2F .3F D.U.T. VGS 3mA + V - DS Vgs(th) IG ID Qgs1 Qgs2 Qgd Qgodr Current Sampling Resistors Fig 16. Gate Charge Test Circuit Fig 17. Gate Charge Waveform www.irf.com 7 IRF7821PBF Power MOSFET Selection for Non-Isolated DC/DC Converters Control FET Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the Rds(on) of the MOSFET, but these conduction losses are only about one half of the total losses. Power losses in the control switch Q1 are given by; Synchronous FET The power loss equation for Q2 is approximated by; * Ploss = Pconduction + P + Poutput drive Ploss = Irms x Rds(on) + ( g x Vg x f ) Q ( 2 ) Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput This can be expanded and approximated by; Q + oss x Vin x f + (Qrr x Vin x f ) 2 *dissipated primarily in Q1. For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs' susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgs1 must be minimized to reduce the potential for Cdv/dt turn on. Ploss = (Irms 2 x Rds(on ) ) Qgs 2 Qgd +I x x Vin x f + I x x Vin x f ig ig + (Qg x Vg x f ) + Qoss x Vin x f 2 This simplified loss equation includes the terms Qgs2 and Qoss which are new to Power MOSFET data sheets. Qgs2 is a sub element of traditional gate-source charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Qgs1 and Qgs2, can be seen from Fig 16. Qgs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached and the time the drain current rises to Idmax at which time the drain voltage begins to change. Minimizing Qgs2 is a critical factor in reducing switching losses in Q1. Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure A shows how Qoss is formed by the parallel combination of the voltage dependant (nonlinear) capacitances Cds and Cdg when multiplied by the power supply input buss voltage. 8 Figure A: Qoss Characteristic www.irf.com IRF7821PBF SO-8 Package Details Dimensions are shown in milimeters (inches) 9 6 ' & ! % " $ $ # 7 9DH 6 6 i p 9 @ r r C F G DI8C@T HDI H6Y $"! %'' # (' ! " &$ (' (%' '( #(& $ $AA76TD8 !$AA76TD8 !!'# !## (( (% $ % A' A HDGGDH@U@ST HDI H6Y &$ "$ !$ $ "" ( !$ $ #' # "' !&AA76TD8 %"$AA76TD8 %! $' $ !$ !& # A A' % @ C !$Ab dA 6 %Y r r 6 FAA#$ 8 Ab#dA 'YAG & 'YAp 'YAi !$Ab dA 6 867 IPU@T) AA9DH@ITDPIDIBAEAUPG@S6I8DIBAQ@SA6TH@A #$H ((# !AA8PIUSPGGDIBA9DH@ITDPI)AHDGGDH@U@S "AA9DH@ITDPITA6S@ATCPXIADIAHDGGDH@U@STAbDI8C@Td #AAPVUGDI@A8PIAPSHTAUPAE@9@8APVUGDI@AHT !66 $AAA9DH@ITDPIA9P@TAIPUADI8GV9@AHPG9AQSPUSVTDPIT AAAAAHPG9AQSPUSVTDPITAIPUAUPA@Y8@@9A $Ab%d %AAA9DH@ITDPIA9P@TAIPUADI8GV9@AHPG9AQSPUSVTDPIT AAAAAHPG9AQSPUSVTDPITAIPUAUPA@Y8@@9A!$Ab d &AAA9DH@ITDPIADTAUC@AG@IBUCAPAAG@69AAPSATPG9@SDIBAUP AAAAA6ATV7TUS6U@ APPUQSDIU 'YA&!Ab!'d %#%Ab!$$d "YA !&Ab$d 'YA &'Ab&d SO-8 Part Marking @Y6HQG@)AUCDTADTA6IADSA& AHPTA@U DIU@SI6UDPI6G S@8UDAD@S GPBP www.irf.com ;;;; ) 96U@A8P9@AXX QA2A9@TDBI6U@TAG@69AS@@ QSP9V8UAPQUDPI6G A2AG6TUA9DBDUAPAAUC@A@6S XXA2AX@@F 6A2A6TT@H7GATDU@A8P9@ GPUA8P9@ Q6SUAIVH7@S 9 IRF7821PBF SO-8 Tape and Reel Dimensions are shown in milimeters (inches) TERMINAL NUMBER 1 12.3 ( .484 ) 11.7 ( .461 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 330.00 (12.992) MAX. 14.40 ( .566 ) 12.40 ( .488 ) NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541. Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 0.87mH RG = 25, IAS = 10A. Pulse width 400s; duty cycle 2%. When mounted on 1 inch square copper board R is measured at TJ approximately 90C Note: For the most current drawing please refer to IR website at http://www.irf.com/package/pkhexfet.html Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.05/2007 10 www.irf.com |
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