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Linear FET Controller For DDR Supplies
POWER MANAGEMENT Description
The SC1116 is a low cost controller for low power linear DDR power supplies. The SC1116 comes in a space saving SOT-23 6 pin package. The SC1116 provides a dual gate drive for the top serial and bottom parallel MOSFETs with internal shoot through protection. The wide range of input voltages (3V to 15V) allows the chip to work in many various applications. The variable output voltage is programmable from the outside with an input divider or an external reference. Wide range of VDDQ, down to 0.5V
SC1116
Features
User can select FETs to optimize system current rating/dropout/cost Low VDDQ, 0.5V to 2.5V -40C to +85C operating temperature External compensation capable for low ESR loads Minimum external components 0.6 mA Quiescent current Guaranteed no shoot through SOT-23 6L small package. Fully WEEE and RoHS compliant
Applications
DDR supplies SCSI Line termination Source / Sink LDOs
Typical Application Circuit
Q1 MOS FET N
VDDQ=2.5Vtyp
R1 1k 0.5% U1 SC1116
VTT=1.25Vtyp
4 7uF typ
GND
Vcc=3 to 15V
0 .1 uF
1
VCC
DRVH
6
2
GND
FB
5
Q2 MOS FET N
3
REF
DRVL
4
R2 1k 0.5%
0 .1 uF
1k typ 4 .7 nF typ
1k typ 4 .7 nF typ
Notes: (1) Values used for optional compensation are 1K and 4.7nF typical. (2) When using 3V as Vcc, use of low threshold FETs is a must.
Revision: March 28, 2007
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SC1116
POWER MANAGEMENT Absolute Maximum Rating
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter Input Supply Voltage Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Thermal Impedance Junction to Ambient Thermal Impedance Junction to Case Power Dissipation at TA = 25C Lead Temperature (Soldering) 10 seconds ESD Rating (Human Body Model)
Symbol VCC TA TJ TSTG J A J C PD TLEAD ESD
Maximum -0.3 to +16.5 -40 to +85 -40 to +125 -65 to +150 95.7 61.7 250 300 2
Units V C C C C/W C/W mW C kV
Electricial Characteristics
Unless otherwise specified, VCC = 5V, 0.5V VDDQ 2.5V, R1 = R2 = 1k +/- 0.1%. Specifications with standard typeface are for TJ = 25C, and limits in boldface type apply over the full operating temperature range (TA = -40C to +85C).
Parameter Supply Voltage Load Regulation (1) Quiescent Current/Standby Current FB & REF Input Current Gate Drive Output Low Output High
Test Conditions
Min 3
Typ
Max 15
Units V %
IL: 0 + 3A IL: 0 - 3A VCC = 15V, no load = 0A V C C = 15V
-1 +1 600 800 100
A nA
ISINK = 2.5mA ISOURCE = 2.5mA Vcc -0.25
0.15 Vcc -0.15
0.25
V V
Note: (1) For Load Regulation testing use a low duty cycle current pulse, when measuring VTT.
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SC1116
POWER MANAGEMENT Pin Configuration Ordering Information
Part Number Top Mark AH00 P ackag e SOT-23 6L SC1116ISKTR (1) SC1116ISKTRT (1)(2)
TOP VIEW
VCC GND REF 1 2 3 6 5 4 DRVH FB DRVL
Notes: (1) Only available in tape and reel packaging. A reel contains 3000 devices. (2) Lead free option. Fully WEEE and RoHS compliant.
(SOT-23 6L)
Pin Descriptions
Pin # 1 2 3 4 5 6 Pin Name Pin Function VC C GND REF DRVL FB DRVH Supply pin, connect a 3V to 15V supply and decouple to ground with a 0.1F ceramic capacitor. Power and signal ground. Reference input. Output voltage will be regulated to this voltage. Low side FET drive output. Feedback pin. High side FET drive output.
Block Diagram
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SC1116
POWER MANAGEMENT Application Information
Overview The SC1116 linear controller is designed to meet the JEDEC specifications for termination of DDR-SDRAM. Double Data Rate (DDR) memory is clocked at the same speed as older SDRAM (synchronous dynamic random access memory), yet handles twice the amount of data by using the rising and falling edge of the clock signal for data transfers. Another difference is that DDR memory requires 2.5V instead of 3.3V used by standard SDRAM. The other feature that separates DDR memory from a conventional type is employment of the VTT - termination voltage. Main requirements for the VTT are that it must track variations of VDDQ and be able to supply (source) current, and absorb (sink) current. The SC1116 controller offers a low cost solution for DDR termination voltage regulation by using external pass elements (MOSFETs). Having the flexibility of choosing the MOSFETs allows for optimization on the basis of cost/ size/performance of the specific application. Test Circuit & Waveforms The test circuit is shown below in Figure 1. Note that VREF voltage is supplied externally to eliminate inaccuracy caused by resistor divider.
V DDQ=2.5V
C1 1 00 uF
Q1 IR37 14
V TT =1.25V typ
Iso urce/ Isink
+/-3A
Isin k 3A Isource Po wer Su pp ly
3 2m
U1 SC1116
C6 2 70 uF
V cc=5V
C2 1 uF
1
VCC
DRVH
6
2 2m
0A to 6A Step
5
Q2 IR37 14
2xIsin k
2
G ND
FB
Pu lse loa d, dc=50%
V ref=1.25V
C3 0 .1uF
3
R EF
DRVL
4
Cu rrent Pro be
R3 1k C4 4.7nF
R4 1k C5 4 .7nF
E lectronic Loa d
Figure 1.
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SC1116
POWER MANAGEMENT Typical Characteristics
Regulation Vtt vs. Vref @ Is/s=1A; Vcc=5V
2.0% 2.0%
Regulation Vtt vs. Vref @ Is/s=5A; Vcc=5V
1.0%
1.0%
0.0%
0.0%
dVtt / Vtt
dVtt / Vtt
-1.0%
-1.0%
-2.0%
-2.0%
-3.0%
-3.0%
-4.0%
-4.0%
-5.0% 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3
Vref (Vddq/2), V
-5.0% 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3
Vref (Vddq/2), V
Regulation Vtt vs. Vref @ Is/s=1A; Vcc=12V
2.0% 2.0%
Regulation Vtt vs. Vref @ Is/s=5A; Vcc=12V
1.0%
1.0%
0.0%
0.0%
dVtt / Vtt
dVtt / Vtt
-1.0%
-1.0%
-2.0%
-2.0%
-3.0%
-3.0%
-4.0%
-4.0%
-5.0% 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3
Vref (Vddq/2), V
-5.0% 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3
Vref (Vddq/2), V
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SC1116
POWER MANAGEMENT Typical Characteristics (Cont.)
Max. Sourcing Current vs. V CC V DDQ = 2.5V V REF = 1.25V V TT = 1.237V
6
5
OUTPUT CURRENT (A)
4
3
2
1
0 3 3.5 4 4.5 5 5.5 SUPPLY VOLTAGE, V CC (V) 6 6.5
4.4 4.3 4.2 4.1 4 3.9 3.8 3.7 3.6 3
Max. Sinking Current vs. V CC V DDQ = 2.5V V REF = 1.25V V TT = 1.263V
OUTPUT CURRENT (A)
3.5
4
SUPPLY VOLTAGE, V CC (V)
4.5
5
5.5
6
6.5
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SC1116
POWER MANAGEMENT Typical Characteristics (Cont.)
Quie s ce nt Current vs . Te m pe rature 520 510 500 V CC = 5V V DDQ = 2.5V V REF = 1.25V V TT = 1.25V ILOAD = 0A
QUIESCENT CURRENT (uA
490 480
470
460
450 -40 -25 -10 5 20 35 50 65 TEMPERATURE C 80 95 110 125
800 700 600 QUIESCENT CURRENT (uA) 125 oC 500 400 300 200 100 0 3 3.5 0 oC
Quiescent Current vs. V CC V DDQ = 2.5V V REF = 1.25V V TT = 1.25V ILOAD = 0A
25 oC
4 4.5 5 5.5 SUPPLY VOLTAGE, V CC(V)
6
6.5
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SC1116
POWER MANAGEMENT Test Waveforms
VTT Transient Response
ISOURCE / ISINK
VTT 100mV/div
ISOURCE / ISINK
VTT 100mV/div
VCC = 5V VDDQ = 2.5V VREF = 1.25V
VCC = 5V VDDQ = 2.5V VREF = 1.25V
I STEP : +2.3A to - 2.2A Slew Rate: 2.5 A/uS
I STEP : +1.75A to -1.75A Slew Rate: 2.5 A/uS
Time (50us/div)
Time (50us/div)
ISOURCE / ISINK
VTT 100mV/div
VTT 100mV/div
VCC = 5V VDDQ = 2.5V VREF = 1.25V
VCC = 5V VDDQ = 2.5V VREF = 1.25V
ISOURCE / ISINK
I STEP : +1.25A to -1.25A Slew Rate: 2.5 A/uS
I STEP : - 0.75A to + 0.75A Slew Rate: 2.5 A/uS
Time (50us/div)
Time (50us/div)
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SC1116
POWER MANAGEMENT Test Waveforms (Cont.)
VTT Transient Response
VCC = 5V VDDQ = 2.5V VREF = 1.25V VCC = 5V VDDQ = 2.5V VREF = 1.25V COUT = 47uF ceramic
VTT 100mV/div
VTT 100mV/div
ISOURCE / ISINK
ISOURCE / ISINK
I STEP : - 0.53A to + 0.53A Slew Rate: 2.5 A/uS
I STEP : - 0.5A to + 0.53A Slew Rate: 2.5 A/uS
Time (50us/div)
Time (50us/div)
VTT 20mV/div
VCC = 5V VDDQ = 2.5V VREF = 1.25V
VCC = 5V VDDQ = 2.5V VREF = 1.25V
VTT 50mV/div
I STEP : + 0.03A to + 2.25A
I STEP : + 0.03A to - 2.25A
ISOURCE / ISINK
ISOURCE / ISINK
Slew Rate: 2.5 A/uS
Slew Rate: 2.5 A/uS
Time (20us/div)
Time (20us/div)
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SC1116
POWER MANAGEMENT Evaluation Board
Top View Top Layer
Evaluation Board Schematic
Q1 IR3714 C1 22uF
VDDQ=2.5Vtyp
R1 1k 0.5% U1 SC1116
VTT=1.25Vtyp
C6 47uF
GND
Vcc=3 to 15V
C2 0.1
1
VCC
DRVH
6
2
GND
FB
5
Q2 IR3714
3
REF
DRVL
4
R2 1k 0.5%
C3 0.1
R3 1k C4 4.7nF
R4 1k C5 4.7nF
Notes: (1) Values used for optional compensation are 1K and 4.7nF typical. (2) When using 3V as Vcc, use of low threshold FETs is a must.
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SC1116
POWER MANAGEMENT Outline Drawing - SOT-23-6
A e1 N EI 1 ccc C 2X N/2 TIPS B 2 E D
DIM
A A1 A2 b c D E1 E e e1 L L1 N 01 aaa bbb ccc
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.057 .035 .000 .006 .035 .045 .051 .010 .020 .003 .009 .110 .114 .122 .060 .063 .069 .110 BSC .037 BSC .075 BSC .012 .018 .024 (.024) 6 0 10 .004 .008 .008 1.45 0.90 0.15 0.00 .90 1.15 1.30 0.25 0.50 0.08 0.22 2.80 2.90 3.10 1.50 1.60 1.75 2.80 BSC 0.95 BSC 1.90 BSC 0.30 0.45 0.60 (0.60) 6 0 10 0.10 0.20 0.20
2X E/2
e
D aaa C A2 SEATING PLANE C A1 bxN bbb C A-B D A
H GAGE PLANE 0.25 L (L1) SEE DETAIL c
01
A
DETAIL
A
SIDE VIEW
NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
Minimum Land Pattern - SOT-23-6
X
DIM
(C) G Y P
NOTES: 1.
DIMENSIONS MILLIMETERS INCHES
(.098) .055 .037 .024 .043 .141 (2.50) 1.40 0.95 0.60 1.10 3.60
Z
C G P X Y Z
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
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