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| PJESD5V0QL4G, L5G LOW CAPACITANCE TVS/ZENER ARRAYS FOR ESD PROTECTION These 4 and 5 TVS/Zener Arrays have been designed to protect sensitive equipment against ESD in CMOS circuitry operating at 5V. These TVS arrays offers an integrated solution to protect 4 or 5 data lines in applications, where the board space is a premium, in a Quad Flat no-Lead package that only occupies an area of 1.8 sq mm. SPECIFICATION FEATURES IEC61000-4-2 ESD 20kV Air, 15kV Contact Compliance Low Leakage Current, Maximum of 1A at rated voltage 1 DRAFT Maximum Capacitance of 15pF per device at 0Vdc 1MHz Peak Power Dissipation of 20W under 8/20s Waveform Quad Flat No Lead package QFN (1.2x1.5 sq mm, Height: 0.75mm) Lead Free Package 100% Tin Plating, Matte finish PJESD5V0QL4G 1 GND 2 3 APPLICATIONS Personal Digital Assistant (PDA) Digital Cameras Portable Instrumentation Mobile Phones and Accessories MP3 Players 6 5 NC 4 PJESD5V0QL5G MAXIMUM RATINGS (Per Device) Rating Peak Pulse Power (8/20s Waveform) Peak Pulse Current (8/20s Waveform) ESD Voltage (HBM Per MIL STD883C - Method 3015-6) Operating Temperature Range Storage Temperature Range Symbol P PP I PPM V ESD TJ Tstg Value 20 TBD 20 -55 to +150 -55 to +150 Units W A kV C C ELECTRICAL CHARACTERISTICS (Per Device) Tj = 25C Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20s) Off State Junction Capacitance Symbol V WRM VBR IR Vc Cj I BR = 1mA VR = 5V I pp = TBD 0 Vdc Bias f = 1MHz betweeen I/O lines and Conditions Min Typical Max 5 Units V V 6 1 TBD TBD TBD 15 A V pF 7/18/2006 Page 1 www.panjit.com PJESD5V0QL4G, L5G TYPICAL CHARACTERISTIC CURVES (Per Device) Tj = 25C Clamping Voltage vs 8/20s Ipp Pulse Waveform 110 100 90 5 4 Percent of Ipp 80 70 60 50 40 30 20 10 Rise time 10-90% - 8s 50% of Ipp @ 20s Ipp, Amps 3 TBD 8 8.2 8.4 8.6 8.8 9 Clamping Voltage, V DRAFT 2 1 0 0 5 10 15 time, sec 20 25 30 Typical Capacitance vs. Bias Voltage @1MHz 35 30 Capacitance, pF 25 20 15 10 5 0 0 1 2 3 Bias Voltage, Vdc 4 5 TBD 7/18/2006 Page 2 www.panjit.com PJESD5V0QL4G, L5G PACKAGE DIMENSIONS AND SUGGESTED PAD LAYOUT 0.300.05 mm 1.50.05 mm 0.60.05 mm DRAFT 1.20.05 mm 0.200.05 mm 0.350.05 mm 0.5 mm 22.04 mm 0.750.025 mm 0.20.025 mm 12.0 12.0 25.0 18.0 23.0 49.0 48.0 53.0 19.7 19.7 Suggested Pad Layout (in mils) Alternate Pad Layout SOT666 (in mils) 7/18/2006 Page 3 www.panjit.com |
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