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ACU7503 Datasheet
Latest Version: 1.3
ACU7503PRODUCT DATASHEET
Declaration
Circuit diagrams and other information relating to products of Actions Semiconductor Company, Ltd. ("Actions") are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction is not necessarily given. Although the information has been examined and is believed to be accurate, Actions makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and disclaims any responsibility for inaccuracies. Information in this document is provided solely to enable use of Actions' products. The information presented in this document does not form part of any quotation or contract of sale. Actions assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Actions' products, except as expressed in Actions' Terms and Conditions of Sale for. All sales of any Actions products are conditional on your agreement of the terms and conditions of recently dated version of Actions' Terms and Conditions of Sale agreement Dated before the date of your order. This information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights, copyright, trademark rights, rights in trade secrets and/or know how, or any other intellectual property rights of Actions or others, however denominated, whether by express or implied representation, by estoppel, or otherwise. Information Documented here relates solely to Actions products described herein supersedes, as of the release date of this publication, all previously published data and specifications relating to such products provided by Actions or by any other person purporting to distribute such information. Actions reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your Actions sales representative to obtain the latest specifications before placing your product order. Actions product may contain design defects or errors known as anomalies or errata which may cause the products functions to deviate from published specifications. Anomaly or "errata" sheets relating to currently characterized anomalies or errata are available upon request. Designers must not rely on the absence or characteristics of any features or instructions of Actions' products marked "reserved" or "undefined." Actions reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Actions' products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal
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injury or severe property damage. Any and all such uses without prior written approval of an Officer of Actions and further testing and/or modification will be fully at the risk of the customer. Copies of this document and/or other Actions product literature, as well as the Terms and Conditions of Sale Agreement, may be obtained by visiting Actions' website at http://www.actions-semi.com/ or from an authorized Actions representative. The word "ACTIONS", the Actions' LOGO, whether used separately and/or in combination, and the phase "ACU7503", are trademarks of Actions Semiconductor Company, Ltd., Names and brands of other companies and their products that may from time to time descriptively appear in this product data sheet are the trademarks of their respective holders; no affiliation, authorization, or endorsement by such persons is claimed or implied except as may be expressly stated therein. ACTIONS DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL ACTIONS BE RELIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF ACTIONS OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER ACTIONS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR NOT.
Additional Support
Additional product and company information can be obtained by visiting the Actions website at: http://www.actions-semi.com Copyright (c) Actions Semiconductor Co., Ltd. 2006. All rights reserved.
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Contents
Declaration......................................................................................................................2 Contents ..........................................................................................................................4 1 2 Introduction..............................................................................................................6 Pin Description ........................................................................................................7
2.1 2.2 Pin Assignment .................................................................................................................... 7 Pin Definition ........................................................................................................................ 8
3
Function Description ............................................................................................ 11
3.1 Functional Block Diagram ................................................................................................11
3.2 MCU Core............................................................................................................................. 11 3.2.1 Internal RAM ..............................................................................................................12 3.2.2 Internal ROM ..............................................................................................................12 3.2.3 External RAM/ROM Access......................................................................................12 3.3 DSP Core .............................................................................................................................12
3.4 Clock Management Unit (CMU)........................................................................................13 3.4.1 HOSC............................................................................................................................ 13 3.5 Power Management Unit (PMU) ......................................................................................13 3.5.1 Voltage Generator......................................................................................................13 3.5.2 Voltage monitor..........................................................................................................13 3.5.3 External Power Supply Controller............................................................................14 3.6 3.7 DMA Controller ................................................................................................................... 14 GPIO and Multifunction Configuration............................................................................14
3.8 USB 2.0 SIE ......................................................................................................................... 14 3.8.1 Features ......................................................................................................................15 3.8.2 USB Using Memory....................................................................................................15 3.9 3.10 Nand Flash and SMC Controller.......................................................................................15 Key Scan Interface.............................................................................................................16
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3.11 3.12 DAC....................................................................................................................................... 16 ADC .................................................................................................................................. 16
4
Electrical Characteristics......................................................................................17
4.1 4.2 4.3 Absolute Maximum Ratings ............................................................................................. 17 Capacitance ........................................................................................................................ 17 DC Characteristics.............................................................................................................. 17
4.4 AC Characteristics.............................................................................................................. 18 4.4.1 AC Test Input Waveform ...........................................................................................18 4.4.2 AC Test Output Measuring Points............................................................................18 4.4.3 Reset Parameter........................................................................................................19 4.4.4 Initialization Parameter............................................................................................19 4.4.5 GPIO Interface Parameter........................................................................................19 4.4.6 Ordinary ROM Parameter.........................................................................................20 4.4.7 External System Bus Parameter ............................................................................. 21 4.4.8 Bus Operation.............................................................................................................21 4.4.9 A/D Converter Characteristics.................................................................................22 4.4.10 Headphone Driver Characteristics Table................................................................23 4.4.11 LCM Driver Parameter .............................................................................................. 24
5
Soldering Conditions and Package Description ............................................... 25
5.1 5.2 5.3 5.4 5.5 Recommended Soldering Conditions (Lead Free) ........................................................25 Precaution against ESD for Semiconductors ................................................................25 Handling of Unused Input Pins for CMOS.......................................................................26 Status before Initialization of MOS Devices...................................................................26 ACU7503 Package Drawing.............................................................................................26
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1
Introduction
The ACU7503 is one of the ACU750x Single-cell Series SOC which is the second generation highly-integrated digital music system solutions for devices such as audio players and photo viewers. Besides an audio decoder with a high performance DSP that has built-in RAM and ROM, the ACU7503 includes ADPCM record capabilities and USB interface for downloading and uploading. It also provides interface for flash memory, LED/ OLED/color LCD, buttons and switch inputs, headphone, microphone, and FM radio input and control. The ACU7503 has programmable architecture supporting the WMA and other digital audio standards. For storage device, it can act as a USB mass storage slave device to personal computer system. ACU7503 has low power consumption to ensure longer battery life. It has two flexible on-chip DC-DC converters using 1xAA or 1xAAA battery as power supply. And a Low Drop Regulator is also embedded to replace one of the DC-DC generating VDD when Battery is not present. The built-in Sigma-Delta (-) DAC includes a headphone driver to directly drive low impedance headphone(s). The ADC includes inputs for both Microphone and Analog Audio In to support voice and FM radio recording. Thus, it provides a true `ALL-IN-ONE' solution that is ideally suitable for highly optimized digital multimedia players.
Features
Instruction set of MCU compatible with Z80 Internal SRAM access time<7ns, MROM access time<16ns Accurate Clock Management Unit, supplies 24MHz OSC Energy saving Power Management Unit, supports 1xAA, 1xAAA 2-channel DMA, 1-channel Counter/Timer Controller and Interrupt Controller Support USB 2.0 high speed, acting as mass storage device Support up to 4(pcs)*64M-4G bytes Nand type SLC/MLC Flash Built-in Key Scan Circuit and GPIOs Built-in Stereo Sigma-Delta DAC and ADC Digital voice recording at ultra low 4.4 or 8Kbps with Actions Speech Algorithm Headphone driver output 2x11mW @16ohm Support FM Radio input and 32 levels volume control Support extended low frequency crystal to generalize RTC 0.18um 1P5M CMOS process and packaged at LQFP-80(10*10mm)
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2
Pin Description
2.1
Pin Assignment
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2.2
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
Pin Definition
Pin Name UVCC URES USBGND USBDP USBDM USBVDD PAVCC AOUTR AOUTL PAGND VRDA MICIN VMIC FMINL FMINR AGND AVCC VREFI AVDD VDD VCC LRADC1 VDDFB VCC HOSCI HOSCO BAT GPIO_B0 KEYI0 CE3I/O Type PWR AO PWR A A PWR PWR AO AO PWR AO AI PWR AI AI PWR PWR AI PWR PWR PWR AI AI PWR AI AO I BI I O 2mA Driver Capacity / / / / / / / / / / / / / / / / / / / / / / / / / / / Reset Default / / / H H / / / / / / / / / / / / / / Z / / / / / / / Z H H Short Description Power supply for USB USB precision Resistor USB ground USB data plus USB data minus USB power Power supply for Power Amplifier Int. PA right channel analog output Int. PA left channel analog output Power Amplifier ground Bypass capacitor connect pin for int. DAC Reference voltage Microphone pre-amplifier input Power supply for Microphone Left channel of FM line input Right channel of FM line input Analog ground Power supply of analog Voltage reference input Analog core power pin Core power IO power Low resolution A/D input 1 VDD feedback IO power High frequency crystal OSC input High frequency crystal OSC output Battery voltage input. Bit0 of General Purpose I/O port B Bit0 of key scan circuit input Chip enable 3
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GPIO_B2 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 KEYI2 CE4LXVDD GND NGND LXVCC CE2CE1CE5GPO_A3 GPIO_G0 MMC_CMD VDD RBGPO_A1 ICECK GPO_A2 ICEDO GPO_A0 ICEDI ICEENICERSTGPIO_B4 KEYO0 GPIO_B5 KEYO1 47 48 49 50 51 52 53 54 RESETVCC D7 D6 D5 D4 D3 D2 BI I O PWR PWR PWR PWR O O O BI BI O PWR I O I O O O I I I BI O BI O I PWR BI BI BI BI BI BI / / / / NF_PAD NF_PAD 4mA 2mA / 4mA 4mA 4mA 4mA 4mA 4mA 2mA 2mA USCU / NF_PAD NF_PAD NF_PAD NF_PAD NF_PAD NF_PAD 2mA Z H H / / / / H H H / Z / / H L / L / 0 / / / Z / Z / H / L L L L L L Bit2 of General Purpose I/O port B Bit2 of key scan circuit input Chip enable 4. VDD DC-DC pin Ground NMOS ground VCC DC-DC pin Ext. memory chip enable 2 Ext. memory chip enable 1 Ext. memory chip enable 5 Bit3 of General Purpose Output port A Bit0 of General Purpose I/O port G Command/Respond of SD/MMC Digital core power Nand Flash Ready/Busy status input Bit1 of General Purpose Output port A Clock input of DSU Bit2 of General Purpose Output port A Data output of DSU Bit0 of General Purpose Output port A Data input of DSU DSU enable (active low) DSU reset (active low) Bit4 of General Purpose I/O port B Bit0 of key scan circuit output Bit5 of General Purpose I/O port B Bit1 of key scan circuit output System reset input (active low) Digital power pad Bit7 of ext. memory data bus Bit6 of ext. memory data bus Bit5 of ext. memory data bus Bit4 of ext. memory data bus Bit3 of ext. memory data bus Bit2 of ext. memory data bus
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55 56 57 58 59 60 61 GND D1 D0 MWRMRDCLE ALE GPIO_C1 62 I2C_SDA SIRQ63 64 GPIO_C0 I2C_SCL VDD PWR BI BI O O O O BI O I BI O PWR 2mA / 2mA / NF_PAD NF_PAD NF_PAD NF_PAD NF_PAD NF_PAD / L L H H L L OD / / OD / / Ground Bit1 of ext. memory data bus Bit0 of ext. memory data bus Ext. memory write strobe Ext. memory read strobe Command NandFlash Latch Enable fo
Address latch enable for NAND flash Bit1 of General Purpose I/O port C I2C Serial data (Open drain) Ext. interrupt request input Bit0 of General Purpose I/O port C I2C serial clock (Open drain) Digital core power
NOTE: 1 PWR----Power Supply 2 AI-----Analog Input 3 AO----Analog Output 4 O----Output 5 I----Input 6 BI----Bi-direction 7 NF_PAD----Pad of Nand Flash 8 USCU, USCL----USB SCHIMIT CU, USB SCHIMIT CL 9 Driver capacity here refers to a pin's driving capacity in GPIO mode.
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3
Function Description
3.1
Functional Block Diagram
DMA Controller &Arbiter
DMA BUS(Peripheral DMA
path)
ZRAM1
MCU
USB
IPM/IDM(24-bit) FLASH
MCU BUS
(include DMA1/2 path) NAND Chip DSP MMC/SDC
IO Register (two bank)
ADC
EM
DAC
I2C
PMU (Power Management Unit)
CMU(Clock)
GPIO
Supply
Monitor
Charger
3.2
MCU Core
ACU7503 has 126K+192 bytes on-chip SRAM and 50K bytes on-chip ROM. Copyright (c) Actions Semiconductor Co., Ltd. 2006. All rights reserved.
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3.2.1 Internal RAM
There are three independent banks of SRAM called ZRAM1 (16KB-64B), ZRAM2 (3KB+3KB) and ZRAM3 (3KB+3KB) that can be accessed by MCU and DMA only. The internal SRAM memory mapping is as follows.
0000H 16KB Internal RAM Space (MCU.IA15=0) 16KB IPMH IPMM IPML IDMH IDMM IDML ZRAM2 ZRAM3 16KB 16KB 16KB 16KB 16KB 16KB (3+3)KB (3+3)KB
7FFFH
3.2.2 Internal ROM
Of the 50KB on-chip ROM, 12KB is boot up BROM that has USB upgrade firmware built in.
3.2.3 External RAM/ROM Access
The External RAM/ROM Controller is able to support up to 6 pieces of 32M*8bit SRAM/ROM. There are up to 6 chip select signals (CE1- to CE6-) for selecting 6 pieces of SRAM/ROM. At any time only one chip select signal can be controlled by the bit [5:3] of EMHIGHP register. There are three extended memory control registers, EMLOWP, EMHIGHP and EMPIORD. Note: There is no CE6- pin at all. One of the GPIOs would be used as CE6-. When accessing the memory space of CE6-, The GPIO should be pulled down before reading or writing to this memory space.
3.3
DSP Core
24-bit Harvard architecture DSP with DSU built in. Works with a memory word length of 24 bits. ACU7503 has 16K*3 bytes program memory (PM) and 16K*3 bytes data memory (DM). Memory-Mapped register includes DAC interface. Both DSP and MCU can access the Host Interface Port (HIP) registers with reading or writing operations and information can be communicated between the DSP and MCU through it.
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3.4
Clock Management Unit (CMU)
The CMU uses 24MHz Oscillator to generate clocks for DSP/USB/CTC/ADC/DAC/MCU/ DMA, etc.
3.4.1 HOSC
HOSC is a high frequency clock source which: Generates clock for DSP and for serial communication interfaces such as USB Generates 22.5792MHz for sample rate 44.1K/22.05KHz/11.025KHz and 24.576MHz for audio sequence of 48 KHz. Generates high frequency clock up to 72MHz for MCU and DMA. Generates Counter/Timer Controller(CTC)
3.5
Power Management Unit (PMU)
The PMU is made up of a Voltage Monitor and Voltage Generator.
3.5.1 Voltage Generator
ACU7503 embeds two DC-DC converters and an LDO on chip. The output of DC-DC1 depends on the external feedback circuit, while the DC-DC2 can generate VCC which is a fixed 3.1V voltage. The power source of DC-DC1 is the AA/AAA battery while the power source of this LDO is USB host, so when the Battery is removed and being plugged on an USB host, the LDO built-in will take the place of DC-DC1 supplying VDD. VDDFB as the Voltage-feedback is fixed once the ratio of R1/R2 fixed by the external feedback circuit as show.
3.5.2 Voltage monitor
Voltage monitor is used to detect the battery voltage and has it displayed on LCD.
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3.5.3 External Power Supply Controller
The Battery Charger uses the external power supply from either USB VBUS or adapter.
3.6
DMA Controller
The ACU7503 series SOC has four DMA Controllers. DMA1/2 can transfer data between memory and memory, memory and I/O, I/O and I/O. DMA5 is for flash controller, DMA6 is USB DMA. Both DMA1 and DMA2 can be configured to have higher priority over the other. The DMA Controller Arbiter is embedded to prevent any conflict of transferring from happening, and let the DMA Controller with higher priority to start first and end first.
3.7
GPIO and Multifunction Configuration
There are two Multi Function Modes that can be configured, including GPIO mode, KEY mode. In different mode, GPIO pins can be configured to have alternated functions.
PIN No 42 40 41 28 29 45 46 63 62 37 PIN NAME GPO_A0 GPO_A1 GPO_A2 GPIO_B0 GPIO_B2 GPIO_B4 GPIO_B5 GPIO_C0 GPIO_C1 GPIO_G0 F1(GPIO) GPO_A0/ICEDI GPO_A1/ICECK GPO_A2/ICEDO KEYI0/GPIO_B0/CE3KEYI2/GPIO_B2/CE4KEYO0/GPIO_B4 KEYO1/GPIO_B5 GPIO_C0 GPIO_C1 GPIO_G0 GPO_A0/ICEDI GPO_A1/ICECK GPO_A2/ICEDO KEYI0/GPIO_B0/CE3KEYI2/GPIO_B2/ KEYO0/GPIO_B4 KEYO1/GPIO_B5/ GPIO_C0 GPIO_C1/SIRQGPIO_G0 F2(Key)
3.8
USB 2.0 SIE
The Actions USB2.0 device controller is fully compliant with the Universal Serial Bus 2.0 specification. This high performance USB2.0 device controller integrates USB transceiver, SIE, and provides multifarious interfaces for generic MCU, RAM, ROM and DMA controller. So it is suitable for a variety of peripherals, such as: scanners, printers, mass storage devices, and digital cameras. It is designed to be a cost-effective USB total solution.
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3.8.1 Features
Fully compliant with USB Specification 2.0 Supports USB High Speed (480Mb/s) and Full Speed (12Mb/s) Supports Control, Bulk, Isochronous and Interrupt Transfers Embedded USB high-speed Transceiver which complies with Inter UTMI Supports DMA interface (16-bit) 2KB configurable FIFO for endpoints and provides double buffer to increase throughput. Supports USB remote wake-up feature Software controlled connection to USB bus for re-enumeration
3.8.2 USB Using Memory
0000h B1+B2 (ZRAM2) 6K
ZRAM 16K
USB FIFO 2K
4000h 5800h 6000h 6100h 8000h IDML 16K IDMM 16K IDMH 16K IPML 16K IPMM 16K IPMH 16K ZRAM3 6K
EM 32K USB FIFO 192 + 64byte =256byte
FFFFh
3.9
Nand Flash and SMC Controller
The Nand Flash and Smart Media Card controller uses DMA5 for transferring data between Nand Flash and Internal SRAM.
Features
Support up to 4 pieces of SMC/Nand Flash with 4 Chip Select pins Copyright (c) Actions Semiconductor Co., Ltd. 2006. All rights reserved.
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Support Reed Solomon ECC & Hamming ECC Command and address control state machine Reading and writing timing generator ECC accelerator (Reed-Solomon & Hamming) Sense R/B# status Comply with "Smart Media Software Algorithm Guidelines" Bad block detection and replacement Both SLC and MLC flash are supported
3.10 Key Scan Interface
The key scan circuit's pins are composed of KEYI[0,2,] and KEYO[0,1,]. The maximum key matrix is 2*2. When the key scan circuit is enabled, KEYI[x]'s logical level is high, while KEYO[x]'s logical level is low. If any key is pressed which pulls the corresponding KEYI[x]'s logical level to low, KEYO[x] will output a series of scanning waves. In case that key interrupt is enabled, an interrupt will occur after the 12 key data have been stored in KEYSCANDAT (Reg: 0C0H).
3.11 DAC
The internal DAC is an on-chip Sigma-Delta Modulator and the DAC interface support 4-level play back FIFO (8 X 20-bit PCM data) for L/R channel and variable sample rates. Internal DAC can drive earphone application. Note: the pin PAVCC needs a bypass capacitor of about 100uF to eliminate the "PENG" sound when DAC is powered on or off.
3.12 ADC
The audio A/D is an 18 bits sigma delta Analog-to-Digital Converter; it can work in a 16 bit or 18 bit mode. Its input source can be selected from MIC amplifier or line-in sources.
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4
Electrical Characteristics
4.1
Absolute Maximum Ratings
Parameter Supply voltage Input voltage Storage temperature Symbol VDD VCC VIH VIL Tstg Typical 1.8 3.1 2.4 1.0 Rating +10% +10% +10% +10% -65~150 Unit V V V V
Note: 1. TO = 25Operating Temperature 2. Do not short-circuit two or more output pins simultaneously. 3. Even if one of the above parameters exceeds the absolute maximum ratings momentarily, the quality of the product may be degraded. The absolute maximum ratings, therefore, specify at which point the product may be physically damaged. Use the product well within these ratings. 4. The specifications and conditions shown in the DC and AC characteristics are the ranges for normal operation and quality assurance of the product.
4.2
Capacitance
Symbol CI CIO Condition fC = 1 MHz Unmeasured pins returned to 0V MIN MAX 15 15 Unit pF pF
Parameter Input capacitance I/O capacitance
Note: TO = 25, VCC = 0 V.
4.3
Parameter
DC Characteristics
Symbol Condition IOH = -2 mA MIN. 2.4 TYP. MAX. Unit V
High-level output voltage VOH
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Low-level voltage output VOL VIH VIL ILI ILO Idrive1 Idrive3 IVDD IVCC VCC = 3.1V, VI = VCC, 0 V VCC = 3.1 V, VI = VCC, 0 V GPOA0,GPOA1,GPOA2 Other GPIO In Full speed mode In Standby mode In Full speed mode In Standby mode 4 10 2 12 50 0.2 73 15 60 0.5 76 IOL = 2 mA 0.6VCC -0.3 0.4 V
High-level input voltage Low-level input voltage Input leakage current Output leakage current GPIO Drive
VCC+0.6 V 0.4VCC +10 +5 V uA uA mA mA mA mA uA mA uA
Idrive2 GPIO_B2, GPIO_B4, GPIO_B5
Supply Current One battery mode
NOTES: 1. To = -10 to +70, VDD = 1.8, VCC = 3.1 V 2. IVDD is a total power supply current for the 1.8V power supply. IVDD is applied to the LOGIC and PLL and OSC block. 3. IVCC is a total power supply current for the 3.1 V power supply. IVCC is applied to the USB, IO, TP, and AD block.
4.4
AC Characteristics
To = -10 to +70
4.4.1 AC Test Input Waveform
4.4.2 AC Test Output Measuring Points
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4.4.3 Reset Parameter
Parameter Reset input low-level width Symbol Condition RESET# pin MIN. 160 MAX. Unit us
tWRSL
4.4.4 Initialization Parameter
Parameter Data sampling time(from RESET# ) Output delay time (from RESET# ) Symbol Condition MIN. MAX. 61.04 61.04 Unit us us
tSS tOD
4.4.5 GPIO Interface Parameter
Parameter Input level width Symbol Condition MIN. 11/fMCUCLK Normal operation 11/ fMCUCLK 200 200 MAX. Unit s ns ns s
tGPIN GPIO input rise time tGPRISE GPIO input fall time tGPFALL Output level width tGPOUT
Note: fMCUCLK is the frequency that MCU is running upon. Input level width
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Input rise/fall time
Output level width
4.4.6 Ordinary ROM Parameter
Parameter Data access time (from address)Note Data access time (from CEx# )Note Data input setup time Data input hold time Symbol tACC tCE tDS tDH Condition HOSC=24MHz HOSC=24MHz HOSC=24MHz HOSC=24MHz MIN. 102 82 0 0 MAX. Unit ns ns ns ns
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4.4.7 External System Bus Parameter
Parameter Address setup time (to command signal)Note 1, 2
Symbol Condition
MIN. MAX. Unit ns ns ns ns ns ns ns
Memory Read 25 tXAS Memory Write 10 tXAS Address hold time (from command signal)Note 1, 2 tXAH 5 Data output setup time (to command signal)Note 1 tWXDS 20 Data output hold time(from command signal)Note 1 tWXDH 10 Data input setup time (to command signal)Note 1 20 tRXDS Data input hold time (from command signal)Note 1 tRXDH 10
Notes: 1. MRD# and MWR# are called the command signals for the External System Bus Interface. 2. T (ns) = 1/ fMCUCLK
4.4.8 Bus Operation
Memory Read Timing
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Memory Write Timing
4.4.9 A/D Converter Characteristics
(TA = -10 - +70, VDD = 1.8V, VCC = 3.1V, Sample Rate=32KHz) Characteristics Dynamic range Total Harmonic Distortion + Noise Frequency Response Fluctuation (20-13KHz) Full Scale Input Voltage(Gain=0dB) 2 76 0.3 Min Typ. 80 Max Unit dB dB dB VPP
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4.4.10 Headphone Driver Characteristics Table
(To =-10 - +70, VDD = 1.8V, VCC = 3.1 V, Sample Rate=32KHz, Volume Level=0x1F) Characteristics Dynamic Range -60 dBFS Input 81 0.1 1.5 1.1 94 Total Harmonic Distortion + Noise Frequency Response Fluctuation 20-20KHz Output Common Mode Voltage Full Scale Output Voltage Inter-channel Isolation (1KHz)
A u d io P r e c is io n
Min
Typ 90
Max
Unit dB dB dB V VPP dB
Frequency Response Diagram of Headphone Driver
A C U 7 5 0 3 P A F re q u e n c y R e s p o n s e @ 1 V p p I n p u t,1 6 o h m s L o a d 0 6 /2 7 /0 6 1 1 :2 0 :3 4
-0 -1 -2 -3 d B r A -4 -5 -6 -7 -8 -9 -1 0 20 50 100 200 500 Hz
Sweep 1 1 T ra c e 1 2 C o lo r Y e llo w Red L i n e S ty l e S o lid S o lid T h ic k 1 1 D a ta A n l r .L e v e l A A n l r .L e v e l B A xis L e ft L e ft Com m ent
1k
2k
5k
10k
20k
R e q u i r e s D S P . A n a l o g A n a l y z e r i n p u t i s A - D c o n v e r te d a n d a n a l y z e d w i th th e F F T D i g i ta l a n a l y z e r . S i g n a l s o u r c e m a y b e G e n e r a to r o r e x te r n a l . C l i c k " S w e e p S p e c tr u m /W a v e fo r m " s w a p b u tto n to s w i tc h b e tw e e n fr e q u e n c y a n d ti m e d i s p l a y s . A - A F F T .a t2 7
THD + N Amplitude Diagram of Headphone Driver:
A u d io P r e c is io n ACU7503 P A T H D + N v s A m p litu d e @ 16ohm s Load 0 6 /2 7 /0 6 1 1 :1 5 :2 6
+0 -1 0 -2 0 -3 0 -4 0 d B -5 0 -6 0 -7 0 -8 0 -9 0 -1 0 0 0 200m 400m 600m V pp
Sw eep 1 1 T ra c e 1 2 C o lo r Y e llo w Red L in e S ty le S o lid S o lid T h ic k 1 1 D a ta A n l r .T H D + N A n l r .T H D + N R a tio R a tio A xis L e ft L e ft Com m ent
800m
1
1 .2
1 .4
R e q u i r e s D S P . A n a l o g A n a l y z e r i n p u t i s A - D c o n v e r te d a n d a n a l y z e d w i th th e F F T D i g i ta l a n a l y z e r . S i g n a l s o u r c e m a y b e G e n e r a to r o r e x te r n a l . C l i c k " S w e e p S p e c tr u m /W a v e fo r m " s w a p b u tto n to s w i tc h b e tw e e n fr e q u e n c y a n d ti m e d i s p l a y s . A - A F F T .a t2 7
Copyright (c) Actions Semiconductor Co., Ltd. 2006. All rights reserved.
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4.4.11 LCM Driver Parameter
Parameter Data access time(write) Data access time (Read) Write cycle time Read cycle time Data setup time Data hold time Address setup time Address hold time Read access time Data input hold time
Symbol tPW80(W) tPW80(R) tCY80(W) tCY80(R) tDS80 tDH80 tAS80 tAH80 tACC80 tOD80
Condition HOSC=24MHZ HOSC=24MHZ HOSC=24MHZ HOSC=24MHZ HOSC=24MHZ HOSC=24MHZ HOSC=24MHZ HOSC=24MHZ HOSC=24MHZ HOSC=24MHZ
Typ 29 67 407 284 79 8 11 11 13 8
Unit ns ns ns ns ns ns ns ns ns ns
Copyright (c) Actions Semiconductor Co., Ltd. 2006. All rights reserved.
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5
5.1
Soldering Conditions and Package Description
Recommended Soldering Conditions (Lead Free)
Soldering Conditions for Surface-Mount Devices Soldering Process Soldering Conditions Peak package's surface temperature: 260 Reflow time: 60 seconds or less (217 or more) Infrared ray reflow Maximum allowable number of reflow processes: 2 Exposure limit: 1 days at Rh=60%, Tem=30 (12 hours of pre-baking is required at 125 afterward). Partial heating method Terminal temperature: 300 or less Heat time: 3 seconds or less (for one side of a device)
Note: Maximum number of days during which the product can be stored at a temperature of 25 and a relative humidity of 65% or less after dry-pack package is opened. Caution: Do not apply two or more different soldering methods to one chip (except for partial heating method for terminal sections).
5.2
Precaution against ESD for Semiconductors
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once that has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it.
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ACU7503PRODUCT DATASHEET
5.3
Handling of Unused Input Pins for CMOS
No connection for CMOS device inputs can be the cause of a malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to a VDD or GND with a resistor if it is considered to have the possibility of being an output pin. All handling related to the unused pins must be judged device by device using the related specifications governing the devices.
5.4
Status before Initialization of MOS Devices
Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operations must be executed immediately after power-on.
5.5
ACU7503 Package Drawing
Copyright (c) Actions Semiconductor Co., Ltd. 2006. All rights reserved.
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ACU7503PRODUCT DATASHEET
Copyright (c) Actions Semiconductor Co., Ltd. 2006. All rights reserved.
Ver 1.3
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ACU7503PRODUCT DATASHEET
Actions Semiconductor Co., Ltd.
Address: Bldg.15-1, NO.1, HIT Rd., Tangjia, Zhuhai, Guangdong, China Tel: +86-756-3392353 Fax: +86-756-3392251 Post code: 519085 http://www.actions-semi.com Business Email: mp-sales@actions-semi.com Technical Service Email: mp-cs@actions-semi.com
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