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| PROCESS Small Signal Transistor PNP - High Current Transistor Chip CP720 Central TM Semiconductor Corp. PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization EPITAXIAL PLANAR 22 x 22 MILS 9.0 MILS 5.7 X 4.0 MILS 5.3 X 4.0 MILS Al - 30,000A Au - 18,000A GEOMETRY GROSS DIE PER 4 INCH WAFER 22,400 PRINCIPAL DEVICE TYPES MPSA55 MPSA56 BACKSIDE COLLECTOR 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R3 (21-September 2003) Central TM PROCESS CP720 Semiconductor Corp. Typical Electrical Characteristics 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R3 (21-September 2003) |
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