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STP130NH02L N-channel 24V - 0.0034 - 120A - TO-220 STripFETTM Power MOSFET for DC-DC conversion Features Type STP130NH02L VDSS 24V RDS(on) <0.0044 ID 90(1) 1. Value limited by wire bonding RDS(on) *Qg industry's benchmark Low Conduction losses reduced Switching losses reduced Low Threshold device TO-220 3 1 2 Description These devices utilizes the latest advanced design rules of ST's proprietary STripFETTM technology. It is ideal in high performance DC-DC converter applications where efficiency is to be achieved at very high output currents. Internal schematic diagram Application Switching application Order code Part number STP130NH02L Marking P130NH02L Package TO-220 Packaging Tube April 2007 Rev 7 1/14 www.st.com 14 Contents STP130NH02L Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 4 5 6 Test circuit ................................................ 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 STP130NH02L Electrical ratings 1 Electrical ratings Table 1. Symbol Vspike(1)) VDS VDGR VGS ID(2) ID(2) IDM (3) Parameter Drain-source voltage rating Drain-source voltage (VGS = 0) Drain-gate voltage (RGS = 20 k) Gate- source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC = 100C Drain current (pulsed) Total dissipation at TC = 25C Derating factor Value 30 24 24 20 90 90 360 150 1 900 -55 to 175 Unit V V V V A A A W W/C mJ C Ptot (4) EAS Single pulse avalanche energy Storage temperature Max. operating junction temperature Tstg Tj 1. Guaranteed when external Rg=4.7 and tf < tfmax 2. Value limited by wire bonding 3. Pulse width limited by safe operating area 4. Starting TJ = 25C, ID = 45A, VDD = 10V Table 2. Rthj-case Rthj-amb Tl Thermal data Thermal resistance junction-case max Thermal resistance junction-ambient max Maximum lead temperature for soldering purpose 1.0 62.5 300 C/W C/W C 3/14 Electrical characteristics STP130NH02L 2 Electrical characteristics (TCASE=25C unless otherwise specified) Table 3. Symbol V(BR)DSS On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Test conditions ID = 25mA VDS = Max rating, VDS = Max rating, TC=125C VGS= 0 Min. 24 1 10 Typ. Max. Unit V A A IDSS IGSS VGS(th) RDS(on) Gate body leakage current VGS = 20V (VDS = 0) Gate threshold voltage Static drain-source on resistance VDS = VGS, ID = 250A VGS = 10V , ID = 45A VGS = 5V, ID = 22.5A 1 100 A V 0.0034 0.0044 0.005 0.008 Table 4. Symbol gfs (1) Ciss Coss Crss td(on) tr td(off) tf Rg Qg Qgs Qgd Qoss (2) Qgls (3) Dynamic Parameter Test conditions Min. Typ. 55 4450 1126 141 14 224 69 40 1.6 Max. Unit S pF pF pF ns ns ns ns Forward transconductance VDS = 10V, ID = 45A Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Off voltage rise time Fall time Gate input resistance VDS = 15V, f = 1MHz, VGS = 0 VDD = 10V, ID = 45A, RG = 4.7, VGS = 10V (see Figure 13) f = 1MHz gate DC bias=0 test signal level=20mV open drain VDD=10V, ID = 90A VGS =10V (see Figure 14) VDS = 16V, VGS = 0 VDS < 0, VGS= 10V Total gate charge Gate-source charge Gate-drain charge Output charge Third-quadrant gate charge 69 13 9 27 64 93 nC nC nC ns ns 1. Pulsed: pulse duration = 300s, duty cycle 1.5% 2. Qoss = Coss* VIN, Coss = Cgd + Cds. See power losses calculation 3. Gate charge for synchronous operation. 4/14 STP130NH02L Electrical characteristics Table 5. Symbol ISD ISDM VSD (1) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 45A, VGS = 0 ISD = 90A, di/dt = 100A/s, VDD = 15V, TJ =150C 47 58 2.5 Test conditions Min. Typ. Max. 90 360 1.3 Unit A A V ns nC A 1. Pulsed: pulse duration = 300s, duty cycle 1.5% 5/14 Electrical characteristics STP130NH02L 2.1 Figure 1. Electrical characteristics (curves) Safe operating area Figure 2. Thermal impedance Figure 3. Output characteristics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/14 STP130NH02L Figure 7. Gate charge vs gate-source voltage Figure 8. Electrical characteristics Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on resistance vs temperature Figure 11. Source-drain diode forward characteristics Figure 12. Normalized BVDSS vs temperature 7/14 Test circuit STP130NH02L 3 Test circuit Figure 14. Gate charge test circuit Figure 13. Switching times test circuit for resistive load Figure 15. Test circuit for inductive load Figure 16. Unclamped Inductive load test switching and diode recovery times circuit Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform 8/14 STP130NH02L Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/14 Package mechanical data STP130NH02L TO-220 MECHANICAL DATA DIM. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 mm. MIN. 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 MIN. 0.173 0.024 0.045 0.019 0.60 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 0.645 1.137 0.151 0.116 inch TYP. MAX. 0.181 0.034 0.066 0.027 0.620 0.409 0.106 0.202 0.052 0.256 0.107 0.551 0.154 oP Q 10/14 STP130NH02L Appendix A 5 Appendix A Figure 19. Buck converter: power losses estimation The power losses associated with the FETs in a synchronous buck converter can be estimated using the equations shown in the table below. The formulas give a good approximation, for the sake of performance comparison, of how different pairs of devices affect the converter efficiency. However a very important parameter, the working temperature, is not considered. The real device behavior is really dependent on how the heat generated inside the devices is removed to allow for a safer working junction temperature. The low side (SW2) device requires: Very low RDS(on) to reduce conduction losses Small Qgls to reduce the gate charge losses Small Coss to reduce losses due to output capacitance Small Qrr to reduce losses on SW1 during its turn-on The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source voltage to avoid the cross conduction phenomenon; The high side (SW1) device requires: Small Rg and Ls to allow higher gate current peak and to limit the voltage feedback on the gate Small Qg to have a faster commutation and to reduce gate charge losses Low RDS(on) to reduce the conduction losses. 11/14 Appendix A STP130NH02L Table 6. Power losses calculation High side switching (SW1) Low side switch (SW2) Pconduction R DS(on)SW1 * I 2 * L R DS(on)SW2 * I 2 * (1 - ) L IL Ig Pswitching Vin * (Q gsth(SW1) + Q gd(SW1) ) * f * Zero Voltage Switching Recovery (1) Not applicable Vin * Q rr(SW2) * f Pdiode Conductio n Not applicable Vf(SW2) * I L * t deadtime * f Q gls(SW2) * Vgg * f Vin * Q oss(SW2) * f 2 Pgate(QG) Q g(SW1) * Vgg * f PQoss Vin * Q oss(SW1) * f 2 1. Dissipated by SW1 during turn-on Table 7. Parameters meaning Meaning Duty-cycle Post threshold gate charge Third quadrant gate charge On state losses On-off transition losses Conduction and reverse recovery diode losses Gate drive losses Output capacitance losses Parameter d Qgsth Qgls Pconduction Pswitching Pdiode Pgate PQoss 12/14 STP130NH02L Revision history 6 Revision history Table 8. Date 14-Mar-2005 24-Mar-2005 19-Jun-2006 13-Apr-2007 Revision history Revision 4 5 6 7 Preliminary document New package inserted (TO-220) New template, no content change Package removed (D2PAK) Changes 13/14 STP130NH02L Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZE REPRESENTATIVE OF ST, ST PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS, WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 14/14 |
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