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HD74HC93 4-bit Binary Counter REJ03D0557-0200 (Previous ADE-205-430) Rev.2.00 Oct 06, 2005 Description The HD74HC93 is a 4-bit ripple type counter consisting of four master/slave flip-flops that are internally connected to provide separate divide-by-two and divide-by-eight sections. Each section has a separate clock input which initiates state changes of the counter on the high-to-low clock transition. State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and should not be used as clocks or as strobes except when gated with the clock of the HD74HC93. QA is the output of the divide-by-two section; QB, QC, and QD are the binary outputs of the divide-by-eight section. A gated AND asynchronous reset is provided which resets all the flip-flops. Because the output from the divide-by-two section is not internally connected to the succeeding stages, the devices may be operated in various counting modes: 1. A 4-bit ripple counter - The QA output must be externally connected to the clock B input. The input count pulses are applied to the clock A input. Simultaneous divisions of 2, 4, 8 and 16 are performed at the QA, QB, QC and QD outputs. 2. A 3-bit ripple counter - The input count pulses are applied to the clock B input. Simultaneous frequency divisions of 2, 4 and 8 are available at the QB, QC and QD outputs. Independent use of the first flip-flop is available if the reset function coincides with reset of the 3-bit ripple-through counter. Features * * * * * * High Speed Operation: tpd (A to QA) = 13 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) Ordering Information Part Name HD74HC93P HD74HC93FPEL HD74HC93RPEL Package Type DILP-14 pin SOP-14 pin (JEITA) SOP-14 pin (JEDEC) Package Code (Previous Code) PRDP0014AB-B (DP-14AV) PRSP0014DF-B (FP-14DAV) Package Abbreviation P FP -- EL (2,000 pcs/reel) EL (2,500 pcs/reel) Taping Abbreviation (Quantity) PRSP0014DE-A RP (FP-14DNV) Note: Please consult the sales office for the above package availability. Function Table Reset/Count Function Table Reset Inputs R0(1) H L X R0(2) H X L QD L QC L Count Count Outputs QB L QA L Rev.2.00, Oct 06, 2005 page 1 of 7 HD74HC93 BCD Count Sequence Outputs Count 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Note: H: L: X: QD L L L L L L L L H H H H H H H QC L L L L H H H H L L L L H H H H QB L L H H L L H H L L H H L L H H QA L H L H L H L H L H L H L H L H 15 H Output QA is connected to input B for BCD count. High level Low level Irrelevant Pin Arrangement B R0(1) R0(2) NC Vcc NC NC 1 2 3 4 5 6 QC 7 (Top View) 8 QC QB B R0(1) R0(2) A 13 NC QA QD 12 QA 11 QD 10 GND 9 QB 14 A Rev.2.00, Oct 06, 2005 page 2 of 7 HD74HC93 Logic Diagram C Input A C R Q QA Q C Input B C R Q Q QB C C R Q Q QC C C R R0(1) R0(2) Q Q QD Absolute Maximum Ratings Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Symbol VCC Vin, Vout IIK, IOK IO ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 25 50 500 -65 to +150 Unit V V mA mA mA mW C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time Note: *1 Symbol VCC VIN, VOUT Ta tr , tf Ratings 2 to 6 0 to VCC -40 to 85 0 to 1000 0 to 500 0 to 400 Unit V V C Conditions VCC = 2.0 V ns VCC = 4.5 V VCC = 6.0 V 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Rev.2.00, Oct 06, 2005 page 3 of 7 HD74HC93 Electrical Characteristics Ta = 25C Item Input voltage Symbol VCC (V) VIH 2.0 4.5 6.0 VIL 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOL 2.0 4.5 6.0 4.5 Input current Quiescent supply current Iin ICC 6.0 6.0 6.0 Min 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.18 5.68 -- -- -- -- -- -- -- Typ -- -- -- -- -- -- 2.0 4.5 6.0 -- -- 0.0 0.0 0.0 -- -- -- -- Max -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.26 0.26 0.1 4.0 Ta = -40 to+85C Min 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.13 5.63 -- -- -- -- -- -- -- Max -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.33 0.33 1.0 40 V IOH = -4 mA IOH = -5.2 mA Vin = VIH or VIL IOL = 20 A V Unit V Test Conditions Output voltage VOH V Vin = VIH or VIL IOH = -20 A IOL = 4 mA IOL = 5.2 mA A Vin = VCC or GND A Vin = VCC or GND, Iout = 0 A Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25C Item Maximum clock Frequency Propagation delay time Symbol VCC (V) fmax 2.0 4.5 6.0 tPLH, tPHL 2.0 4.5 6.0 2.0 4.5 6.0 tPLH, tPHL 2.0 4.5 6.0 2.0 4.5 6.0 tPLH, tPHL 2.0 4.5 6.0 2.0 4.5 6.0 Output fall time tTLH, tTHL 2.0 4.5 6.0 -- Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- 13 -- -- 42 -- -- 13 -- -- 21 -- -- 27 -- -- 13 -- -- 5 -- 5 Max 5 27 32 120 24 20 340 68 58 130 26 22 185 37 31 220 44 37 175 35 30 75 15 13 10 Ta = -40 to +85C Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max 4 21 25 150 30 26 425 85 72 165 33 28 230 46 39 275 55 47 220 44 37 95 19 16 10 ns ns B to QD ns B to QB ns A to QA Unit MHz Test Conditions tPLH, tPHL ns A to QD tPLH, tPHL ns B to QC tPLH, tPHL ns Set-to-0 to QA to D Input capacitance Cin pF Rev.2.00, Oct 06, 2005 page 4 of 7 HD74HC93 Test Circuit VCC VCC Output A QA Output B QB Output R0(1) R0(2) QC Output QD CL = 50 pF CL = 50 pF CL = 50 pF CL = 50 pF Input Pulse generator Zout = 50 Note: CL includes the probe and jig capacitance. Waveforms * Waveform - 1 tr Count Down 90% 10% 50% 10% 50% See Function Table tf VCC 0V tPLH (Measure at tn+1) 90% 50% 10% tPHL (Measure at tn+2) QA 90% 50% 10% VOH VOL VOH VOL VOH VOL VOH VOL tTHL tPHL (Measure at tn+4) 90% tTLH tPLH (Measure at tn+2) 90% 50% 10% QB 50% 10% tTHL tPHL (Measure at tn+8) QC 90% 50% 10% tTLH tPLH (Measure at tn+4) 90% 50% 10% tTHL tPHL (Measure at tn+16) 90% tTLH tPLH (Measure at tn+8) 90% 50% 10% QD 50% 10% tTHL tTLH Notes: 1. Input waveform: PRR 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns 2. tn is reference bit time when all outputs are low. Rev.2.00, Oct 06, 2005 page 5 of 7 HD74HC93 * Waveform - 2 tr 90 % 50 % 50 % 10 % tf VCC 10 % Ro 0V tW t PHL 90 % VOH 50 % 10 % QA to QD VOL t THL Notes: 1. Input waveform: PRR 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns Package Dimensions JEITA Package Code P-DIP14-6.3x19.2-2.54 RENESAS Code PRDP0014AB-B Previous Code DP-14AV MASS[Typ.] 0.97g D 14 8 1 b3 7 Z E Reference Symbol Dimension in Millimeters Min Nom 7.62 19.2 6.3 20.32 7.4 5.06 0.51 0.40 0.48 1.30 0.19 0 2.29 2.54 0.25 0.31 15 2.79 2.39 2.54 0.56 Max A A1 e1 D E L A A1 bp e bp e1 c b3 c e Z ( Ni/Pd/Au plating ) L Rev.2.00, Oct 06, 2005 page 6 of 7 HD74HC93 JEITA Package Code P-SOP14-3.95x8.65-1.27 RENESAS Code PRSP0014DE-A Previous Code FP-14DNV MASS[Typ.] 0.13g *1 D 8 F 14 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. bp *2 Index mark HE E c Reference Symbol Dimension in Millimeters Min Nom 8.65 3.95 Max 9.05 Terminal cross section ( Ni/Pd/Au plating ) 1 Z e *3 D E A2 7 bp x M L1 A1 A bp b1 c c1 0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25 A HE 0 5.80 6.10 1.27 8 6.20 A1 L e x y 0.25 0.15 0.635 0.40 1 y Detail F Z L L 0.60 1.08 1.27 JEITA Package Code P-SOP14-5.5x10.06-1.27 RENESAS Code PRSP0014DF-B Previous Code FP-14DAV MASS[Typ.] 0.23g *1 D 8 F NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. 14 bp HE E Index mark *2 c Reference Symbol Dimension in Millimeters Min Nom 10.06 5.50 Max 10.5 Terminal cross section ( Ni/Pd/Au plating ) 1 Z e *3 D E A2 A1 0.00 7 bp x M L1 0.10 0.20 2.20 A bp b1 c c 1 0.34 0.40 0.46 0.15 0.20 0.25 A HE 0 7.50 7.80 1.27 8 8.00 A1 y L e x y 0.12 0.15 1.42 0.50 1 Detail F Z L L 0.70 1.15 0.90 Rev.2.00, Oct 06, 2005 page 7 of 7 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. 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