View LA74303FN_4275084.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Ordering number : ENA1181
LA74303FN
Overview
Monolithic Linear IC
Audio Interface for DSC
The LA74303FN is a SPEAKER AMP and MIC AMP built-in audio interface for DSC.
Functions
* Three-wire type SERIAL communication, MIC AMP * MIC power supply incorporated (with buit-in pull-up resistor), ALC AMP * PB input method: Compatible with analog or digital () signal input * 3rd order LPF(compatible with REC/PB changeover, fc=4kHz or 11kHz selectable) * SPEAKER AMP (compatible with BEEP input MIX) * Electronic VOLUME (compatible with SERIAL communication control) * LINE output (with SERIAL MUTE), compatible with STANDBY control
Specifications
Maximum Ratings at Ta=25C
Parameter Maximum supply voltage 1 Maximum supply voltage 2 Allowable power dissipation Operating temperature Storage temperature Symbol VCCA max VCCSP max Pd max Topr Tstg Ta85C * Conditions Ratings 5.0 5.0 500 -15 to +85 -55 to +150 Unit V V mW C C
* Substrate mounting condition (30mm x 50mm x 0.8mm: glass epoxy) 2S2P
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
52808 TI IM 20060710-S00001 No.A1181-1/18
LA74303FN
Operating Conditions at Ta = 25C
Parameter Recommended supply voltage Symbol VCCA VCCSP Allowable operating voltage range VCCA VCCSP Take care not to exceed Pd max. Conditions Ratings 3.0 3.3 2.7 to 3.6 2.7 to 3.6 Unit V V V V
Electrical Characteristics at Ta=25C, VCCA=3.0V, VCCSP=3.3V, f=1kHz, with the VREF capacitance charging circuit in the OFF MODE
Parameter Circuit current VCCA current dissipation at no signal 1 VCCA current dissipation at no signal 2 VCCA current dissipation at no signal 3 VCCA standby current dissipation Current dissipation at no signal 5 Current dissipation at no signal 6 VCCSP standby current dissipation REC output system REC reference output LEVEL REC reference output distortion ALC characteristics 1 ALC distortion 1 ALC characteristics 2 ALC distortion 2 ALC IN max input level REC output noise voltage REC output frequency characteristics 1 REC output frequency characteristics 2 REC output frequency characteristics 3 LINE output system LINE reference output LEVEL LINE reference output distortion rate LINE reference output noise voltage PB IN max input LEVEL LINE output frequency characteristics 1 LINE output frequency characteristics 2 LINE output frequency characteristics 3 VOL HDL VNOL VINPMX FEQP1 FEQP2 FEQP3 PB IN, VIN=-15dBV PB IN, VIN=-15dBV, THD: from 2nd to 5th harmonic PB IN, no input, JIS-A Filter PB IN LEVEL at which LINE output THD (from 2nd to 5th harmonic) becomes 3% or less. PB IN, VIN=-8dBV, comparison of f=4kHz/1kHz PB IN, VIN=-8dBV, comparison of f=22kHz/1kHz PB IN, VIN=-8dBV, comparison of f=100kHz/1kHz -5 -3.5 -33 -65 -12 -11 0.1 -85 -10 0.2 -77 -5 -2 -25 -60 dBV % dBV dBV dB dB dB VOR HDR ALM1 ALMD1 ALM2 ALMD2 VINRMX VNOR FEQR1 FEQR2 FEQR3 ALC IN, VIN=-49dBV ALC IN, VIN=-49dBV, THD: from 2nd to 5th harmonic ALC IN, VIN=-33dBV (standard+16dB) ALC IN, VIN=-33dBV (standard+16dB), THD: from 2nd to 5th harmonic ALC IN, VIN=-17dBV (standard+32dB) ALC IN, VIN=-17dBV (standard+32dB), THD: from 2nd to 5th harmonic ALC IN LEVEL at which REC output THD (from 2nd to 5th harmonic) becomes 3% or less. ALC IN, no input, JIS-A Filter ALC IN, VIN=-33dBV, comparison of f=4kHz/1kHz ALC IN, VIN=-33dBV, comparison of f=22kHz/1kHz ALC IN, VIN=-33dBV, comparison of f=100kHz/1kHz -5 -77 -3.5 -33 -60 -11 -11 -16.5 -15.5 0.05 -8 0.15 -8 0.2 -14.5 0.1 -5 0.5 -5 1 -10 -68 -2 -25 -55 dBV % dBV % dBV % dBV dBV dB dB dB ICCA1 ICCA2 ICCA3 ICCAS ICCSP1 ICCSP2 ICCSPS VCCA=3.0V VCCA=3.0V: REC BLOCK (MIC/ALC/REC AMP) POWER SAVE MODE VCCA=3.0V: LINE AMP POWER SAVE MODE VCCA=3.0V: during standby control (4PIN=0V application) VCCSP=3.3V: SPK POWER ON MODE VCCSP=3.3V: SPK POWER SAVE MODE VCCSP=3.3V: during standby control (4PIN=0V application) 1.2 2.5 0.05 5.5 7 5 6.5 9.4 6.7 8.7 11.8 8.4 10.9 1 5 0.1 10 mA mA mA A mA mA A Symbol Conditions min Ratings typ max Unit
Continued on next page.
No.A1181-2/18
LA74303FN
Continued from preceding page.
Parameter Symbol Conditions min SP output system (SP load = as measured at both ends of 8) SP reference output LEVEL1 (Vol.MAX) SP reference output distortion SP reference output LEVEL2 (Vol.TYP) SP reference output LEVEL3 (Vol.MIN) SP reference output noise voltage SP maximum ratings output MIC output system MIC voltage gain MIC output distortion MIC output noise voltage MIC IN max input level MIC VCC output voltage Control system Serial CLOCK frequency Serial input LOW level Serial input HIGH level FCLK SERLO SERHI 0 2.3 1.25 1.5 0.7 3.5 MHz V V VGMIC HDMIC VNOMIC VINMMX VMIC MIC IN, VIN=-39dBV MIC IN, VIN=-39dBV, THD: from 2nd to 5th harmonic MIC IN, no input, JIS-A Filter MIC IN LEVEL at which the MIC output THD (from 2nd to 5th harmonic) becomes 3% or less. At 6.2k load 1.5 1.7 19 20 0.02 -94 21 0.1 -83 -22 1.9 dB % dBV dBV V VOSP1 THDSP VOSP2 VOSP3 VNOSP VOMSP PB IN, VIN=-15dBV, Vol=MAX (Serial DATA=31) PB IN, VIN=-15dBV, Vol=MAX, THD: from 2nd to 5th harmonic PB IN, VIN=-15dBV, Vol=TYP (Serial DATA=17) PB IN, VIN=-15dBV, Vol=MIN (Serial DATA=0), JIS-A Filter PB IN, no input, Vol=MAX, JIS-A Filter PB IN, Vol=MAX, LEVEL at which THD=10% 200 -19 -5 -2 0.4 -13 -80 -76 340 1 1 -7 -70 -70 dBV % dBV dBV dBV mW Ratings typ max Unit
Package Dimensions
unit : mm (typ) 3364
TOP VIEW 4.0 SIDE VIEW BOTTOM VIEW
(0.05)
Exposed Die-Pad Do Not Connect (0.9)
0.45
(0.9)
4.0
12 SIDE VIEW
21
0.0 NOM
0.16
(0.8)
0.85 MAX
0.4
SANYO : VQFN24(4.0X4.0)
24
(1.0)
No.A1181-3/18
LA74303FN
Description of the Content of Serial Communication
DATA No. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 DUMMY LPF Cut-off frequency SW VREF capacitor charging circuit control SW MIC AMP POWER SW ALC AMP POWER SW LPF1 MODE SW LPF1/LPF2 selection SW REC BLOCK POWER SW LINE OUT POWER SW LINE MUTE SW SPK POWER SW DATA=1 DATA=2 DATA=4 DATA=8 DATA=16 0:11kHz, 1:4kHz 0:ON, 1:OFF 0:ON, 1:OFF 0:ON, 1:OFF 0:PB MODE1, 1:REC MODE 0:LPF1, 1:LPF2 0:ON, 1:OFF 0:ON, 1:OFF 0:ON, 1:OFF 0:ON, 1:OFF 1 1 1 1 1: VOL MAX to 0 0 0 0 0: VOL MIN (MUTE) * EVR setting (the numeral shown in the left is decimal. For characteristics, see P18.) Parameter Default 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 0
Serial Transmission Timing
VIH CS tCS CLOCK tDS DATA LSB MSB tDH VIH VIL fMAX tWH tWL tCH tWC VIH VIL VIL
* fMAX * tWL * tWH * tCS * tCH * tDS * tDH * tWC * VIH * VIL
(Max clock frequency) (Clock pulse width: Low) (Clock pulse width: High) (Chip enable setup time) (Chip enable hold time) (Data setup time) (Data hold time) (Chip enable pulse width) (High voltage lower limit) (Low voltage upper limit)
1.5MHz 333ns or more 333ns or more 333ns or more 333ns or more 333ns or more 333ns or more 333ns or more 2.3V to 3.5V 0V to 0.7V
No.A1181-4/18
LA74303FN
POWER ON Condition (SERIAL communication)
H VCCA (9PIN) & STANDBY (4PIN) L
Approx. 2ms H Power-on pulse (IC inside) L Dummy DATA It is recommended to send DATA the same as in the initial state. Main DATA
C.S.
2 to 3ms 1ms
1ms
Delay of several hundreds NS First Data communication Approx. 500ns
Power on reset (IC inside) Power on reset condition First DATA hold SERIAL communication condition
CLOCK and DATA not necessary
CS, CLOCK, and DATA necessary
The POWER ON RESET state covers a period up to the rise of the second C.S. input after fall of POWER ON PULSE generated inside IC when the power is applied and the STANDBY control is canceled. is the dummy communication. (It is recommended to send DATA the same as in the initial state.) Actually, because of delay of several hundreds ns in the IC, the first DATA condition begins in and the normal SERIAL communication condition begins after .
No.A1181-5/18
Input 0 DMY (1,*):REC (0,0):PB Analog (0,1):PB Digital 0:ON 1:OFF 0:ON 1:OFF 0:ON 1:OFF 0:ON 1:OFF 0:OFF 1:ON 0:OFF 1:ON 0:OFF 1:ON 0:OFF 1:ON * * 0:11kHz 1:4kHz 0:ON 1:OFF 0:ON 1:OFF 0:ON 1:OFF LPF MODESW REC P SW LINE P SW LINE Mute SPK P SW EVR1 DATA EVR2 DATA EVR4 DATA EVR8 DATA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Output
STANDBY pin Serial control setting
No. Symbol Voltage applied to pin 4 LPF C SW CHRG P SW MIC P SW ALC P SW
Pin
Conditions
Pin
Major conditions (for the serial control setting, see the table in the right)
EVR16 DATA 0:OFF 1:ON
Circuit current 3.3V 3.3V 3.3V 0V 3.3V 3.3V 0V 0 1 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 1 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1
ICCA1
9
VCCA=3.0V No input
9
VREF capacitance charging circuit in the OFF MODE
2
ICCA2
9
VCCA=3.0V No input
9
VREF capacitance charging circuit in the OFF MODE MIC/ALC/REC AMP POWER SAVE MODE
3
ICCA3
9
VCCA=3.0V No input
9
VREF capacitance charging circuit in the OFF MODE LINE AMP POWER SAVE MODE
4
ICCAS
9
VCCA=3.0V No input
9
With the STANDBY pin (4PIN)=0V
5
ICCS1
22
VCCSP=3.3V No input
22
VREF capacitance charging circuit in the OFF MODE SPK AMP ON MODE
6
ICCS2
22
VCCSP=3.3V No input
22
VREF capacitance charging circuit in the OFF MODE SPK AMP POWER SAVE MODE
7
ICCSPS
22
VCCSP=3.3V No input
22
With the STANDBY pin (4PIN)=0V
REC output system 3.3V 0 1 1 0 0 1 0 0 1 0 1 0 0 0 0 0
8
VOR
14
VIN=-49dBV f=1kHz 3.3V 0 1 1 0 0 1 0 0 1
12
400 to 20kHz LPF used
LA74303FN
9
HDR1
14
VIN=-49dBV f=1kHz 3.3V 0 1 1 0 0 1 0 0
12
400 to 20kHz LPF used THD: from 2nd to 5th harmonic
0
1
0
0
0
0
0
10
ALM1
14
VIN=-33dBV f=1kHz 3.3V 0 1 1 0 0 1 0
12
400 to 20kHz LPF used
1
0
1
0
0
0
0
0
11
ALMD1
14
VIN=-33dBV f=1kHz 3.3V 0 1 1 0 0 1
12
400 to 20kHz LPF used THD: from 2nd to 5th harmonic
0
1
0
1
0
0
0
0
0
12
ALM2
14
VIN=-17dBV f=1kHz 3.3V 0 1 1 0 0
12
400 to 20kHz LPF used
0
0
1
0
1
0
0
0
0
0
13
ALMD2
14
VIN=-17dBV f=1kHz 3.3V 0 1 1 0 0
12
400 to 20kHz LPF used THD: from 2nd to 5th harmonic
1
0
0
1
0
1
0
0
0
0
0
14 VINRMX
14
f=1kHz
400 to 20kHz LPF used 12&14 Pin 14 level at which pin 14 becomes THD = 3% (from 2nd to 5th harmonic) 3.3V 0 1 1 0
1
0
0
1
0
1
0
0
0
0
0
15
VNOR
14
No input
12
JIS-A FILTER used
0
1
0
0
1
0
1
0
0
0
0
0
16
FEQR1
14 1
VIN=-33dBV f=4kHz 3.3V 0 3.3V 0 1
12
f=4kHz/1kHz level ratio
1
0
0
1
0
0
1
0
1
0
0
0
0
0
Method of Measuring Electric Characteristics at Ta=25C, VCCA=3.0V, VCCSP=3.3V, f=1kHz VREF capacitor charging circuit OFF MODE
17
FEQR2
14
VIN=-33dBV f=22kHz 3.3V 0
12
f=22kHz/1kHz level ratio
1
0
0
1
0
0
1
0
1
0
0
0
0
0
No.A1181-6/18
1
18
FEQR3
14
VIN=-33dBV f=100kHz
12
f=100kHz/1kHz level ratio
1
0
0
1
0
0
1
0
1
0
0
0
0
0
Input 0 LPF MODESW (1,*):REC (0,0):PB Analog (0,1):PB Digital 0:ON 1:OFF 0:ON 1:OFF 0:ON 1:OFF 0:ON 1:OFF 0:OFF 1:ON 0:OFF 1:ON 0:OFF 1:ON 0:OFF 1:ON REC P SW LINE P SW LINE Mute SPK P SW EVR1 DATA EVR2 DATA EVR4 DATA EVR8 DATA DMY LPF C SW 0:11kHz 1:4kHz 0:ON 1:OFF 0:ON 1:OFF 0:ON 1:OFF CHRG P SW MIC P SW ALC P SW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 EVR16 DATA 0:OFF 1:ON
Output
STANDBY pin Serial control setting
No. Symbol
Pin * *
Conditions
Pin
Major conditions (for the serial control setting, see the table in the right)
Voltage applied to pin 4
LINE output system 3.3V 3.3V 3.3V 0 0 0 0 0 0 0 1 0 1 0 0 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 0 1 0 1 1 1 1 1 1 0 0 1 0 1 1 0 0 0 0 3.3V 3.3V 3.3V 3.3V 1 1 1 1 0 0 1 0 1 1 0 0 1 0 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19
VOL1
10
5
400 to 20kHz LPF used
20
HDL
10
VIN=-15dBV f=1kHz VIN=-15dBV f=1kHz
5
400 to 20kHz LPF used THD: from 2nd to 5th harmonic
21
VNOL
10
No input
5
JIS-A FILTER used
22 VINPMX
10
f=1kHz
5
400 to 20kHz LPF used Pin 10 level at which pin 5 becomes THD = 3% (from 2nd to 5th harmonic)
23
FEQP1
10
5
f=4kHz/1kHz level ratio
24
FEQP2
10
5
f=22kHz/1kHz level ratio
25
FEQP3
10
VIN=-8dBV f=4kHz VIN=-8dBV f=22kHz VIN=-8dBV f=100kHz
5
f=100kHz/1kHz level ratio
SPK output system (both ends of SPK: measured with 8) 3.3V 0 0 0 1 1 1 1 1 1 0 0 1 1 1 1 1
26
VOSP1
10
VIN=-15dBV f=1kHz 3.3V 0 0 0 1 1 1 1 1
21 23
400 to 20kHz LPF used Vol.=MAX
LA74303FN
27
THDSP
10
VIN=-15dBV f=1kHz 3.3V 0 1 1 1 1 0 0 1
21 23
400 to 20kHz LPF used Vol.=MAX, THD: from 2nd to 5th harmonic
1
0
0
1
1
1
1
1
28
VOSP2
10
VIN=-15dBV f=1kHz 3.3V 0 1 0 1 1 1 0
21 23
400 to 20kHz LPF used Vol.=TYP
1
0
0
1
0
0
0
1
29
VOSP3
10
VIN=-15dBV f=1kHz 3.3V 0 1 1 1 1 0
21 23
JIS-A FILTER used Vol.=MIN
1
1
0
0
0
0
0
0
0
30 VNOSP
10
No input
21 23 3.3V 0 1 1 1 1
JIS-A FILTER used Vol.=MAX
0
1
1
0
0
1
1
1
1
1
31 VOSSP
10
f=1kHz
21 23
400 to 20kHz LPF used Level at which Vol=MAX and THD=10% (from 2nd to 5th harmonic)
0
0
1
1
0
0
1
1
1
1
1
MIC output system 3.3V 3.3V 0 0 0 0 1 1 1 1 1 1 3.3V 3.3V 3.3V 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
32
VGMIC
17
VIN=-39dBV f=1kHz
15
400 to 20kHz LPF used
33
HDMIC
17
VIN=-39dBV f=1kHz
15
400 to 20kHz LPF used THD: from 2nd to 5th harmonic
34 VNOMIC
17
No input
15
JIS-A FILTER used
35 VINMMX
17
f=1kHz
15
400 to 20kHz LPF used Pin 17 level at which pin 15 becomes THD = 3% (from 2nd to 5th harmonic)
No.A1181-7/18
36
VMIC
17
No input
18
PIN 18: Measurement of output voltage (under 6.2k load)
LA74303FN
Description of Pin Functions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Speaker input MIX output BEEP input STANDBY control LINE output C.S. input CLOCK input DATA input VCCA PB input A GND REC output ALC detection ALC input MIC output MIC GND MIC input INT power supply for MIC Ripple rejection for VREFL SPK GND Speaker positive-phase output VCCSP Speaker negative-phase output SPK GND Pin Description
No.A1181-8/18
LA74303FN
LA74303FN Internal Equivalent Diagram and Recommended Circuit Diagram
MIC
0.01F 0.01F MIC IN 18 2.2k + 4.7F 20 19 MIC VCC VREF + 17 MIC GND 16 15 14 ALC 13 DET 12
0.47F
REC OUT
SPK
CHARGE Refer to table below 1.
For SW control, refer to table below 2.
11 A GND
LPF LPF1
21
A B C
10 LPF2 9 0.1F
PB IN
22 VCCSP 3.3V 23 +MUTE SPK GND 24 EVR
VCCA 3V
8 Mix ratio 1:1
DATA
+
1 2
LOGIC
7
CLOCK
3
4 0.01F 0.1F
5
6
C.S
0.047F 220k BEEP IN
LINE OUT STANDBY CTL: LOW 10k
Table 1: Logic of external capacitor charging circuit
SERIAL ON OFF No.2 0 1
Initially "ON" Table 2: LPF SW control logic
SERIAL A B C No.5 1 0 0 No.6 * 0 1
*) Don't care.
No.A1181-9/18
LA74303FN
Table of Input/Output Forms of LA74303FN
Pin No. 1 Pin Name SP IN DC voltage 1.27V AC voltage At PB reference input Output level = -8dBV (EVR MAX) Description of functions Speaker input pin Equivalent circuit diagram in pin
VCCSP(=3.3V)
10k 11k 1
23 SPK OUT1.27V At PB reference input Output level = -8dBV (EVR MAX) Pin for output of speaker reversed phase
23
2
MIX OUT
1.58V
At PB reference input Output level = -8dBV
EVR output pin
VCCA(=3.0V)
400 2
35k
3.9k
VREFL
3 BEEP IN 1.64V Maximum input level = -8dBV
VCCA(=3.0V)
2k 3 2k VREFL
4 STANDBY L STANDBY control pin 2V or more: STANDBY canceled
45k 4 40k
5
LINE OUT
1.52V
At PB reference input Output level = -11dBV
LINE output pin
VCCA(=3.0V)
232k 5 26k 500 10.5k
VREFL
6 CS CS input pin
7
CLOCK
CLOCK input pin
6 500 7
8 DATA DATA input pin
8
Continued on next page.
No.A1181-10/18
LA74303FN
Continued from preceding page.
Pin No. 9 10 Pin Name VCCA PB IN DC voltage 3.0V 1.64V Reference input level =-15dBV Maximum input level = -5dBV In analog input mode = 3.465Vpp In input mode AC voltage Description of functions Power pin for analog signal part PB input pin Equivalent circuit diagram in pin
VCCA(=3.0V)
10
25k
15k
10k
VREF
11 12 A GND REC OUT 0V 1.50V At PB reference input Output level = -15dBV GND pin for analog signal part REC output pin
VCCA(=3.0V)
500 12
20k
3k
VREF
13 ALC DET ALC detection pin
VCCA(=3.0V)
1k 13 500
14
ALC IN
1.64V
At MIC reference input Output level = -49dBV
ALC input pin
VCCA(=3.0V)
Max input level =-10dBV
500 14 50k
VREF
15 MIC OUT 1.6V At MIC reference input Output level = -49dBV MIC output pin
VCCA(=3.0V)
500 15
9.7k
1k
VREF Continued on next page.
No.A1181-11/18
LA74303FN
Continued from preceding page.
Pin No. 16 17 Pin Name MIC GND MIC IN DC voltage 0V 1.64V Reference input level =-69dBV Maximum input level =-30dBV AC voltage Description of functions For MIC Amp blocking GND pin MIC input pin Equivalent circuit diagram in pin
VCCA(=3.0V)
500 17 70k
VREFL
18 MIC VCC 2.30V MIC power pin
VCCA(=3.0V)
2.2k 18 23k
19
VREFL
2.30V
MIC VCC and VREFL ripple rejection pin
VCCA(=3.0V)
400 19 500 200k
20 24 21
SP GND SPK OUT+
0V 1.27V At PB reference input Output level = -8dBV (EVR MAX)
Speaker GND pin Speaker positive-phase output pin
VCCSP(=3.3V)
21
10k 10.7k 23
22
VCCSP
3.3V
Speaker power pin
No.A1181-12/18
LA74303FN
POP Sound Avoiding Sequence
1Upon STANDBY cancellation & control (PBMODE) Power Supply (VCCA & VCCSP) STANDBY pin (4PIN) CS CLOCK =Don't care =CLOCK DATA sending timing Optional After 10ms After 20ms After 50ms T0 T1 T2 T3 T4 After 200ms Before 10ms After 150ms (When pin 5 capacitance is 0.1F) T5 T6 T7 T8
Recommended serial control settings 0 1 LPF Timing Communication content DMY * * Standby cancellation T1 (3.3 V applied to pin 4) DATA unnecessary Dummy communication T2 (only CS) T3 T4 T5 T6 T7 (0 V applied to pin 4) VREF charging circuit: OFF Speaker AMP: ON Line AMP: ON Return to the initial state Standby control DATA unnecessary 0 0 0 0 0/1 0/1 0/1 1 1 1 1 0 1 1 1 0 1 1 1 0 0 0 0 0 0/1 0/1 0/1 0 1 1 1 0 1 1 0 1 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C SW 2 3 4 ALC 5 6 7 8 LINE 9 LINE 10 11 12 13 14 15
CHRG MIC
LPF MODESW REC (1, *): REC (0, 0): PB Analog (0, 1): PB Digital
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW P SW
P SW P SW MUTE P SW DATA DATA DATA DATA DATA 0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF 1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
0:11kHz 0:ON 0:ON 0:ON 1:4kHz 1:OFF 1:OFF 1:OFF
No.A1181-13/18
LA74303FN
2Upon STANDBY cancellation & control (RECMODE)
Power Supply (VCCA & VCCSP) STANDBY pin (4PIN) CS CLOCK =Don't care =CLOCK DATA sending timing T0 T1 T2 Optional After 10ms After 20ms After 30ms T3 T4 T5 T6 T7 After 200ms Before 10ms
Recommended serial control settings 0 1 LPF Timing Communication content DMY * * Standby cancellation T1 (3.3 V applied to pin 4) DATA unnecessary Dummy communication T2 (only CS) T3 T4 T5 T6 (0 V applied to pin 4) Charging circuit & ALC: OFF, LPF: REC ALC: ON Return to the initial state Standby control DATA unnecessary 0 0 0 0/1 0/1 1 1 1 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C SW 2 3 4 ALC 5 6 7 8 LINE 9 LINE 10 11 12 13 14 15
CHRG MIC
LPF MODESW REC (1, *): REC (0, 0): PB Analog (0, 1): PB Digital
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW P SW
P SW P SW MUTE P SW DATA DATA DATA DATA DATA 0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF 1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
0:11kHz 0:ON 0:ON 0:ON 1:4kHz 1:OFF 1:OFF 1:OFF
No.A1181-14/18
LA74303FN
3REC PB (SPK) Switching CS 4PB (SPK) REC Switching
CLOCK =Don't care =CLOCK Optional DATA sending timing T0 T1 T2
After 20ms or more (Capacitance between pins 1&2: 0.1F) T3 T4
After 20ms or more (Capacitance between pins 20&21: 0.1F)
Recommended serial control settings 0 1 LPF Timing Communication content DMY * * T0 T1 T2 T3 T4 Speaker AMP: OFF PBMODE: switching EVR: setting Speaker AMP: ON RECMODE: switching EVR: MUTE Speaker AMP: OFF Speaker AMP: ON 0 0 0/1 0/1 1 1 0 0 0 0 1 1 0/1 0/1 0 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C SW 2 3 4 ALC 5 6 7 8 LINE 9 LINE 10 11 12 13 14 15
CHRG MIC
LPF MODESW REC (1, *): REC (0, 0): PB Analog (0, 1): PB Digital 1 0 0 0/1 0/1 0/1
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW P SW
P SW P SW MUTE P SW DATA DATA DATA DATA DATA 0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF 1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON 0 1 1 1 1 1 0 0 0 1 1 0 0 a a 0 a a 0 a a 0 a a 0 a a
0:11kHz 0:ON 0:ON 0:ON 1:4kHz 1:OFF 1:OFF 1:OFF 0/1 0/1 0/1 1 1 1 0 1 1 0 1 1
Note) a=EVR in user setting.
5REC PB (LINE) Switching CS 6PB(LINE) REC Switching
CLOCK =Don't care =CLOCK DATA sending timing After 5ms or more T0 T1 T2
Recommended serial control settings 0 1 LPF Timing Communication content DMY * * T0 T1 T2 PBMODE: switching Line AMP: ON Line MUTE: OFF RECMODE: switching Line AMP: ON Line MUTE: OFF 0 0 0 C SW 2 3 4 ALC 5 6 7 8 LINE 9 LINE 10 11 12 13 14 15
CHRG MIC
LPF MODESW REC (1, *): REC (0, 0): PB Analog (0, 1): PB Digital 0 0 1 0/1 0/1 0/1
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW P SW
P SW P SW MUTE P SW DATA DATA DATA DATA DATA 0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF 1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON 1 1 0 1 0 1 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0:11kHz 0:ON 0:ON 0:ON 1:4kHz 1:OFF 1:OFF 1:OFF 0/1 0/1 0/1 1 1 1 1 1 0 1 1 0
No.A1181-15/18
LA74303FN
7EVR Switching (min max) 0.25ms/CS
CS
DATA sending timing
T0
T1
T2
T3
T4
T5
T6
T19 T20 T21 T22 T23
T24
T25
Recommended serial control settings 0 1 LPF Timing Communication content DMY * * T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 T24 T25 EVRDATA=0 EVRDATA=7 EVRDATA=8 EVRDATA=9 EVRDATA=10 EVRDATA=11 EVRDATA=12 EVRDATA=13 EVRDATA=14 EVRDATA=15 EVRDATA=16 EVRDATA=17 EVRDATA=18 EVRDATA=19 EVRDATA=20 EVRDATA=21 EVRDATA=22 EVRDATA=23 EVRDATA=24 EVRDATA=25 EVRDATA=26 EVRDATA=27 EVRDATA=28 EVRDATA=29 EVRDATA=30 EVRDATA=31 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C SW 2 3 4 ALC 5 6 7 8 LINE 9 LINE 10 11 12 13 14 15
CHRG MIC
LPF MODESW REC (1, *): REC (0, 0): PB Analog (0, 1): PB Digital 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW P SW
P SW P SW MUTE P SW DATA DATA DATA DATA DATA 0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF 1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0:11kHz 0:ON 0:ON 0:ON 1:4kHz 1:OFF 1:OFF 1:OFF 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Note) DATA1 to 6 are the mute area of EVR characteristics and jumped due to no generation of POP noise.
No.A1181-16/18
LA74303FN
8EVR Switching (max min) 0.25ms/CS
CS
DATA sending timing
T0
T1
T2
T3
T4
T5
T6
T19 T20 T21 T22 T23
T24
T25
Recommended serial control settings 0 1 LPF Timing Communication content DMY * * T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 T24 T25 EVRDATA=31 EVRDATA=30 EVRDATA=29 EVRDATA=28 EVRDATA=27 EVRDATA=26 EVRDATA=25 EVRDATA=24 EVRDATA=23 EVRDATA=22 EVRDATA=21 EVRDATA=20 EVRDATA=19 EVRDATA=18 EVRDATA=17 EVRDATA=16 EVRDATA=15 EVRDATA=14 EVRDATA=13 EVRDATA=12 EVRDATA=11 EVRDATA=10 EVRDATA=9 EVRDATA=8 EVRDATA=7 EVRDATA=0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C SW 2 3 4 ALC 5 6 7 8 LINE 9 LINE 10 11 12 13 14 15
CHRG MIC
LPF MODESW REC (1, *): REC (0, 0): PB Analog (0, 1): PB Digital 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW P SW
P SW P SW MUTE P SW DATA DATA DATA DATA DATA 0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF 1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
0:11kHz 0:ON 0:ON 0:ON 1:4kHz 1:OFF 1:OFF 1:OFF 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Note) DATA1 to 6 are the mute area of EVR characteristics and jumped due to no generation of POP noise.
No.A1181-17/18
LA74303FN
LA74303FN EVR characteristics 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0 5 10 15 20 25 30
EVR attenuation (dB)
Serial data set value (decimal)
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above.
This catalog provides information as of May, 2008. Specifications and information herein are subject to change without notice.
PS No.A1181-18/18

▲Up To Search▲

Price & Availability of LA74303FN

	To Download LA74303FN Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .