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Ordering number : ENA0600
Monolithic Linear IC
LA6579H
Overview
For CD-R
Four-Channel Bridge (BTL) Driver
The LA6579H is a 4-channel bridge (BTL) driver for CD-R.
Functions
* Bridge-connected (BTL) power amplifier incorporating four channels * IO max 1A * Level shift circuit incorporated * MUTE circuit (all circuits ON/OFF) * High output voltage (dynamic range) (6.5V : TYP, CH1 only) * Input OP-AMP incorporated (CH1 only) * Input OP-AMP (CH1) selector function incorporated
Specifications
Maximum Ratings at Ta = 25C
Parameter Supply voltage Symbol VCC max VCC_P* Allowable power dissipation Pd max *1 VCCP1, VCCP2 *1 Independent IC Specified board Maximum input voltage Maximum output current MUTE pin voltage Operating temperature Storage temperature * Specified board size : 114.3x76.1x1.6mm3, VINB IO max VMUTE Topr Tstg glass epoxy. Each output Conditions Ratings 14 14 0.8 1.8 13 1 13 -30 to +85 -55 to +150 Unit V V W W V A V C C
*1 Note : Connect power pins of VCC_S, VCC_P1 and VCC_P2 externally.
Recommended Operating Conditions at Ta = 25C
Parameter Supply voltage Symbol VCC Conditions Ratings 5 to 13 Unit V
Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein.
D1306 MS PC B8-6145 No.A0600-1/8
LA6579H
Electrical Characteristics at Ta = 25C, VCC_S = VCC_P1 = VCC_P2 = 8V, VREF = 1.65V, MUTE = 3.3V unless especially specified.
Parameter ALL Blocks No-load current drain ON 1 No-load current drain ON 2 MUTE ON voltage MUTE OFF voltage ICC-ON ICC-OFF VMUTE-ON VMUTE-OFF All outputs ON, MUTE:HI All channels ON, MUTE:LOW MUTE *1 MUTE *1 2 0.5 30 5 45 10 mA mA V V Symbol Conditions min Ratings typ max Unit
Output AMP Block (BTL-AMP) (CH1) Input AMP offset voltage Output voltage Input and output gain Slew rate Input OP_AMP Output offset voltage OP-AMP_SINK OP-AMP_SOURCE [Input OP_AMP changeover] Input AMP changeover voltage 1 Input AMP changeover voltage 2 Output AMP (CH2 to 4) Output offset voltage Output voltage Input and output gain Slew rate 3.3V power supply 3.3 VREG output voltage REG-IN SINK current Line regulation Load regulation 3.3VREG REG-IN-SINK VOLN VOLD IO = 200mA Base current of external PNP transistor 6V VCC 12V, IO = 200mA 5mA IO 200mA 3.18 5 3.3 10 20 50 150 200 3.42 V mA mV mV VOFF2 VO2 VG2 SR2 Between + and - outputs of each CH Between each plus and minus outputs *2 *3 AMP Independent Multiply 2 between outputs. *3 -50 5 5.4 5.4 6 0.5 6.6 50 mV V Times V/s VIN1-SW VIN1-SW Select CH1, input OP-AMP_B *5 Select CH1, input OP-AMP_B *5 1 2 0.5 V V VOFF1 OP_SINK OP_SOURCE Input OP-AMP_A and B Input OP-AMP, SINK current Input OP-AMP, SOUECE current -10 2 300 500 10 mV mA A VOFF_OP-AMP VO1 VG1 SR1 CH1, input OP-AMP_A and B RL=8 *2 *3 AMP Independent Multiply 2 between outputs. *3 -50 6.2 5.4 6.5 6 0.5 6.6 50 mV V Times V/s
Note *1 : MUTE output ON with HI and OFF with LOW (AMP output OFF with HI impedance). Operative for all channels. *2 : Voltage at both ends of an 8 load inserted between outputs. H or L for input. Output in the saturation condition. *3 : CH1 input OP_AMP at 0dB (BUFFER) *4 : Design guarantee value *5 : OP-AMP_A is operated when VIN_SW is H. OP-AMP_B is operated when it is L.
Package Dimensions
unit : mm (typ) 3234B
2.5
15.2 (6.2) 28 15
Pd max -- Ta
Specified board : 114.3x76.1x1.6mm3 glass epoxy When mounted on a board
Allowable power dissipation, Pd max - W
HEAT SPREADER
2 1.80 1.5
(4.9)
10.5
7.9
0.65
1 0.80 0.5
1 0.8 (0.8) 2.0 0.3
14
0.25
Independent IC
0.94
2.45 max
0.42
0.1 (2.25)
2.7
0 --30 --20
0
20
40
60
80
100
SANYO : HSOP28HC(375mil)
Ambient temperature, Ta - C
No.A0600-2/8
LA6579H
Block Diagram
[H] VIN1-A 1 VIN1_SW [H] : OP-AMP_A [L] : OP-AMP_B 28 [L] 27 VIN1-B VIN1
VIN1+A
2
VCCP1
3 33k
26
VIN1+B
VO1+
4
11k Signal system power supply All output ON/OFF
25
S-GND
Level shift
VO1-
5
24
VIN1-SW
VO2+
6
H : ON L : OFF
MUTE
23
MUTE
Level shift
VO2-
7
22
VREFIN
FR FR
Power system GND
Power system GND
FR
FR
VO3+
8
Signal system power supply 3.3VREG (External PNP Tr)
21
VCCS
Level shift
VO3-
9
20
3.3VREG
VO4+
10
19
REGIN
Level shift
VO4-
11
18 33k 11k
VIN2G
VCCP2
12 33k 11k
17
VIN2
VIN4
13 33k 11k
16
VIN3G
VIN4G
14
15
VIN3
No.A0600-3/8
LA6579H
Pin Functions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Symbol VIN1-A VIN1+A VCCP1 VO1+ VO1VO2+ VO2VO3+ VO3VO4+ VO4VCCP2 VIN4 VIN4G VIN3 VIN3G VIN2 VIN2G REGIN 3.3VREG VCCS VREFIN MUTE VIN1_SW S_GND VIN1+B VIN1-B VIN1 CH1 input AMP_A inverted input CH1 input AMP_A non-inverted input CH1 and CH2 power stage power supply Output pin (+) for channel 1 CH1 Output pin (-) for channel 1 Output pin (+) for channel 2 Output pin (-) for channel 2 Output pin (+) for channel 3 Output pin (-) for channel 3 Output pin (+) for channel 4 Output pin (-) for channel 4 CH3 and CH4 power stage power supply Input pin for channel 4 Input pin for channel 4 (for gain adjustment) Input pin for channel 3 Input pin for channel 3 (for gain adjustment) Input pin for channel 2 Input pin for channel 2 (for gain adjustment) External PNP transistor, base connection 3.3VREG output pin, external PNP transistor, collector connection Signal system GND Reference voltage application pin Output ON/OFF pin CH1 input OP_AMP changeover pin Signal system GND CH1 AMP_B non-inverted input pin CH1 AMP_B inverted input pin CH1 input pin, input OP_AMP output pin Pin descriptions
Note : The center frame (FR) becomes GND (P-GND) for the power system. Keep this at the minimum potential together with the signal GND (S-GND). Short-circuit VCC_S (signal system power supply), VCCP1, and VCCP2 (output stage power supply) externally.
No.A0600-4/8
LA6579H
MUTE, VREF-SW Relation of MUTE and VREF-SW
MUTE CH1 H L CH2 ON OFF Output CH3 CH4
*1 *2
Output to be HI impedance with output OFF. MUTE operative for all channels.
VIN1_SW and CH1 input OP_AMP
VIN1_SW H L CH1 input OP_AMP AMP_A AMP_B
Internal reference voltage (2.5V (TYP)) VIN1-B
External reference voltage VIN1-A
VIN1-SW 0.5V 2V
On MUTE
MUTE L H Output AMP OFF ON
Outline of inputs and outputs
66k VIN* VINVIN+ 11k 11k 22k
Level shift
VO1+ 66k 22k VO1-
VREF-IN
Input OP_AMP to be applied to CH1 only
No.A0600-5/8
LA6579H
Pin Description
Pin No. 28 27 26 18 17 16 15 14 13 Symbol VIN1 VIN1-B VIN1+B VIN2G VIN2 VIN3G VIN3 VIN4G VIN4 Pin function Input Description Input pin Set the total gain with the gain of this input AMP. Equivalent circuit
VCC
VIN*-
VIN*
VIN*+
S-GND
4 5
VO1+ VO1-
Output (CH1)
Output pin for channel 1
6 7 8 9 10 11
VO2+ VO2VO3+ VO3VO4+ VO4-
Output (CH2 to 4)
CH2 to 4 output pins
23
MUTE
MUTE
ON/OFF of corresponding CH output MUTE : H output ON MUTE : L output OFF * Output OFF when the MUTE pin is open (similarly to MUTE : L)
VCC1
MUTE 100k 100k S-GND
24
VIN1_SW
CH1 Input AMP changeover
CH1 input OP-AMP changeover function. AMP_A or AMP_B is selected according to the voltage applied to VIN1_SW. H : VIN_A L : VIN_B
VIN1_SW
No.A0600-6/8
LA6579H
Sample Application Circuit
1 SLED input
VIN1-A
VIN1
28
2
VIN1+A
VIN1-B
27
LOADING input
VCC
3
VCCP1
VIN1+B
26
LOADING/SLED M
4
VO1+
S-GND
25
5
VO1-
VIN1-SW
24
H : SLED L : LOADING
SPINDLE M
6
VO2+
MUTE
23
7
VO2-
VREFIN
22
FR
FR
FR FR
8 FOCUS 9
VO3+
VCCS
21
VO3-
3.3VREG
20
10 TRACKING 11
VO4+
REGIN
19
VO4-
VIN2G
18
12
VCCP2
VIN2
17 SPINDLE input
13
VIN4
VIN3G
16
14 TRACKING input
VIN4G
VIN3
15 FOCUS input
No.A0600-7/8
LA6579H
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of December, 2006. Specifications and information herein are subject to change without notice. PS No.A0600-8/8

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