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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
March 2009
FXLA104 Low-Voltage Dual-Supply 4-Bit Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing
Features
Bi-Directional Interface between Two Levels: from 1.1V to 3.6V Fully Configurable: Inputs and Outputs Track VCC Non-Preferential Power-Up; Either VCC May Be Powered Up First Outputs Remain in 3-State Until Active VCC Level is Reached Outputs Switch to 3-State if Either VCC is at GND Power-Off Protection Bus-Hold on Data Inputs Eliminates the Need for Pull-Up Resistors Control Input (/OE) Referenced to VCCA Voltage Packaged in 16-Terminal MLP (1.8mm x 2.6mm) Direction Control Not Necessary 100Mbps Throughput when Translating Between 1.8V and 2.5V ESD Protection Exceeds: - 8kV HBM (per JESD22-A114 & Mil Std 883e 3015.7) - 2kV CDM (per ESD STM 5.3)
Description
The FXLA104 is a configurable dual-voltage supply translator for both uni-directional and bi-directional voltage translation between two logic levels. The device allows translation between voltages as high as 3.6V to as low as 1.1V. The A port tracks the VCCA level and the B port tracks the VCCB level. This allows for bi-directional voltage translation over a variety of voltage levels: 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V. The device remains in three-state until both VCCs reach active levels, allowing either VCC to be powered up first. Internal power-down control circuits place the device in 3-state if either VCC is removed. The /OE input, when HIGH, disables both the A and B ports by placing them in a 3-state condition. The /OE input is supplied by VCCA. The FXLA104 supports bi-directional translation without the need for a direction control pin. The two ports of the device have auto-direction sense capability. Either port may sense an input signal and transfer it as an output signal to the other port.
Applications
Cell Phone, PDA, Digital Camera, Portable GPS
Ordering Information
Part Number
FXLA104UMX
Operating Temperature Range
-40 to 85C
Eco Status
Green
Package
16-Terminal MLP 1.8 x2.6mm Package
Packing Method
Tape and Reel
For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
(c) 2009 Fairchild Semiconductor Corporation FXLA104 * Rev. 1.0.0
www.fairchildsemi.com
FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
Pin Configuration
B0
12
B1
11
B2
10
B3
9 8 7 6
VCCB NC NC VCCA
13 14 15
/OE GND GND NC
16
5
1
2
3
4
A0
A1
A2
A3
Figure 1. Pin Configuration (Top Through View)
Pin Definitions
Pin #
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Name
A0 A1 A2 A3 NC GND GND /OE B3 B2 B1 B0 VCCB NC NC VCCA
Description
A-Side Inputs or 3-State Outputs A-Side Inputs or 3-State Outputs A-Side Inputs or 3-State Outputs A-Side Inputs or 3-State Outputs No Connect Ground Ground Output Enable Input B-Side Inputs or 3-State Outputs B-Side Inputs or 3-State Outputs B-Side Inputs or 3-State Outputs B-Side Inputs or 3-State Outputs B-Side Power Supply No Connect No Connect A-Side Power Supply
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
Functional Diagram
Figure 2. Functional Diagram
Function Table
Control
/OE LOW Logic Level HIGH Logic Level Normal Operation 3-State
Outputs
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
VCC VI
Parameter
Supply Voltage DC Input Voltage VCCA VCCB
Conditions
Min.
-0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5
Max.
4.6 4.6 4.6 4.6 4.6 VCCA +0.5 VCCB +0.5 -50 -50 +50
Unit
V V
I/O Ports A and B Control Input (/OE) Output 3-State Output Active (An) Output Active (Bn) VI<0V VO<0V VO>VCC
VO IIK IOK IOH/IOL ICC TSTG
Output Voltage
(2)
V mA mA mA mA C
DC Input Diode Current DC Output Diode Current DC Output Source/Sink Current
-50 -65
+50 100 +150
DC VCC or Ground Current (per Supply Pin) Storage Temperature Range
Notes: 1. IO absolute maximum ratings must be observed. 2. All unused inputs and input/outputs must be held at VCCi or GND.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC VIN TA dt/dV
Parameter
Power Supply Input Voltage Operating Temperature, Free Air Minimum Input Edge Rate
Conditions
Operating VCCA or VCCB Ports A and B Control Input (/OE) VCCA/B = 1.1 to 3.6V
Min.
1.1 0 0 -40
Max.
3.6 3.6 VCCA +85 10
Unit
V V V C ns/V
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
Power-Up/Power-Down Sequence
FXL translators offer an advantage in that either VCC may be powered up first. This benefit derives from the chip design. When either VCC is at 0V, outputs are in a high-impedance state. The control input (/OE) is designed to track the VCCA supply. A pull-up resistor tying /OE to VCCA should be used to ensure that bus contention, excessive currents, or oscillations do not occur during power-up or power-down. The size of the pull-up resistor is based upon the current-sinking capability of the device driving the /OE pin. The recommended power-up sequence is: 1. 2. 3. Apply power to the first VCC. Apply power to the second VCC. Drive the /OE input LOW to enable the device.
The recommended power-down sequence is: 1. 2. 3. Drive /OE input HIGH to disable the device. Remove power from either VCC. Remove power from other VCC.
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
DC Electrical Characteristics
TA=-40 to 85C
Symbol
Parameter
Conditions
VCCA (V)
2.70 to 3.60 2.30 to 2.70
VCCB (V)
Min.
2.00 1.60 .65xVCCA .65xVCCA .90xVCCA 2.00 1.60 .65xVCCB .65xVCCB .90xVCCB
Typ.
Max.
Units
VIHA
Data Inputs An Control Pin /OE High-Level Input Voltage
1.65 to 2.30 1.10 to 3.60 1.40 to 1.65 1.10 to 1.40 2.70 to 3.60 2.30 to 2.70
V
VIHB
Data Inputs Bn
1.65 to 2.30 1.10 to 3.60 1.40 to 1.65 1.10 to 1.40 2.70 to 3.60 2.30 to 2.70
V
.80 .70 .35xVCCA .35xVCCA .10xVCCA .80 .70 .35xVCCB .35xVCCB .10xVCCB VCCA -.4 VCCB - .4 .4 .4 75.0 -75.0 45.0 -45.0 25.0 -25.0 11.0 -11.0 4.0 -4.0 A V V V V
VILA
Data Inputs An Control Pin /OE
1.65 to 2.30 1.10 to 3.60 1.40 to 1.65 1.10 to 1.40 2.70 to 3.60 2.30 to 2.70
Low-Level Input Voltage
VILB
Data Inputs Bn
1.65 to 2.30 1.10 to 3.60 1.40 to 1.65 1.10 to 1.40
VOHA VOHB VOLA VOLB
High-Level Output (3) Voltage Low-Level Output (3) Voltage
IOH=-4A IOH=-4A IOL=4A IOL=4A VIN=0.8V VIN=2.0V VIN=0.7V VIN=1.6V VIN=0.57V VIN=1.07V VIN=0.49V VIN=0.91V VIN=0.11V VIN=0.99V
1.10 to 3.60 1.10 to 3.60 1.10 to 3.60 1.10 to 3.60 1.10 to 3.60 1.10 to 3.60 1.10 to 3.60 1.10 to 3.60 3.00 3.00 2.30 2.30 1.65 1.65 1.40 1.40 1.10 1.10 3.00 3.00 2.30 2.30 1.65 1.65 1.40 1.40 1.10 1.10
II(HOLD)
Bus-Hold Input Minimum Drive Current
Continued on following page...
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
DC Electrical Characteristics (Continued)
TA=-40 to 85C.
Symbol
Parameter
Conditions
VCCA (V)
3.60 2.70
VCCB (V)
3.60 2.70 1.95 1.60 1.40 3.60 2.70 1.95 1.60 1.40 3.60 3.60 0 3.60 0 3.60 1.10 to 3.60 1.10 to 3.60 1.10 to 3.60 0 0 1.10 to 3.60
Min.
450.0 300.0 200.0 120.0 80.0 -450.0 -300.0 -200.0 -120.0 -80.0
Max.
Units
II(ODH)
Bus-Hold Input Overdrive High (4) Current
Data Inputs An, Bn
1.95 1.60 1.40 3.60 2.70
A
II(ODL)
Bus-Hold Input Overdrive Low (5) Current
Data Inputs An, Bn
1.95 1.60 1.40
A
II IOFF
Input Leakage Current Power-Off Leakage Current
Control Inputs /OE, VI=VCCA or GND An VO=0V to 3.6V Bn VO=0V to 3.6V An, Bn VO=0V or 3.6V, /OE=VIH
1.10 to 3.60 0 3.60 3.60 3.60 0 1.10 to 3.60 1.10 to 3.60 0 1.10 to 3.60 1.10 to 3.60 0
1.0 2.0 2.0 5.0 5.0 5.0 10.0 10.0 -10.0
A A
IOZ
3-State Output Leakage
An VO=0V or 3.6V, /OE=GND Bn VO=0V or 3.6V, /OE=GND
A
ICCA/B ICCZ
Quiescent Supply (6, 7) Current
VI=VCCI or GND; IO=0, /OE=GND VI=VCCI or GND; IO=0, /OE=VIH VI=VCCB or GND; IO=0 B-to-A Direction, /OE=GND
A A
ICCA Quiescent Supply Current ICCB
A 10.0 -10.0 A 10.0
VI=VCCA or GND; IO=0 A-to-B Direction VI=VCCA or GND; IO=0, A-to-B Direction, /OE=GND VI=VCCB or GND; IO=0 B-to-A Direction
Notes: 3. This is the output voltage for static conditions. Dynamic drive specifications are given in the Dynamic Output Electrical Characteristics table. 4. An external drive must source at least the specified current to switch LOW-to-HIGH. 5. An external drive must source at least the specified current to switch HIGH-to-LOW. 6. VCCI is the VCC associated with the input side. 7. Reflects current per supply, VCCA or VCCB.
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
Dynamic Output Electrical Characteristic
A Port (An)
Output Load: CL=15pF, RL M (CI/O=4pF), TA=-40 to 85C VCCA=3.0V to 3.6V Typ.
trise tfall Output Rise (9) Time A Port Output Fall Time A (10) Port Dynamic Output Current (9) High Dynamic Output Current (10) Low -11.4
Symbol
Parameter
VCCA=2.3V to 2.7V Typ. Max.
3.5 3.5
VCCA=1.65V to 1.95V Typ. Max
4.0 4.0
VCCA=1.4V to 1.6V Typ. Max.
5.0 5.0
VCCA=1.1V to 1.3V Typ.
7.5 7.5
Units
Max.
3.0 3.0
ns ns
IOHD
-7.5
-4.7
-3.2
-1.7
mA
IOLD
+11.4
+7.5
+4.7
+3.2
+1.7
mA
B Port (Bn)
Output Load: CL=15pF, RL M (CI/O=5pF), TA=-40 to 85C VCCB=3.0V to 3.6V Typ.
trise tfall Output Rise (9) Time B Port Output Fall Time B (10) Port Dynamic Output Current (9) High Dynamic Output Current (10) Low -12.0
Symbol
Parameter
VCCB=2.3V to 2.7V Typ. Max.
3.5 3.5
VCCB=1.65V to 1.95V Typ. Max
4.0 4.0
VCCB=1.4V to 1.6V Typ. Max.
5.0 5.0
VCCB=1.1V to 1.3V Typ.
7.5 7.5
Units
Max.
3.0 3.0
ns ns
IOHD
-7.9
-5.0
-3.4
-1.8
mA
IOLD
+12.0
+7.9
+5.0
+3.4
+1.8
mA
Notes: 8. Dynamic output characteristics are guaranteed, but not tested. 9. See Figure 7. 10. See Figure 8.
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
AC Characteristics
VCCA = 3.0V to 3.6V, TA=-40 to 85C VCCB=3.0V to 3.6V Min.
tPLH,tPHL tPZL,tPZH tSKEW A to B B to A /OE to A, /OE to B A Port, (11) B Port 0.2 0.2
Symbol
Parameter
VCCB=2.3V to 2.7V Min.
0.3 0.2
VCCB=1.65V to 1.95V Min.
0.5 0.3
VCCB=1.4V to 1.6V Min.
0.6 0.5
VCCB=1.1V to 1.3V Typ.
6.9 4.5 1.7 1.0
Units
ns ns s ns
Max.
4.0 4.0 1.7 0.5
Max.
4.2 4.1 1.7 0.5
Max
5.4 5.0 1.7 0.5
Max.
6.8 6.0 1.7 1.0
VCCA = 2.3V to 2.7V, TA=-40 to 85C VCCB=3.0V to 3.6V Min.
tPLH,tPHL tPZL,tPZH tSKEW A to B B to A /OE to A, /OE to B A Port, (11) B Port 0.2 0.3
Symbol
Parameter
VCCB=2.3V to 2.7V Min.
0.4 0.4
VCCB=1.65V to 1.95V Min.
0.5 0.5
VCCB=1.4V to 1.6V Min.
0.8 0.5
VCCB=1.1V to 1.3V Typ.
7.0 4.8 1.7 1.0
Units
ns ns s ns
Max.
4.1 4.2 1.7 0.5
Max.
4.5 4.5 1.7 0.5
Max
5.6 5.5 1.7 0.5
Max.
6.9 6.5 1.7 1.0
VCCA = 1.65V to 1.95V, TA=-40 to 85C VCCB=3.0V to 3.6V Min.
tPLH,tPHL tPZL,tPZH tSKEW A to B B to A /OE to A, /OE to B A Port, (11) B Port 0.3 0.5
Symbol
Parameter
VCCB=2.3V to 2.7V Min.
0.5 0.5
VCCB=1.65V to 1.95V Min.
0.8 0.8
VCCB=1.4V to 1.6V Min.
0.9 1.0
VCCB=1.1V to 1.3V Typ.
7.5 5.4 1.7 1.0
Units
ns ns s ns
Max.
5.0 5.4 1.7 0.5
Max.
5.5 5.6 1.7 0.5
Max
6.7 6.7 1.7 0.5
Max.
7.5 7.0 1.7 1.0
Note: 11. Skew is the variation of propagation delay between output signals and applies only to output signals on the same port (An or Bn) and switching with the same polarity (LOW-to-HIGH or HIGH-to-LOW) (see Figure 10). Skew is guaranteed, but not tested.
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
AC Characteristics (Continued)
VCCA = 1.4V to 1.6V, TA=-40 to 85C VCCB=3.0V to 3.6V Min.
tPLH,tPHL tPZL,tPZH tSKEW A to B B to A /OE to A, /OE to B A Port, (12) B Port 0.5 0.6
Symbol
Parameter
VCCB=2.3V to 2.7V Min.
0.5 0.8
VCCB=1.65V to 1.95V Min.
1.0 0.9
VCCB=1.4V to 1.6V Min.
1.0 1.0
VCCB=1.1V to 1.3V Typ.
7.9 6.1 1.7 1.0
Units
ns ns s ns
Max.
6.0 6.8 1.7 1.0
Max.
6.5 6.9 1.7 1.0
Max
7.0 7.5 1.7 1.0
Max.
8.5 8.5 1.7 1.0
VCCA = 1.1V to 1.3V, TA=-40 to 85C VCCB=3.0V to 3.6V Typ.
tPLH,tPHL tPZL,tPZH tSKEW A to B B to A /OE to A, /OE to B A Port, B Port
(12)
Symbol
Parameter
VCCB=2.3V to 2.7V Typ.
4.8 7.0 1.7 1.0
VCCB=1.65V to 1.95V Typ.
5.4 7.4 1.7 1.0
VCCB=1.4V to 1.6V Typ.
6.2 7.8 1.7 1.0
VCCB=1.1V to 1.3V Typ.
9.2 9.1 1.7 1.0
Units
ns ns s ns
4.6 6.8 1.7 1.0
Note: 12. Skew is the variation of propagation delay between output signals and applies only to output signals on the same port (An or Bn) and switching with the same polarity (LOW-to-HIGH or HIGH-to-LOW) (see Figure 10). Skew is guaranteed, but not tested.
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
Maximum Data Rate(13, 14)
TA=-40 to 85C
VCCA
VCCA=3.00V to 3.60V VCCA=2.30V to 2.70V VCCA=1.65V to 1.95V VCCA=1.40V to 1.60V VCCA=1.10V to 1.30V
VCCB=3.0V to 3.6V Min.
140 120 100 80
VCCB=2.3V to 2.7V Min.
120 120 100 80
VCCB=1.65V to 1.95V Min.
100 100 80 60
VCCB=1.4V to 1.6V Min.
80 80 60 60
VCCB=1.1V to 1.3V Typ.
40 40 40 40
Units
Mbps Mbps Mbps Mbps
Typ.
40
Typ.
40
Typ.
40
Typ.
40
Typ.
40 Mbps
Notes: 13. Maximum data rate is guaranteed, but not tested. 14. Maximum data rate is specified in megabits per second (see Figure 9). It is equivalent to two times the F-toggle frequency, specified in megahertz. For example, 100Mbps is equivalent to 50MHz.
Capacitance
Symbol
CIN CI/O Cpd
Parameter
Input Capacitance Control Pin (/OE) Input/Output Capacitance An Bn
Conditions
VCCA=VCCB=GND VCCA=VCCB=3.3V, /OE=VCCA VCCA=VCCB=3.3V, VI=0V or VCC, f=10MHz
TA=+25C Typical
3 4 5 25
Units
pF pF pF
Power Dissipation Capacitance
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
Test Diagrams
VCC TEST SIGNAL
DUT
C1
R1
Figure 3. Test Circuit
Table 1.
AC Test Conditions Test
tPLH, tPHL tPZL tPZH
Input Signal
Data Pulses 0V VCCI
Output Enable Control
0V HIGH to LOW Switch HIGH to LOW Switch
Table 2.
AC Load VCCo
1.2V 0.1V 1.5V 0.1V 1.8V 0.15V 2.5V 0.2V 3.3V 0.3V
C1
15pF 15pF 15pF 15pF 15pF
R1
1M 1M 1M 1M 1M
DATA IN tpxx DATA OUT
Vmi tpxx Vmo
VCCI GND
VCCO
Figure 4. Waveform for Inverting and Non-Inverting Functions Notes: 15. Input tR = tF = 2.0ns, 10% to 90%. 16. Input tR = tF = 2.5ns, 10% to 90%, at VI = 3.0V to 3.6V only.
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
Figure 5. 3-State Output Low Enable Time for Low Voltage Logic Notes: 17. Input tR = tF = 2.0ns, 10% to 90%. 18. Input tR = tF = 2.5ns, 10% to 90%, at VI = 3.0V to 3.6V only.
Figure 6. 3-State Output High Enable Time for Low Voltage Logic
Notes: 19. Input tR = tF = 2.0ns, 10% to 90%. 20. Input tR = tF = 2.5ns, 10% to 90%, at VI = 3.0V to 3.6V only.
Table 3.
Test Measure Points Symbol
VMI
(21)
VDD
VCCI /2 VCCo /2 0.9 x VCCo 0.1 x VCCo
VMO VX VY Note: 21. VCCI=VCCA for control pin /OE or VMI(VCCA/2).
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
trise
VOH 80% x VCCO
VOUT
20% x VCCO VOL Time
IOHD (CL + CI / O ) x VOUT (20% - 80%) * VCCO = (CL + CI / O ) x t t RISE
Figure 7. Active Output Rise Time and Dynamic Output Current High
VOH 80% x VCCO VOUT
tfall
20% x VCCO VOL Time
IOLD (CL + CI / O ) x
Figure 8.
VOUT (80% - 20%) * VCCO = (CL + CI / O ) x t t FALL
Active Output Fall Time and Dynamic Output Current Low
tW DATA IN VCCI VCCI/2 VCCI/2 GND Maximum Data Rate, f = 1/tW
Figure 9. Maximum Data Rate
DATA OUTPUT tskew DATA OUTPUT
VCCO Vmo Vmo GND tskew VCCO Vmo
Figure 10. Output Skew Time
Vmo GND
Note: 22. tSKEW = (tpHLmax - tpHLmin) or (tpLHmax - tpLHmin)
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0 www.fairchildsemi.com 14
FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
Physical Dimensions
0.10 C
2X
1.80
A B
0.663
2.100
15X
0.563
1
PIN #1 IDENT
2.60
2.900
0.400 0.10 C
2X TOP VIEW
0.55 MAX. 0.10 C 0.152 0.08 C
SEATING PLANE
0.225
16X
RECOMMENDED LAND PATTERN
0.050
C
SIDE VIEW
TERMINAL SHAPE VARIANTS
0.40 0.60
5
9
0.15 0.25 0.40
0.100 0.100
15X
0.15 0.25
NON-PIN 1
0.30 15X 0.50
PIN 1
Supplier 1
1
16
13
ALL TERMINALS
0.10 C A B 0.05 C
0.15 0.25
PIN 1
0.30 0.50
15X 0.25
NON-PIN 1
0.15
0.30 15X 0.50
Supplier 2
BOTTOM VIEW
A. THIS PACKAGE IS NOT CURRENTLY REGISTERED WITH ANY STANDARDS COMMITTEE B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. TERMINAL SHAPE MAY VARY ACCORDING TO PACKAGE SUPPLIER, SEE TERMINAL SHAPE VARIANTS E. LAND PATTERN IS A MINIMAL TOE DESIGN F. DRAWING FILE NAME : UMLP16AREV3
Figure 11. 16-Terminal MLP 1.8 x2.6mm Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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FLXA104 -- Low-Voltage Dual-Supply 4-Bit Voltage Translator
(c) 2009 Fairchild Semiconductor Corporation FLXA104 * Rev. 1.0.0
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