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M52758SP/FP
Wide Band Analog Switch
REJ03F0196-0200 Rev.2.00 Sep 14, 2006
Description
The M52758 is a semiconductor integrated circuit for the RGBHV interface. The device features switching signals input from two types of image and outputting them to CRT display etc. Synchronous signal meeting the frequency band of 10 kHz to 200 kHz are output at TTL. The frequency band of video signals is 250 MHz, acquiring high-resolution images, and are optimum as an interface IC with high-resolution CRT display and various new media.
Features
* Frequency band: RGB 250 MHz HV 10 Hz to 200 kHz * Input level: RGB 0.7 VP-P (typ.) HV TTL input 2.0 VO-P (both channel) * Only the G channel is provided with sync-on video output. * The TTL format is adopted for HV output.
Application
Display monitor
Recommended Operating Condition
Supply voltage range: Rated supply voltage: 4.75 to 5.5 V 5.0 V
Rev.2.00 Sep 14, 2006 page 1 of 14
M52758SP/FP
Block Diagram
M52758FP
OUTPUT VCC2 OUTPUT (for sync (B) (B) GND -onG) VCC
VCC2 OUTPUT (R) (R) GND
NC
NC
VCC2 OUTPUT (G) (G) GND
NC
OUTPUT OUTPUT (H) (V) GND SWITCH
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
1
2
3
4
5
6
7
8
9
10
11
12
13
14
NC
15
16
17
18
VCC1 INPUT1 VCC1 (R) (R) (G)
NC INPUT1 VCC1 INPUT1 INPUT1 INPUT1 GND INPUT2 GND INPUT2 (G) (B) (B) (H) (V) (R) (G)
GND INPUT2 INPUT2 INPUT2 (B) (H) (V)
M52758SP
OUTPUT VCC2 OUTPUT (for sync (B) (B) GND -onG)
VCC2 (R)
OUTPUT (R) GND
VCC2 OUTPUT (G) (G) GND
NC
VCC
OUTPUT OUTPUT (H) (V) GND SWITCH
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
VCC1 (R)
2
3
4
5
VCC1 (B)
6
7
8
9
10
11
12
13
GND
14
15
16
INPUT1 VCC1 INPUT1 (R) (G) (G)
INPUT1 INPUT1 INPUT1 GND INPUT2 (B) (H) (V) (R)
GND INPUT2 (G)
INPUT2 INPUT2 INPUT2 (B) (H) (V)
Rev.2.00 Sep 14, 2006 page 2 of 14
M52758SP/FP
Pin Arrangement
M52758FP
VCC1 (R) INPUT1 (R) VCC1 (G) NC INPUT1 (G) VCC1 (B) INPUT1 (B) INPUT1 (H) INPUT1 (V) GND INPUT2 (R) GND INPUT2 (G) NC GND INPUT2 (B) INPUT2 (H) INPUT2 (V) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 VCC2 (R) 35 OUTPUT (R) 34 GND 33 NC 32 NC 31 VCC2 (G) 30 OUTPUT (G) 29 GND 28 VCC2 (B) 27 OUTPUT (B) 26 GND 25 OUTPUT (for sync-onG) 24 VCC 23 NC 22 OUTPUT (H) 21 OUTPUT (V) 20 GND 19 SWITCH
(Top view) Outline: PRSP0036GA-B (36P2R-D)
M52758SP
VCC1 (R) INPUT1 (R) VCC1 (G) INPUT1 (G) VCC1 (B) INPUT1 (B) INPUT1 (H) INPUT1 (V) GND INPUT2 (R) GND INPUT2 (G) GND INPUT2 (B) INPUT2 (H) INPUT2 (V) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 VCC2 (R) 31 OUTPUT (R) 30 GND 29 VCC2 (G) 28 OUTPUT (G) 27 GND 26 VCC2 (B) 25 OUTPUT (B) 24 GND 23 OUTPUT (for sync-onG) 22 NC 21 VCC 20 OUTPUT (H) 19 OUTPUT (V) 18 GND 17 SWITCH
(Top view) NC: No connection Outline: PRDP0032BA-A (32P4B)
Rev.2.00 Sep 14, 2006 page 3 of 14
M52758SP/FP
Absolute Maximum Ratings
(Ta = 25C)
Item Supply voltage Power dissipation Ambient temperature Storage temperature Recommended supply voltage Recommended supply voltage range Electrostatic discharge VCC Pd Topr Tstg Vopr Vopr' Surge Symbol Ratings 7.0 1068 (FP) 1603 (SP) -20 to +85 -40 to +150 5.0 4.75 to 5.5 200 Unit V mW C C V V V
Electrical Characteristics
Pin No is FP (VCC = 5 V, Ta = 25C, unless otherwise noted)
Limits Item
Circuit current1 (no signal) Circuit current2 (no signal) (RGB SW) Output DC voltage1 VCC (V) VCC 5 5 SW2 Rin1 b b SW5 Gin1 b b SW7 Bin1 b b SW8 Hin1 b b
Symbol Min. Typ. Max. Unit ICC1 ICC2
46 46 66 66 86 86 mA mA
Test Point (s)
A A
Input
SW
SW9 SW11 SW13 SW16 SW17 SW18 SW19 Vin1 Rin2 Gin2 Bin2 Hin2 Vin2 Switch b b b b b b b b b b b b b a
VDC1 VDC2 VDC3 VDC4
1.85 2.05 2.25 1.85 2.05 2.25
V V
Output DC voltage2
T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.25 T.P.25 T.P.2 T.P.5 T.P.7 T.P.11 T.P.13 T.P.16 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.25 T.P.25 T.P.31 T.P.28 T.P.25
5 5
b b
b b
b b
b b
b b
b b
b b
b b
b b
b b
b a
Output DC voltage3 Output DC voltage4 Maximum allowable input1 Maximum allowable input2 Voltage gain1
0.75 1.15 1.55 0.75 1.15 1.55 2.4
V V VP-P
5 5 5
b b abb SG1 b
b b bab SG1 b
b b bba SG1 b
b b b
b b b
b b b
b b b
b b b
b b b
b b b
b a b
Vimax1 2.0
Vimax2 2.0 GV1 GV1 GV2 GV2 GV3 GV4
0.3
2.4
VP-P
5
b
b
abb SG1 b
bab SG1 b
bba SG1 b
b
b
a
0.9
1.5
dB
5
abb SG2
bab SG2
bba SG2
b
b
b
b
b
Relative voltage gain1 Voltage gain2
-0.4 0.3
0 0.9
0.4 1.5
dB dB 5 b b
Relative to measured values above b b b abb SG2 bab SG2 bba SG2 b b a
Relative voltage gain2 Voltage gain3 Voltage gain4
-0.4 -0.4 -0.4 -1.0
0 0.2 0.2 0
0.4 0.8 0.8 1.0
dB dB dB dB 5 5 5 b b abb SG4 a SG2 b bab SG4
Relative to measured values above b b bba SG4 b b b b b b b b b b a SG2 b b b b b b b b b b b a b
Frequency characteristic1 FC1 (100 MHz) Relative frequency FC1 characteristic1 (100 MHz) Frequency characteristic2 FC2 (100 MHz) Relative frequency FC2 characteristic2 (100 MHz) Frequency characteristic3 FC3 (250 MHz) Frequency characteristic4 FC4 (250 MHz)
-1.0 -1.0
0
1.0
dB
Relative to measured values above
0
1.0
dB
T.P.35 T.P.30 T.P.27
5
b
b
b
b
b
abb SG4
bab SG4
bba SG4
b
b
a
-1.0
0
1.0
dB
Relative to measured values above
-3.0 -1.5
1.0
dB
-3.0 -1.5
1.0
dB
T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27
5
abb SG5 b
bab SG5 b
bba SG5 b
b
b
b
b
b
b
b
b
5
b
b
abb SG5
bab SG5
bba SG5
b
b
a
Rev.2.00 Sep 14, 2006 page 4 of 14
M52758SP/FP
Electrical Characteristics (cont.)
Limits Item
Crosstalk between two inputs1 (10 MHz) Crosstalk between two inputs2 (10 MHz) Crosstalk between two inputs3 (100 MHz) Crosstalk between two inputs4 (100 MHz) Crosstalk between channels1 (10 MHz) Crosstalk between channels2 (10 MHz) Crosstalk between channels3 (100 MHz) Crosstalk between channels4 (100 MHz) Pulse characteristic1
Symbol Min. Typ. Max. Unit C.T.I.1 C.T.I.2 C.T.I.3
-60 -50 dB
Test Point (s)
T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27
VCC (V) VCC 5 SW2 Rin1 abb SG3 b SW5 Gin1 bab SG3 b SW7 Bin1 bba SG3 b SW8 Hin1 b
Input
SW
SW9 SW11 SW13 SW16 SW17 SW18 SW19 Vin1 Rin2 Gin2 Bin2 Hin2 Vin2 Switch b b b b b b b a a b b a a b b
-60
-50
dB
5
b
b
abb SG3 b
bab SG3 b
bba SG3 b
b
b
-40 -40
-35 -35
dB
5
abb SG4 b
bab SG4 b
bba SG4 b
b
b
b
b
C.T.I.4
dB
5
b
b
abb SG4 b
bab SG4 b
bba SG4 b
b
b
C.T.C.1 C.T.C.2 C.T.C.3 C.T.C.4 Tr1
-50
-40
dB
5
abb SG3 b
bab SG3 b
bba SG3 b
b
b
b
b
-50
-40
dB
5
b
b
abb SG3 b
bab SG3 b
bba SG3 b
b
b
a
-30
-25
dB
5
abb SG4 b
bab SG4 b
bba SG4 b
b
b
b
b
b
-30
-25
dB
5
b
b
abb SG4 b
bab SG4 b
bba SG4 b
b
b
a
1.6
2.5
ns
5
a SG6 a SG6 b
a SG6 a SG6 b
a SG6 a SG6 b
b
b
b
b
b
Tf1
Pulse characteristic2

1.6
2.5
ns
5
b
b
b
b
b
b
b
b
Tr2 Tf2
1.6
2.5
ns
5
b
b
a SG6 a SG6
a SG6 a SG6
a SG6 a SG6
b
b
a
1.6
2.5
ns
5
b
b
b
b
b
b
b
a
(HV SW)
High level output voltage1 VOH1 High level output voltage2 VOH2 Low level output voltage1 VOL1 Low level output voltage2 VOL2 Input selectional voltage1 Vith1 Input selectional voltage2 Vith2 Rising delay time1 Rising delay time2 Falling delay time1 Falling delay time2 Switching selectional voltage1 Switching selectional voltage2 4.5 4.5 1.4 1.4 0.5 0.5 0.5 0.5 0.2 0.2 1.8 1.8 100 100 50 50 1.5 1.5 0.5 0.5 2.0 2.0 150 150 100 100 2.0 2.0 dB dB dB dB dB dB ns ns ns ns V V T.P.21 T.P.22 T.P.21 T.P.22 T.P.21 T.P.22 T.P.21 T.P.22 T.P.8 T.P.9 T.P.17 T.P.18 T.P.21 T.P.22 T.P.21 T.P.22 T.P.21 T.P.22 T.P.21 T.P.22 T.P.19 T.P.19 5 5 5 5 5 5 5 5 5 5 5 5 b b b b b b b b b b a SG1 b b b b b b b b b b b a SG1 b b b b b b b b b b b a SG1 b c 5.0 V b c 0V b c b a SG7 b a SG7 b a SG7 b c 5.0 V b c 0V b c b a SG7 b a SG7 b a SG7 b b b b b b b b b b b b a SG1 b b b b b b b b b b b a SG1 b b b b b b b b b b b a SG1 b b b a b a b a b a b a c c
c c 5.0 V 5.0 V b b c 0V b c b a SG7 b a SG7 b a SG7 c 0V b c b a SG7 b a SG7 b a SG7
Variable Variable
Variable Variable
Trd1 Trd2 Tfd1 Tfd2 Vsth1 Vsth2
Rev.2.00 Sep 14, 2006 page 5 of 14
M52758SP/FP
Electrical Characteristics Test Method (Pin No is FP)
It omits the SW.No accorded with signal input pin because it is already written in Table. SW A, SW1, SW3, SW5 is in side a if there is not defined specially. ICC1, ICC2, Circuit Current (no signal) The condition is shown as Table. Set SW19 to GND (or OPEN) and SW A to side b, measure the current by current meter A. The current is as ICC1 (ICC2). VDC1, VDC2 Output DC Voltage Set SW19 to GND (or OPEN), measure the DC voltage of T.P.35 (T.P.30, T.P.27) when there is no signal input. The DC voltage is as VDC1 (or VDC2). VDC3, VDC4 Output DC Voltage Measure the DC voltage of T.P.25 same as Table, the DC voltage is as VDC3 (or VDC4). Vimax1, Vimax2 Maximum Allowable Input Set SW19 to GND, SG1 as the input signal of pin 2. Rising up the amplitude of SG1 slowly, read the amplitude of input signal when the output waveform is distorted. The amplitude is as Vimax1. And measure Vimax1 when SG2 as the input signal of pin 5, pin 7 in same way. Next, set SW to OPEN, measure Vimax2 when SG2 as the input signal of pin 11, 13, 16. GV1, GV1, GV2, GV2 1. The condition is shown as Table. 2. Set SW19 to GND, SG2 as the input signal of pin 2. At this time, read the amplitude output from T.P.35. The amplitude is as VOR1. 3. Voltage gain GV1 is
GV1 = 20log VOR1 [VP-P] 0.7 [VP-P] [dB]
4. The method as same as 2 and 3, measure the voltage gain GV1 when SG2 as the input signal of pin 5, 7. 5. The difference of each channel relative voltage gain is as GV1. 6. Set SW19 to OPEN, measure GV2, GV12 in the same way. GV3, GV4, Voltage Gain 1. The condition is shown as Table. This test is by active probe. 2. Measure the amplitude output from T.P.25. 3. Measure the GV3, GV4 by the same way as GV1, GV1, GV2, GV2. FC1, FC1, FC2, FC2 1. The condition is shown as Table. This test is by active probe. 2. Set SW19 to GND, SG2 as the input signal of pin 2. Measure the amplitude output from T.P.35. The amplitude is as VOR1. By the same way, measure the output when SG4 is as input signal of pin 2, the output is as VOR2. 3. The frequency characteristic FC1 is
FC1 = 20log VOR2 [VP-P] VOR1 [VP-P] [dB]
4. The method as same as 2 and 3, measure the frequency FC1 when input signal to pin 5, 7. 5. The difference between of each channel frequency characteristic is as FC1. 6. Set SW19 to OPEN, measure FC2, FC2. FC3, FC4 Frequency Characteristic By the same way as Table measure the FC3, FC4 when SG5 of input signal.
Rev.2.00 Sep 14, 2006 page 6 of 14
M52758SP/FP C.T.I.1, C.T.I.2 Crosstalk between Two Input 1. The condition is shown as Table. This test is by active prove. 2. Set SW19 to GND, SG3 as the input signal of pin 2. Measure the amplitude output from T.P.35.The amplitude is as VOR3. 3. Set SW19 to OPEN, measure the amplitude output from T.P.35. The amplitude is as VOR3'. 4 The crosstalk between two inputs C.T.I.1 is
C.T.I.1 = 20log VOR3' [VP-P] VOR3 [VP-P] [dB]
5. By the same way, measure the crosstalk between two inputs when SG3 as the input signal of pin 5, pin 7. 6. Next, set SW19 to OPEN, SG3 as the input signal of pin 11, measure the amplitude output from T.P.35. The amplitude is as VOR4. 7. Set SW19 to GND, measure the amplitude output from T.P.35. The amplitude is as VOR4'. 8 The crosstalk between two inputs C.T.I.2 is
C.T.I.2 = 20log VOR4' [VP-P] VOR4 [VP-P] [dB]
9. By the same way, measure the crosstalk between channels when SG3 as the input signal of pin 13, 16. C.T.I.3, C.T.I.4 Crosstalk between Two Input Set SG4 as the input signal, and then the same method as Table, measure C.T.I.3. C.T.I.4. C.T.C.1, C.T.C.2 Crosstalk between Channel 1. The condition is as Table. This test is by active prove. 2. Set SW19 to GND, SG3 as the input signal of pin 2. Measure the amplitude output from T.P.35. The amplitude is as VOR5. 3. Next, measure T.P.30, T.P.27 in the same state, and the amplitude is as VOG5, VOB5. 4. The crosstalk between channels C.T.C.1 is
C.T.C.1 = 20log VOG5 or VOB5 VOR5 [dB]
5. Measure the crosstalk between channels when SG3 is as the input signal of pin 5, pin 7. 6. Next, set SW19 to OPEN, SG3 as the input signal of pin 11, measure the amplitude output from T.P.35. The amplitude is as VOR6. 7. Next, measure the amplitude output from T.P.30, T.P.27 in the same state. The amplitude is as VOG6, VOB6. 8. The crosstalk between channels C.T.C.2 is
C.T.C.2 = 20log VOG6 or VOB6 VOR6 [dB]
9. By the same way, measure the crosstalk between channels when input signal to pin 13, 16. C.T.C.3, C.T.C.4 Crosstalk between Channel Set SG4 as the input signal, and the same method as Table, measure C.T.C.3, C.T.C.4.
Rev.2.00 Sep 14, 2006 page 7 of 14
M52758SP/FP Tr1, Tf1, Tr2, Tf2 Pulse Characteristic 1. 2. 3. 4. The condition is as Table. Set SW19 to GND (or OPEN). The rising of 10% to 90% for input pulse is Tri, the falling of 10% to 90% for input pulse is Tfi. Next, the rising of 10% to 90% for output pulse is Tro, the falling of 10% to 90% for output pulse is Tfo. The pulse characteristic Tr1, Tf1 (Tr2, Tf2) is
100% 90%
0% Tr Tf (ns) (ns)
10%
Tr1 (Tr2) = (Tro)2 - (Tri)2 Tf1 (Tf2) = (Tfo)2 - (Tfi)2
VOH1, VOH2 High Level Output Voltage The condition is as Table. Set SW19 to GND (OPEN), input 5 V at input terminal. Measure the output voltage, the voltage is as VOH1 (VOH2). VOL1, VOL2 Low Level Output Voltage The condition is as Table. Set SW19 to GND (OPEN), input 0 V at input terminal. Measure the output voltage, the voltage is as VOL1 (VOL2). Vith1, Vith2 Input Selectional Voltage The condition is as Table. Set SW19 to GND (OPEN), increasing gradually the voltage of input terminal from 0 V, measure the voltage of input terminal when output terminal is 4.5 V. The input voltage is as Vith1 (Vith2). Trd1, Trd2 Rising Delay Time, Tfd1, Tfd2 Falling delay time The condition is as Table. Set SW19 to GND (OPEN), SG7 is as the input signal of input terminal, measure the waveform of output. Rising delay time is as Trd1 (Trd2). Falling delay time is as Tfd1 (Tfd2). Reference to the Figure as shown below.
50% SG7 Trd Tfd 50% Output waveform
Rev.2.00 Sep 14, 2006 page 8 of 14
M52758SP/FP Vsth1, Vsth2 Switching Selectional Voltage 1. The condition is as Table. SG1 is as the input signal of pin 2, pin 5, pin 7, and SG7 is as the input signal of pin 8, pin 9. There is no input at another pins. 2. Input 0 V at pin 19, confirm that there are signals output from T.P.21, T.P.22, T.P.25, T.P.27, T.P.30, T.P.35. 3. Increase gradually the voltage of terminal pin 19. Read the voltage when there is no signal output from the terminals listed as above. The voltage is as Vsth1. 4. SG1 as the input signal of pin 11, pin 13, pin 16, and SG7 as the input signal of pin 17, pin 18. There is no input at another pins. 5. Inputs 5 V at pin 19, confirm that there is no signal output from T.P.21, T.P.22, T.P.25, T.P.27, T.P.30, T.P.35. 6. Decreasing gradually the voltage of terminal pin 19. Read the voltage when there are signals output from the terminals listed as above. The voltage is as Vsth2.
Input Signal
SG No. SG1 Input Signal Sine wave (f = 60 kHz, 0.7 VP-P, amplitude variable)
0.7 VP-P (amplitude variable)
SG2 SG3 SG4 SG5 SG6
Sine wave (f = 1 MHz, amplitude 0.7 VP-P) Sine wave (f = 10 MHz, amplitude 0.7 VP-P) Sine wave (f = 100 MHz, amplitude 0.7 VP-P) Sine wave (f = 250 MHz, amplitude 0.7 VP-P) Pulse with amplitude 0.7 VP-P (f = 60 kHz, duty 80%)
0.7 VP-P
SG7
Square wave (Amplitude 5.0 VO-P TTL, f = 60 kHz, duty 50%)
5V
0V
Rev.2.00 Sep 14, 2006 page 9 of 14
M52758SP/FP
Test Circuit (FP)
A
a 0.01
+
47
b
SW A VCC 5V TP35 R
0.01 0.01
TP30 G
0.01
TP25 GOUT TP27 (for Sync on G) B
+
0.01 47
SW GND: INPUT1 TP22 TP21 SW OPEN: INPUT2 V H OPEN SW19 a b c
36 VCC
35
34
33
32 NC
31 VCC
30
29
28
27
26 GND
25
24 VCC
23 NC
22
21
20 GND
19
GND NC
GND VCC
M52758FP
VCC 1
2
VCC 3
NC 4
5
VCC 6
7
8
TP8
9
TP9
10
11
12
13
NC GND 14 15
16
17
18
TP2 0.01 47 + +
0.01 47
TP5 0.01 47 TP7 +
TP11
TP13
TP16 TP17 TP18
+
0.01 100 0.01
+
100
+
0.01 100 0.01
+
100
+
0.01 100 0.01
+
100
SW8
a b a b a b
SW9
a b a b
SW16
a
SW17 SW18
b abc abc
SW2
SW5
SW7
abc abc
SW11
SW13
SG1 SG2 SG3 SG4 SG5 SG6
SG7
Rev.2.00 Sep 14, 2006 page 10 of 14
M52758SP/FP
Typical Characteristics
Thermal Derating (Maximum Rating)
1750
1603
1500
Power Dissipation Pd (mW)
1250
1068
SP
1000
FP
750 500 250 0 -25
0
25
50
75 85 100
125
150
Ambient Temperature Ta (C)
Pin Description
Pin No. (FP) 1 3 6 2 5 7 Name VCC1 (R) VCC1 (G) VCC1 (B) Input1 (R) Input1 (G) Input1 (B) DC Voltage (V) 5.0 Peripheral Circuit Function
1.5
800
Input signal with low impedance
2.59 mA
620
2.2 V
8 9
Input1 (H) Input1 (V)
Input pulse between 2 V and 5 V
2 to 5 V
0.2 mA
0 to 0.8 V
10, 12, 15, 20, 26, 29, 34
GND
GND
Rev.2.00 Sep 14, 2006 page 11 of 14
M52758SP/FP
Pin Description (cont.)
Pin No. (FP) 11 13 16 Name Input2 (R) Input2 (G) Input2 (B) DC Voltage (V) 1.5
800
Peripheral Circuit
Function Input signal with low impedance.
2.59 mA
620
2.2 V
17 18
Input2 (H) Input2 (V)
Input pulse between 2 V and 5 V.
2 to 5 V
0.2 mA
0 to 0.8 V
19
Switch
2.6
10 k 12 k 7.3 k
Switch by OPEN and GND.
13 k
2.3 V
21 22
Output (V) Output (H)
1k
Output impedance is built-in
24 4, 14, 23, 32, 33 25 27 30 35
VCC (H, V, Switch) NC Output (sync on G) Output (B) Output (G) Output (R)
5 1.15

Output impedance is built-in
2.05
50 430 27, 30, 35
50 25 500
28 31 36
VCC2 (R) VCC2 (G) VCC2 (B)
5
Rev.2.00 Sep 14, 2006 page 12 of 14
M52758SP/FP
Note How to Use This IC (Pin No is FP)
1. 2. 3. 4. R, G, B input signal is 0.7 VP-P of standard video signal. H, V input is 2.0 V (min.) TTL type. Input signal with sufficient low impedance to input terminal. The terminal of H, V output pin are shown as Figure 1. It is possible to reduce rise time by insert the resister between VCC line and H, V output pin, but set the value of resister in order that the current is under 7.5 mA. Setting the value of R is more than 2 k as shown in Figure 1.
5V 1 k I < 7.5 mA 5V R
Figure 1 5. The terminal of R, G, B output pin (pin 27, 30, 35). It is possible to add a pull-up resister according as drive ability. But set the value of resister in order that the current is under 10 mA. Setting the value of R is more than 500 as shown in Figure 2.
5V I < 10 mA 50 430 R
Figure 2 6. Switch (pin 19) can be changed when this terminal is GND or OPEN When GND: Signal output from input 1 When OPEN: Signal output from input 2 When the switch is being used as Figure 3 0 to 0.5 V: Signal output from input 1 2 to 5 V: Signal output from input 2 It is not allowable to set voltage higher than VCC.
19
Figure 3 Notice of Making Printed Circuit Board * Please notice following as shown below. It will maybe cause something oscillation because of the P.C.B. layout of the wide band analog switch. * The distance between resister and output pin is as short as possible when insert a output pull-down resister. * The capacitance of output terminal as small as possible. * Set the capacitance between VCC and GND near the pins if possible. * Using stable power-source (if possible the separated power-source will be better). * It will reduce the oscillation when add a resister that is tens of ohms between output pin and next stage. * Assign an area as large as possible for grounding.
Rev.2.00 Sep 14, 2006 page 13 of 14
M52758SP/FP
Package Dimensions
JEITA Package Code P-SDIP32-8.9x28-1.78 RENESAS Code PRDP0032BA-A Previous Code 32P4B MASS[Typ.] 2.2g
32
17
*1
e1
E
*2
D
A2
c
1
16
NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
Reference Symbol
A
Dimension in Millimeters
SEATING PLANE
e
*3 b 3
bp
*3
b2
e1 D E A A1 A2 bp b2 b3 c e L
Min Nom Max 9.86 10.16 10.46 27.8 28.0 28.2 8.75 8.9 9.05 5.08 0.51 3.8 0.35 0.45 0.55 0.63 0.73 1.03 0.9 1.0 1.3 0.22 0.27 0.34 0 15 1.528 1.778 2.028 3.0
JEITA Package Code P-SSOP36-8.4x15-0.80
L
RENESAS Code PRSP0036GA-B
Previous Code 36P2R-D
MASS[Typ.] 0.5g
36
19
HE
*1
E
A1
F
1 Index mark
18
c
NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
*2
D
A2 *3
A1
Reference Symbol
A
Dimension in Millimeters
e
y
bp
D E A2 A A1 bp c HE e y L
Detail F
Min Nom Max 14.8 15.0 15.2 8.2 8.4 8.6 2.05 2.35 0 0.1 0.2 0.3 0.35 0.45 0.18 0.2 0.25 0 8 11.63 11.93 12.23 0.65 0.8 0.95 0.10 0.3 0.5 0.7
Rev.2.00 Sep 14, 2006 page 14 of 14
L
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
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1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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