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| CYStech Electronics Corp. 30V N-Channel Logic Level Enhancement Mode MOSFET Spec. No. : C723N3 Issued Date : 2009.06.12 Revised Date : Page No. : 1/7 MTB55N03N3 Features * VDS=30V RDS(ON)=55m@VGS=10V, ID=3.5A RDS(ON)=85m@VGS=4.5V, ID=2A * Lower gate charge * Pb-free lead plating and Halogen-free package BVDSS RDSON(Max) ID 30V 55m 3.5A Equivalent Circuit MTB55N03N3 Outline SOT-23 D GGate SSource DDrain S G Absolute Maximum Ratings (Tc=25C, unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current TA=25C TA=70C Thermal Resistance, Junction to Ambient Operating Junction and Storage Temperature Power Dissipation TA=25C TA=70C Symbol VDS VGS ID IDM PD Rth, j-a Tj, Tstg Limits 30 20 3.5 2.4 14 (Note 1 & 2) 1.5 (Note 3) 1 (Note 3) 100 (Note 3) -55 ~ +175 Unit V V A A W C/W C Note : 1. Pulse width limited by maximum junction temperature 2. Duty cycle 1% 3. Surface mounted on 1 in copper pad of FR4 board; 270C/W when mounted on min. copper pad MTB55N03N3 CYStek Product Specification CYStech Electronics Corp. Electrical Characteristics (TA=25C, unless otherwise specified) Symbol Static BVDSS VGS(th) IGSS IDSS IDON 1 *RDS(ON) 1 *GFS 1 Dynamic Ciss Coss Crss *td(ON) 1 2 *tr 1 2 *td(OFF) 1 2 *tf 1 2 *Qg 1 2 *Qgs 1 2 *Qgd 1 2 Source-Drain Diode IS ISM 3 VSD 1 1 2 3 Spec. No. : C723N3 Issued Date : 2009.06.12 Revised Date : Page No. : 2/7 Min. 30 1 3.5 - Typ. 1.5 45 65 5 319 66 53 8 2.5 20 5 6 0.8 1.8 - Max. 3 100 1 10 55 85 2 8 1.2 Unit V V nA A A A m S Test Conditions VGS=0, ID=250A VDS=VGS, ID=250A VGS=20V, VDS=0 VDS=24V, VGS=0 VDS=20V, VGS=0, Tj=125C VDS=5V, VGS=10V ID=3.5A, VGS=10V ID=2A, VGS=4.5V VDS=5V, ID=3.5A pF VDS=10V, VGS=0, f=1MHz ns VDS=10V, ID=1A,VGS=10V, RG=6 nC VDS=10V, ID=3.5A, VGS=4.5V A V IF=IS, VGS=0V Pulse test : Pulse width300s, Duty cycle2% Independent of operating temperature Pulse width limited by maximum junction temperature Ordering Information Device MTB55N03N3 Package SOT-23 (Pb-free) Shipping 3000 pcs / Tape & Reel Marking 10 MTB55N03N3 CYStek Product Specification CYStech Electronics Corp. Characteristic Curves Spec. No. : C723N3 Issued Date : 2009.06.12 Revised Date : Page No. : 3/7 MTB55N03N3 CYStek Product Specification CYStech Electronics Corp. Characteristic Curves(Cont.) Spec. No. : C723N3 Issued Date : 2009.06.12 Revised Date : Page No. : 4/7 MTB55N03N3 CYStek Product Specification CYStech Electronics Corp. Reel Dimension Spec. No. : C723N3 Issued Date : 2009.06.12 Revised Date : Page No. : 5/7 Carrier Tape Dimension MTB55N03N3 CYStek Product Specification CYStech Electronics Corp. Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 C Spec. No. : C723N3 Issued Date : 2009.06.12 Revised Date : Page No. : 6/7 Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Note : All temperatures refer to topside of the package, measured on the package body surface. Profile feature Average ramp-up rate (Tsmax to Tp) Preheat -Temperature Min(TS min) -Temperature Max(TS max) -Time(ts min to ts max) Time maintained above: -Temperature (TL) - Time (tL) Peak Temperature(TP) Time within 5C of actual peak temperature(tp) Ramp down rate Time 25 C to peak temperature Sn-Pb eutectic Assembly 3C/second max. 100C 150C 60-120 seconds 183C 60-150 seconds 240 +0/-5 C 10-30 seconds 6C/second max. 6 minutes max. Pb-free Assembly 3C/second max. 150C 200C 60-180 seconds 217C 60-150 seconds 260 +0/-5 C 20-40 seconds 6C/second max. 8 minutes max. MTB55N03N3 CYStek Product Specification CYStech Electronics Corp. SOT-23 Dimension Spec. No. : C723N3 Issued Date : 2009.06.12 Revised Date : Page No. : 7/7 A L 3 B 1 2 S Marking: Device Code Date Code V G C D K 3-Lead SOT-23 Plastic Surface Mounted Package CYStek Package Code: N3 H J Style: Pin 1.Gate 2.Source 3.Drain *: Typical DIM A B C D G H Inches Min. Max. 0.1102 0.1204 0.0472 0.0630 0.0335 0.0512 0.0118 0.0197 0.0669 0.0910 0.0005 0.0040 Millimeters Min. Max. 2.80 3.04 1.20 1.60 0.89 1.30 0.30 0.50 1.70 2.30 0.013 0.10 DIM J K L S V Inches Min. Max. 0.0034 0.0070 0.0128 0.0266 0.0335 0.0453 0.0830 0.1083 0.0098 0.0256 Millimeters Min. Max. 0.085 0.177 0.32 0.67 0.85 1.15 2.10 2.75 0.25 0.65 Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: * Lead: 42 Alloy ; pure tin plated * Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0 Important Notice: * All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. * CYStek reserves the right to make changes to its products without notice. * CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. * CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTB55N03N3 CYStek Product Specification |
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