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PAC7311 PAC7311 VGA PC Camera Single-Chip General Description The PAC7311 is a single chip with an embedded VGA CMOS image sensor and USB 1.1 interface. It has JPEG image compression and image processing. The generic application is a PC camera. JPEG decoder and auto exposure are performed by software in PC side. And the optical size is 1/4" which can easily be embedded in LCD monitors, notebooks or PDA. There are 4 IO-trapping pins with internal pull-low resistors. It is flexible for customers to set PID. It supports the interface to a serial-EEPROM. When the EEPROM function is enabled, the internal control registers can be power-up loaded from external EEPROM. This allows customization of VID, PID, product string. Features VGA resolution, ~1/4"Lens Frame rate up to 30fps at following resolution format VGA format (640x480) with JPEG compression CIF format (352x288) with JPEG compression QVGA format (320x240) with JPEG compression QCIF format (176x144) without compression QQVGA format (160x120) without compression RGB Bayer's pattern raw data Up to 3fps @VGA format (640x480) Up to 12fps @CIF format (352x288) Up to 12fps @QVGA format (320x240) Up to 30fps @QCIF format (176x144) Up to 30fps @QQVGA format (160x120) Standard JPEG compression engine comply to ISO/IEC 10918-1(JPEG) AEC/AGC/AWB automatic 4 IO-trapping pins to set USB PID Support USB suspend mode Support video data transfer through USB isochronous transfer Snapshot control through USB interrupt pipe USB Vendor ID, Product ID, device release number and the string descriptor index via a serial EEPROM (93C46) or by metal mask Complete Universal Serial Bus(R) spec V1.1 compatibility Key Specification Supply Voltage Resolution Array Diagonal Optical format Pixel Size Frame Rate System Clock Color Filter Scan mode Sensitivity PGA gain S/N ratio Power consumption Package 5.0V 10% 640 (H) x 480 (V) 4.48mm 1/4" 5.6um x 5.6um Up to 30fps 12MHz RGB Bayer Pattern Progressive 3.06 V/lux*sec 23.52dB (Max.) >45dB 65mA 48-pin PLCC / 37-pin CSP Ordering Information Order number PAC7311PE PAC7311CS Package Type 48-pin PLCC 37-pin CSP Package Size(mm) 11.43 x 11.43 5.06 x 5.55 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 1 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 1. Pin Assignment 1.1 PLCC Package Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Name NC NC NC VRB VCM NC NC VRT VDDA VDDAY EPR_DO VSSQ VDDQ EPR_CS/TR2 EPR_CK/TR3 EPR_DI/TR1 VSSAY NC NC GPO/TR0 LED NC VSSQ EPR_EN IOTRAP# KEY# NC VSSQ VDDD PWR_5V NC VDDQ GPIO TEST NC RESET# VSSQ XOUT XIN DP DN NC VDDQ VDDP VDDAD VDDAV VSSA PWR_5V Type BYPASS BYPASS BYPASS BYPASS BYPASS IN GND BYPASS OUT OUT OUT GND OUT OUT GND IN IN IN GND BYPASS PWR BYPASS IO IN IN GND OUT IN I/O I/O BYPASS BYPASS BYPASS BYPASS GND PWR Description No Connection No Connection No Connection Analog voltage reference Analog voltage reference No Connection No Connection Analog voltage reference Analog power for AD/DA/PGA, 2.5V Sensor reset power reference Data output of EEPROM Ground for I/O and PHY Power for I/O and PHY Chip Select of EEPROM; (IO trap pin for PID2, internal pull-down 100Kohm) Serial clock of EEPROM; (IO trap pin for PID3, internal pull-down 100Kohm) Data input of EEPROM; (IO trap pin for PID1, internal pull-down 100Kohm) Sensor ground No Connection No Connection General purpose output; (IO trap pin for PID0, internal pull-down 100Kohm) LED driver No Connection Ground for I/O and PHY Enable signal of EEPROM (1: enable, 0: disable), internal pull-down 100Kohm I/O trap enable signal (0: enable, 1: disable, internal pull-down 100Kohm) Snapshot control signal (Active Low, internal pull-up 100Kohm) No Connection Ground for I/O and PHY Logic power for mixed-mode circuit, 2.5V Main power, USB bus power No Connection Power for I/O and PHY, 3.3V General purpose input/output, internal pull-down 100Kohm Test pin. Connect to GND in normal operation mode No Connection Chip power up reset Ground for I/O and PHY Crystal output Crystal input DP for USB1.1 PHY DN for USB1.1 PHY No Connection Power for I/O and PHY Analog power for PLL Analog voltage reference power for core logic, 2.5V Analog voltage reference Analog ground Main power, USB bus power 2 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 1.2 CSP Package Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 Name NC VRB VCM VRT VDDA VDDAY EPR_DO VSSQ VDDQ EPR_CS/TR2 EPR_CK/TR3 EPR_DI/TR1 VSSAY GPI/TR0 LED EPR_EN IOTRAP# KEY# NC VSSQ VDDD PWR_5V VDDQ GPIO TEST RESET# VSSQ XOUT XIN DP DN VDDQ VDDP VDDAD VDDAV VSSA PWR_5V Type BYPASS BYPASS BYPASS BYPASS BYPASS IN GND BYPASS OUT OUT OUT GND OUT OUT IN IN IN GND BYPASS PWR BYPASS IO IN IN GND OUT IN I/O I/O BYPASS BYPASS BYPASS BYPASS GND PWR Description No Connection Analog voltage reference Analog voltage reference Analog voltage reference Analog power for AD/DA/PGA, 2.5V Sensor reset power reference Data output of EEPROM Ground for I/O and PHY Power for I/O and PHY Chip Select of EEPROM; (IO trap pin for PID2, internal pull-down 100Kohm) Serial clock of EEPROM; (IO trap pin for PID3, internal pull-down 100Kohm) Data input of EEPROM; (IO trap pin for PID1, internal pull-down 100Kohm) Sensor ground General purpose output; (IO trap pin for PID0, internal pull-down 100Kohm) LED driver Enable signal of EEPROM (1: enable, 0: disable), internal pull-down 100Kohm I/O trap enable signal (0: enable, 1: disable, internal pull-down 100Kohm) Snapshot control signal (Active Low, internal pull-up 100Kohm) No Connection Ground for I/O and PHY Logic power for mixed-mode circuit, 2.5V Main power, USB bus power Power for I/O and PHY General purpose input/output, internal pull-down 100Kohm Test pin. Connect to GND in normal operation mode Chip power up reset Ground for I/O and PHY Crystal output Crystal input DP for USB1.1 PHY DN for USB1.1 PHY Power for I/O and PHY, 3.3V Analog power for PLL Analog voltage reference power for core logic, 2.5V Analog voltage reference Analog ground Main power, USB bus power All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 3 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 2. Block Diagram PAC7311 is a single-chip USB camera. It includes a VGA sensor based on PixArt VGA sensor with enhanced image quality and sensitivity, a 48MHz PLL, internal regulators, JPEG image compression, image processing schemed, control registers, on-chip SRAM for image data buffer and USB controller. All register parameters are set by USB interface. And the JPEG compressed image data is transmitted by USB 1.1 isochronous pipe. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 4 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 3. Function Description VGA PC Camera Single-Chip 3.1 Analog Data Path The PixArt VGA sensor is a 1/4inch CMOS imaging sensor with 644x488 physical pixels. The active region of sensor array is 644x484. The sensor array is cover with Bayer pattern color filters and micro lens. After a programmable exposure time, the image is sampled first with CDS (Correlated Double Sampling) block to improve S/N ration and reduce fixed pattern noise. Three analog gain stages are implemented before signal transferred by the 10bit ADC. The front gain stage (FG) can be programmed to fit the saturation level of sensor to the full-range input of ADC. The programmable color gain stage (CG) is used to balance the luminance response difference between B/G/R. The global gain stage (GG) is programmed to adapt the gain to the image luminance. The fine gained signal will be digitized by the on-chip 10bit ADC. After the image data has been digitized, further alteration to the signal can be applied before the data is output. The gain stage can be set by digital register, please refer to the following equation to get the mapping gain. Front Gain = 2 + (n/4), n = 0, 1, 2, ...7 Color Gain = 1 + (m/16), m= 0, 1, 2, ...15 Global Gain = 1 + (q/16), q = 0, 1, 2, ...15 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 5 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 4. Specifications Absolute Maximum Ratings Exposure to absolute maximum rating may affect device reliability. Symbol VDD VIN VOUT TSTG Parameter DC supply voltage DC input voltage DC output voltage Storage temperature Min -0.5 0.5 -0.5 0 Max 5.5 3.8 3.8 70 Unit V V V Notes Recommend Operating Condition Symbol TA VDD FCLK Parameter Operating Temperature Power supply voltage System clock frequency Min 0 4.25 Typ. 5.0 12 Max 40 5.5 Unit C V MHz Notes DC Electrical Characteristics (Typical values at 25C, VDD =5.0 V) Symbol Type: PWR IDD Operating Current 65 mA @30 frame/sec Parameter Min. Typ. Max. Unit Notes Type: IN & I/O, Reset VIH VIL CIN ILKG Input voltage HIGH Input voltage LOW Input capacitor Input leakage current 2.0 0 VDDQ 0.8 10 1.0 V V pF uA Type: OUT & I/O VOH VOL Output voltage HIGH Output voltage LOW VDDQ-0.2 0.2 V V CL= 10pf, RL=1.2k CL= 10pf, RL=1.2k Sensor Characteristics (Light source: 3200K halogen lamp; 8bit resolutions) Symbol PRNU VSAT VDARK DSNU R G B Parameter Photo response non-uniformity Saturation output voltage Dark output voltage Dark signal non-uniformity Sensitivity (Red channel) Sensitivity (Green channel) Sensitivity (Blue channel) Min. Typ. 1.3 0.832 0.055 0.001 4.590 3.060 2.448 Max. Unit % V V/sec V V/Lux*sec V/Lux*sec V/Lux*sec Notes All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 6 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 5. Package Information 5.1 PLCC Pin Assignment and Optical Center Information Note: Sensor Array Center = Package Center --TOP VIEW-- All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 7 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 5.2 PLCC Package Outline Dimension 18 7 19 6 1 48 30 43 31 42 -- TOP VIEW -- All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 8 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 5.3 CSP Pin Assignment Pad Extension Formation EPR_CS/TR2 Leads & BGA Formation EPR_CS/TR2 EPR_CK/TR3 EPR_CK/TR3 EPR_DI/TR1 EPR_DI/TR1 EPR_DO VDDAY EPR_DO VSSAY VDDAY GPO/TR0 LED VCM VRB VSSAY VDDQ VDDA VSSQ VDDQ VDDA VSSQ VRT VRT VCM VRB GPO/TR0 LED NC EPR_EN IOTRAP# KEY# NC VSSQ VDDD PWR_5V NC EPR_EN Sensor Area PWR_5V VSSA VDDAV VDDAD VDDP VDDQ PWR_5V VSSA VDDAV VDDAD VDDP VDDQ IOTRAP# NNN NNN KEY# NC VSSQ VDDD PWR_5V RESET# VDDQ GPIO VSSQ XIN XOUT TEST DN DP XIN RESET# DN GPIO Top view (Bumps down) Step Size5061 x 5551 um Die Size4841 x 5331 um Ball Pitch650 um Ball Diameter300 um Scribe Line360 um Buttom view (Bumps up) Package Size4966 x 5456 um Marking CodeNNNNNN - Datecode 5.4 Recommend PCB Layout VDDQ DP VSSQ XOUT TEST All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 9 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 5.4 CSP Package Dimensions and Ball Matrix Table 1 2 3 4 5 6 A VSSAY(PIN 13) EPR_DI/TR(PIN 12) EPR _CS/TR2(PIN 10) VSSQ(PIN 8) VDDAY(PIN 6) VRT(PIN 4) B LED(PIN 15) GPO/TR0(PIN 14) VDDQ(PIN 9) EPR _D0(PIN 7) VCM(PIN 3) VRB(PIN 2) C VSSQ/EPR_EN(PIN 16) EPR _CK/TR3(PIN 11) VDDA(PIN 5) NC(PIN 1) PWR_5V(PIN 37) D IOTRAP# (PIN 17) KEY# (PIN 18) VDDAV(PIN 35) VSSA(PIN 36) E NC(PIN 19) VSSQ(PIN 20) VDDP(PIN 33) VDDAD(PIN 34) F VDDD(PIN 21) PWR_5V(PIN 22) RESET# (PIN 26) XOUT(PIN 28) DP(PIN 30) VDDQ(PIN 32) G VDDQ(PIN 23) GPIO(PIN 24) TEST(PIN 25) VSSQ(PIN 27) XIN(PIN 29) DN(PIN 31) A E 1 2 3 4 5 6 S1 6 J1 5 4 3 2 1 F A B C D E F G 886.095 S2 A J2 B C D E F G B 158.28 NNN NNN Center of sensor Center of BGA= Center of package C3 Top view (Bumps down) Bottom view (Bumps up) Marking CodeNNNNNN - Datecode C C2 C1 Side view Symbol Package Body Dimension X Package Body Dimension Y Package Height Ball Height Package Body Thickness Thickness of Glass surface to wafer Ball Diameter Total Pin Count Pin Count X axis Pin Count Y axis Pins Pitch X axis Pins Pitch Y axis Edge to Pin Center Distance analog X Edge to Pin Center Distance analog Y Edge to Optical Center Distance analog X Edge to Optical Center Distance analog Y A B C C1 C2 C3 D N N1 N2 J1 J2 S1 S2 E F Nominal 4966 5456 800 160 640 415 300 37 6 7 650 650 858 778 2325 1842 Min. m 4941 5431 740 130 605 395 270 Max. 4991 5481 860 190 675 435 330 828 748 2300 1817 888 808 2350 1867 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 10 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 6. Reference Application Circuit 6.1 PLCC Package (PAC7311PE) VSSAY VSSQ VDDQ VDDAY VDDQ R1 R2 1K D1 RST# 10k LED LED C1 1uF VDDA VRT R3 51k 7 U1 18 17 16 15 14 13 12 11 10 9 8 EPR_CK/TR3 EPR_CS/TR2 EPR_DI/TR1 VSSAY VDDAY VDDQ EPR_DO VDDA VSSQ VRT NC 19 20 LED 21 22 VSSQ 23 24 25 KEY 26 27 VSSQ VDDD VDD5V 28 29 30 NC KEY VDDD VCM VRB VDDP XOUT R4 1M XIN VDD5V VSSA VDDAV VDDAD VDDP VDDQ VRT VDDA S1 C2 C3 1uF 1uF KEY NC GPO/TR0 LED NC VSSQ EPR_EN IOTRAP# KEY # NC VSSQ VDDD NC VCM VRB NC NC 6 5 4 3 2 1 48 47 46 45 44 43 C4 X1 12MHz C5 47pF PAC7311PE NC PWR_5V VSSA VDDAV VDDAD VDDP 47pF VSSQ C6 C7 C8 C9 C11 C12 1uF 1uF 1uF 1uF 1uF 1uF VDDAV VDDAD RESET# PWR_5V VDDQ TEST GPIO NC NC VDDQ XOUT VSSQ XIN DN NC DP C10 1uF 31 32 33 34 35 36 37 38 39 40 41 42 VRB VCM XOUT RST# XIN DN DP VDDQ VSSQ VSSQ VDDAY L1 C13 3.3uH 0.1uF VSSA VSSAY VDDQ R5 DP DN R6 27 ohm L3 Short / 3.3uH 1.5K VSSQ 9 8 USBGND VSSQ VDD5V CON1 MINI USB 5P L2 Open/3.3uH VSSA VDD5V R7 27 ohm L4 Short / 3.3uH C17 20pF C18 20pF C19 0.1uF C16 + 10uF HC1 HC2 5 4 3 2 1 GND2 NC + +5V HC4 HC3 VSSAY C14 C15 C20 C22 10uF 0.1uF 10uF 0.1uF 10uF 0.1uF 10uF 0.1uF 10uF 0.1uF VSSQ + + + + + R8 10M VSSQ C21 4.7nF 6 7 USBGND VDDQ C23 C24 C25 C26 C27 C28 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 11 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 6.2 CSP Package (PAC7311CS) VDDQ VDDQ VSSAY VSSQ R3 51k VDDAY VDDA VRT R1 R2 1K D1 RST# 10k LED LED C1 1uF KEY VDDD U1 VDDP 3 2 1 37 36 35 34 33 32 VCM VRB VDD5V VSSA XOUT R4 1M XIN S1 C2 C3 1uF 1uF KEY LED KEY VSSQ VDD5V VDDD 14 15 16 17 18 19 20 21 22 VSSAY EPR_DI/TR1 EPR_SK/TR3 EPR_CS/TR2 VDDQ VSSQ EPR_DO VDDAY VDDA VRT 13 12 11 10 9 8 7 6 5 4 GPO/TR0 LED EPR_EN IOTRAP# KEY # NC VSSQ VDDD PWR_5V PAC7311CS VDDQ GPIO TEST RESET# VSSQ XOUT XIN DP DN VCM VRB NC PWR_5V VSSA VDDAV VDDAD VDDP VDDQ C4 X1 12MHz C5 47pF VDDAV VDDAD VDDP 47pF VSSQ VDDQ VDDA VDDAV VDDAD VRT VRB C6 C7 C8 C9 C11 C12 1uF 1uF 1uF 1uF 1uF 1uF 23 24 25 RST# 26 27 XOUT 28 XIN 29 DP 30 DN 31 C10 1uF VDDQ VSSQ VCM VDDAY L1 C13 3.3uH 0.1uF VSSA VSSAY VDDQ R5 R6 27 ohm DP DN R7 27 ohm L4 Short / 3.3uH C17 20pF C18 20pF VDD5V L3 Short / 3.3uH 1.5K VSSQ 9 8 USBGND VSSQ VDD5V CON1 MINI USB 5P L2 Open/3.3uH VSSA HC1 HC2 5 4 3 2 1 GND2 NC + +5V HC4 HC3 VSSAY C14 C15 10uF 0.1uF 10uF 0.1uF 10uF 0.1uF 10uF 0.1uF 10uF 0.1uF VSSQ + + + + + C19 0.1uF C16 + 10uF R8 10M 6 7 C20 C22 USBGND VDDQ C23 C24 C25 C26 C27 C28 C21 VSSQ 4.7nF All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 12 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 7. Update History Version V1.0 V1.1 V1.2 V1.3 V1.4 V1.5 Update Creation, Preliminary 1st version 4. Specifications 5. Package information 4. Specifications 5. Package information 4. Specifications 5. Package information 6. Reference Application Circuit 5. Package information 6. Reference Application Circuit General Description 5. Package information 6. Reference Application Circuit (Change list: C4, C5, L2) Date 10/27/2004 10/29/2004 11/04/2004 06/28/2005 07/01/2005 10/07/2005 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 13 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.5 Oct. 2005 |
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