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LED Driver Series for LCD Backlight
White backlight LED drivers for medium to large LCD panels (SWREG type)
BD9202EFS
No.09040EAT01
Description BD9202EFS is the LED driver IC which loads the step-up DCDC controller and the constant electric current driver of 8ch. As for the constant electric current driver, PWM modulated light of 10bit gradation (1024stages) is possible with the register setting from 4 line serial interfaces. Because it can adjust brightness with every channel, back light is controlled in every area according to the light and shade of the picture, rise of contrast ratio is actualized. Features 1)8ch constant electric current driver built-in
Largest drive electric current 150mA/CH *2 10bit gradation (1024 stages) modulated light is possible by register setting To input the standard CLK of PWM from outside is possible (BCT_SYNC_IN terminal) Because it is high output resisting pressure (60V), the multi-stage connection of LED is p ossi b le Detecting abnormal mode with LED opening detection 2)Step-up DCDC controller built-in 3) UVLO function 4) 4 line serial interface 5) HTSSOP-A44 Package
Applications For the equipment of loading LCD indicator of TV, monitor and note PC and the like Absolute maximum rating (Ta=25) Parameter Power supply voltage LED18 terminal voltage EN,LOADSW terminal voltage FAIL1,FAIL2 terminal voltage VREF,ISET,VSET,TEST,BRT,RT, CS,UVLO,COMP,CP1,CP2,TOUT1, TOUT2,SWOUT,OVP,CT_SYNC_IN, CT_SYNC_OUT,BCT_SYNC_IN, BCT_SYNC_OUT terminal voltage CPUDI,CPUCLK,CPUCS,CPUDO terminal voltage Power Dissipation Operating Temperature Range Storage Temperature Range LED Maximum Current Symbol VCC CPUVDD VREG VLED18 VEN,VLOADSW VFAIL1,VFAIL2 VVREF, VISET, VVSET, VTEST, VBRT, VRT, VCS, VUVLO, VCOMP,VCP1,VCP2,VTOUT1, VTOUT2,VSWOUT,VOVPVCT_SYNC_IN, VCT_SYNC_OUT,VBCT_SYNC_IN, VBCT_SYNC_OUT VCPUDI, VCPUCLK, VCPUCS, VCPUDO Pd Topr Tstg ILED Rating 36 5.5 5.5 60 36 7 Unit V V V V V V
-0.35.5 VREG
V
-0.35.5 CPUVDD 4.5 *1 -40+85 -55+150 150 *2 *3
V W mA
*1At the time of mounting 2 layer glass epoxy base-plate of 70mmx70mmx1.6mm, 36.0mW is reduced at 1 above Ta=25. *2 When the VF variation of LED is large, the loss quantity with the driver will increase, because there are times when package temperature rises, please do the base-plate design after considering heat dissipation measure sufficiently. *3It is the electric current quantity per 1ch.
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2009.04 - Rev.A
BD9202EFS
Operating condition (Ta=25)
Parameter Power supply voltage CPUVDD CT oscillation frequency setting range CT_SYNC_IN input frequency range *4*5 BCT oscillation frequency setting range BCT_SYNC_IN input frequency range *4*5 VSET Input potential fCT FCT_SYNC_IN fBCT FBCT_SYNC_I VSET 2.75.5 300800 fCT800 1001000 fBCT1000 0.92.4 V kHz kHz kHz kHz V Symbol VREG Voltage range 5.255.5 Unit V
Technical Note
*4 When not using external frequency input, please connect the terminal of CT_SYNC_IN, BCT_SYNC_IN to GND. *5When using external frequency input, please do not do the operation that is changed to internal oscillation frequency on midway. Electric characteristic (Unless otherwise specified Ta=25VCC=24VVREG=5V, Parameter
All the circuit electric currents
Symbol
Min 6 4.8 5 1.57 -
CPUVDD=3V Limit Typ Max 13 0 5 12 1.60 7 2
Unit
Condition
VCC=24V CPUVDD=3V, EN=3V LED18=OFF EN=0V Io=0mA,CREG=2.2uF
At the time of external impressing of VREG=5.25VAt LED18=OFF,EN=3V
Circuit electric currents Stand-by electric current
VREG section
Icc IST VREG IREG VREF RONH RONL
21 10 5.2 20 1.63 -
mA uA V mA V
VREG Output voltage VREG VREG sink electric current
VREF Output voltage
Switching section
Io=0uA ION=-10mA ION=10mA
SWOUT Source value of resistance SWOUT Sink value of resistance
OCP section
Over-current protective operating voltage
Error amplifier section LED Control voltage COMP Sink electric current COMP Source electric current CT Oscillator section CT Oscillation frequency CT_SYNC_IN input High voltage CT_SYNC_IN input low voltage CT_SYNC_OUT output high voltage CT_SYNC_OUT output low voltage BCT Oscillator section BCT Oscillation frequency BCT_SYNC_IN input High voltage BCT_SYNC_IN input low voltage BCT_SYNC_OUT output high voltage BCT_SYNC_OUT output low voltage OVP section Over-voltage detection reference voltage OVP Hysteresis voltage UVLO section UVLO (VREG) Detection voltage UVLO (VREG) Hysteresis voltage UVLO(EXT) Detection voltage UVLO(EXT) Hysteresis voltage
VOLIMIT VLED ICOMPSINK ICOMPSOURCE
FCT VSYNC_INH VSYNC_INL VSYNC_OUTH VSYNC_OUTL
0.1 0.55 40 -200
500 VREG x0.7 -0.3 VREG -1.0 -
0.2 0.75 100 -100
600 VREG -0.15 0.1
0.3 0.95 200 -40
V V uA uA
Vcs=Sweep up
VLED=2V,Vcomp=1V VLED=0V,Vcomp=1V
700 VREG +0.3 VREG x0.3 0.5
kHz V V V V
RT=51k
IOL=-1mA IOL=1mA
FBCT VBSYNC_INH VBSYNC_INL VBSYNC_OUTH VBSYNC_OUTL
500 VREG x0.7 -0.3 VREG -1.0 1.85 0.4 2.6 50 1.7 50
600 VREG -0.15 0.1 2.0 0.5 2.9 100 1.9 100
700 VREG +0.3 VREG x0.3 0.5 2.15 0.6 3.2 200 2.1 200
kHz V V V V V V V mV V mV
BRT=51k
IOL=-1mA IOL=1mA VOVP=Sweep up VOVP=Sweep down VREG=Sweep down VREG=Sweep up UVLO=sweep down UVLO=sweep up
VOVP VOVPHYS VUVLO_VREG VUHYS_VREG VUVLO_EXT VUHYS_EXT
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2009.04 - Rev.A
BD9202EFS
Parameter LOADSW section LOADSW ON value of resistance Filter(CP1,CP2) section CP Detection voltage CP Charging current LED output (LED18) section LED Electric current absolute variation ISET Clamp voltage Open detection voltage Short detection voltage Logic input(EN,CPUCS,CPUCLK,CPUDI) Input High voltage Input Low voltage Input influx electric current (CPUCS,CPUCLK,CPUDI) Input influx electric current (EN) Logic output section(CPUDO) output High voltage output Low voltage FAIL1,2outut open drain FAIL Low voltage Symbol Min 1.2 1.8 -2.0 1.8 0.05 3.5
0.7x
CPUVDD
Technical Note
Limit Typ 2.0 2.0 -1.0 2.0 0.20 4.0 Max 2.2 2.2 -0.5 (5) 2.2 0.35 4.5
CPUVDD
Unit k V uA % V V V
Condition
RON_LOAD VCP ICP ILED VISET VOPEN VSHORT
ILOAD=1mA CP1,CP2=Sweep up CP1,CP2=0V ILED=75mA,VSET=1.65V RISET=130k when input VSETVISET VLED=Sweep down VLED=Sweep up
VINH VINL IIN IEN VOUTH VOUTL VOL
0 25 2.7 0.25 0.14
+0.3 0.3x
CPUVDD
V V uA uA V V V VIN=5V(CPUCS, CPUCLK,CPUDI), CPUVDD=5V VEN=5V(EN) IOL=-1mA,CPUVDD=3V IOL=1mA,CPUVDD=3V IOL=1mA
-0.3 -5 13 2.4 0.07
5 38 0.6 0.28
This product is not designed for protection against radioactive rays. Block diagram
VIN CIN CREG UVLO
34
+
VREG
15 33
LOADSW
COUT
VCC EN VREF RT
14 41
UVLO EXT
UVLO VREG
TSD
OVP FILTER
30 4
VREG PWM COMP OSC1 + + Control Logic +
OVP CP1 CP1 FAIL1 SWOUT
6
16 28
Driver
31
29
CS
CT_SYNC_IN CT_SYNC_OUT AGND COMP RPC CPC CPUVDD CPUCS CPUCLK CPUDI CPUDO TOUT2
37 35
OCP
ERR AMP
8 39
11 13 12 9 10 40
+
32
PGND1
1 3 20 22 23 25 42 44
I/F
Logic Current driver
LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8
VSET
18
ISET ISET
17
2 21 24 43
PGND2 PGND3 PGND4 PGND5
PWMCLK
BRT
27
OSC2
Open-Short Detect FILTER
5
CP2 CP2 FAIL2 Nov.29.2007
BCT_SYNC_IN
38 7 36
BCT_SYNC_OUT
TEST 19
26
TOUT1
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3/19
2009.04 - Rev.A
BD9202EFS
Pin configuration
BCT_SYNC_OUT CT_SYNC_OUT
Technical Note
BCT_SYNC_IN
CT_SYNC_IN
LOADSW
PGND1
SWOUT
PGND5
TOUT 1
LED8
PGND4
TOUT 2
COMP
UVLO
LED7
LED6
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
BDEFS
1
LED1
2
PGND2
3
LED2
4
CP1
5
CP2
6
FAIL1
7
FAIL2
8
AGND
9
CPUDI
10
CPUDO
11
CPUVDD
12
CPUCLK
13
CPUCS
14
VCC
15
VREG
16
VREF
17
ISET
18
VSET
19
TEST
20
LED3
21
PGND3
22
LED4
Terminal number terminal name PIN No.
(1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) (12) (13) (14) (15) (16) (17) (18) (19) (20) (21) (22)
Terminal name
LED1 PGND2 LED2 CP1 CP2 FAIL1 FAIL2 AGND CPUDI CPUDO CPUVDD CPUCLK CPUCS VCC VREG VREF ISET VSET TEST LED3 PGND3 LED4
Function
LED output terminal1 GND2 for LED LED output terminal2 Condenser connected terminal for filter setting 1 Condenser connected terminal for filter setting 2 Malfunction detection output 1 Malfunction detection output 2 Small signal section GND Serial interface DATA input terminal Serial interface DATA output terminal Serial interface Power supply terminal Serial interface CLK input terminal Serial interface CS input terminal
PIN No.
(23) (24) (25) (26) (27) (28) (29) (30) (31) (32) (33) (34) (35) (36) (37) (38) (39) (40) (41) (42) (43) (44)
Terminal name
LED5 PGND4 LED6 TOUT1 BRT RT CS OVP SWOUT PGND1 LOADSW UVLO CT_SYNC_OUT BCT_SYNC_OUT CT_SYNC_IN BCT_SYNC_IN COMP TOUT2 EN LED7 PGND5 LED8
Function
LED output terminal 5 GND4 for LED LED output terminal 6 Output terminal 1 for test monitor 1 BCT oscillation frequency setting resistant connected terminal CT oscillation frequency setting resistant connected terminal DC/DC output electric current detection terminal DC/DC Over-voltage detection terminal DC/DC Switching output terminal GND1 for LED Load switch control terminal It is the prevention detection terminal for miss operating at low voltage CT Synchronization signal output terminal BCT Synchronization signal output terminal CT Synchronization signal input terminal BCT Synchronization signal input terminal Error amplifier output terminal Output terminal 2 for test monitor Enabling terminal LED output terminal 7 GND5 for LED LED output terminal 8
Power supply terminal
Series regulator output terminal Reference voltage output terminal LED fixed electric current setting resistant connected terminal DC modulated light voltage input terminal Test mode change terminal Output terminal 3 GND3 for LED LED output terminal 4
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4/19
2009.04 - Rev.A
LED5
OVP
EN
CS
RT
BRT
BD9202EFS
The reference data (Unless otherwise specified VCC=24V and Ta=25 )
5.5
Technical Note
110
VCC=24V, Io=0mA VCC=24V, Io=0mA
700
OSC1,OSC2 FREQUENCY [kHz]
5.3
680 660 640 620 600 580 560 540 520 500 -40 -15 10 35 60 85
100
5.1
EFFICIENCY [%]
VREG [ V ]
90
4.9
80
VCC=24V, RT(BRT)=51k
4.7 4.5 -40 -15 10 35 60 85
70
60 0 200 400 600 800 1000 1200
Ta [] Fig.1 VREG Temperature characteristic
100
IDCDC [mA]
Fig.2 VREF Temperature characteristic
90
Ta []
Fig.3
OSC1,OSC2 Temperature re characteristic
1.0 0.9
80
85
VCC=24V, RSET=68k
ILED [ mA ]
VFB [ V ]
VCC=24V, RSET=68k
ILED [ mA ]
60
VCC=24V, RSET=130k
80
0.8 0.7 0.6 0.5
40
20
75
0 0.0 0.5 1.0 1.5 2.0 2.5 3.0
70
-40
-15
10
35
60
85
VLED [V] Fig.4 ILED depending on VLED
-40
-15
10
35
60
85
Ta [] Fig.5 ILED Temperature characteristic
Ta []
Fig.6 VSET Constant electric current
characteristic
1.0
100
10
0.9
VCC=24V
80
8
ILED [ mA ]
VFB [ V ]
VREG [ V ]
0.0 0.5 1.0 1.5 2.0 2.5 3.0
0.8
60 40 20
6
0.7
4
0.6
0
2
0.5 -40 -15 10 35 60 85
VLED [V]
Fig.8 ICC-VCC characteristic
0 0 1 2 3 4 5
Ta [] Fig.7 VLED characteristic
5.0
Temperature
VEN [V]
Fig.9 EN Threshold voltage
1.0
110 100
0.9
4.0
VFB [ V ]
0.8
EFFICIENCY [%]
4.5
VSHORT[ V ]
90 80 70 60
VCC=24V, recommendation external part use for
0.7
3.5
0.6
3.0 -40 -15 10 35 60 85
0.5
Ta []
-40
-15
10
35
60
85
0
200
400
600
800
1000
1200
Ta []
Fig.11 Open detection temperature characteristic
IDCDC [mA]
Fig.10 Short detection temperature characteristic
Fig.12 Efficiency
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2009.04 - Rev.A
BD9202EFS
Functional explanation
Technical Note
VREG The fixed voltage of 5V is generated from VCC. It starts when it becomes EN=H. UVLO (Under Voltage LOCK Out) is built in by VREG, When it is below 2.9V (typ)the internal circuit stops. When it is above 3.0V (typ), the internal circuit operation starts. Please connect Creg=2.2 F to the VREG terminal, as a capacity for phase compensation. In order to make IC heat generation decrease, impressing voltage into the VREG terminal from outside, it is possible to decrease the loss with the regulator inside IC. In this case, as for the impressing voltage, please impress that of above output voltage (5.25V5.5V) of the internal regulator. UVLO (Under Voltage Lock Out) There are UVLO (REG) which detects VREG voltage and UVLO (VCC) which detects VCC voltage in UVLO. When each UVLO is below specified value, the internal circuit is made to stop. (The logic section is reset.)
Detecting circuit UVLO (VREG)
Detection object VREG
Detection Below2.9V(typ)
Cancellation Above 3.0V(typ)
UVLO (VCC) VCC partial pressure input Below1.9V(typ) Above 2.0V(typ) Please do not connect VCC terminal (> 5.25V) to the UVLO terminal (for VCC detection) directly. Because there is a possibility of destruction, please be sure to input with partial pressure. Fixed electric current driver Fixed current value of the fixed electric current driver can be got by constant doubling the standard electric current which is decided by the resistance (RSET) of being connected to ISET and the voltage which are input into the VSET terminal. In addition continual electric current variable (analog modulated light) is possible by changing VSET voltage from outside. In addition, it is possible to do PWM modulated light by the fact that the data is input to the internal register from the serial interface section. It is possible to set the Duty value of PWM for each channel. Setting of fixed current value Fixed current value (DC value) of the LED driver is a relational expression below. ILED=VSET/(RSET[k]+20[k]) x79808 [mA] However, when VSET voltage is above 2V, it reaches the point where it is clamped with 2V inside IC, fixed current value above that does not increase. In addition, please input VSET in the range of 0.6V-2.4V. Characteristic RSET- ILE D
160 140 120 IL ED[m A] 100 80 60
Survey value Calculated value Solid line
(
40 20 0 0
(Marker) (
100
200
300
400 R S E T[k ]
500
600
700
800
VREF normal output
In VREG block, VREF (1.6V (typ.)of reference voltage output is provided. The necessity of doing the voltage impression from outside by the fact that this terminal is connected to the VSET terminal is gone. However, because the voltage variation of VREF is to be reflected on the variation of LED fixed electric current directly, so that please pay attention to it.
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BD9202EFS
Technical Note
Serial interface section This IC is controlled by 4 line serial interfaces of CPUCLK, CPUCS,CPUDI and CPUDO. The data entry format and timing are shown below. In the case of WRITE
CPUCS
tCSS tCYC tCLKH tCSH
CPUCLK
tDIS
1
tDIH
2 A5
3 A4
4 A3
5 A2
6 A1
7
tCLKL
8 *
9 D7
10 D6
11 D5
12 D4
13 D3
14 D2
15 D1
16 D0
CPUDI
W
A0
CPUDO
Hi-Z
In the case of READ
CPUCS
tCSS tCYC tCLKH tCSH
CPUCLK
tDIS
1
tDIH
2 A5
3 A4
4 A3
5 A2
6 A1
7
tCLKL
8 * *
9
10 * D6
11 * D5
12 * D4
13 * D3
14 * D2
15 * D1
16 * D0 Hi-Z
CPUDI
R
A0
tDOD
CPUDO
Hi-Z
D7
It does not correspond to the continual entry of the data. It is necessary to set CPUCS into L in every address. There is no function of the automatic increment of address. Address width is correspondence to 6bit, but please do not access the address other than 00h-11h absolutely. AC electric quality Function CPUCLK Periods CPUCLK high level width CPUCLK low level width CPUDI input set up time CPUDI input hold time CPUCS input set up time CPUCS input hold time CPUDO Output delay time Symbol tCYC tCLKH tCLKL I I S S O Limit Typ Unit
Min 100 35 35 50 50 50 50 -
Max 40
Output load15pF
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7/19
2009.04 - Rev.A
BD9202EFS
Register map
Addres Initial R/W s value 00H 01H 02H 03H 04H 05H 06H 07H 08 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h Register name PWMCNT LEDEN SETPWM1 1 SETPWM 12 SETPWM 21 SETPWM 22 SETPWM 31 SETPWM 32 SETPWM 41 SETPWM 42 SETPWM 51 SETPWM 52 SETPWM 61 SETPWM 62 SETPWM 71 SETPWM 72 SETPWM 81 SETPWM 82 T LED8EN PWM LED1[7] PWM LED2[7] PWM LED3[7] PWM LED4[7] PWM LED5[7] PWM LED6[7] PWM LED7[7] PWM LED8[7] LED7EN PWM LED1[6] PWM LED2[6] PWM LED3[6] PWM LED4[6] PWM LED5[6] PWM LED6[6] PWM LED7[6] PWM LED8[6] LED6EN PWM LED1[5] PWM LED2[5] PWM LED3[5] PWM LED4[5] PWM LED5[5] PWM LED6[5] PWM LED7[5] PWM LED8[5] LED5EN PWM LED1[4] PWM LED2[4] PWM LED3[4] PWM LED4[4] PWM LED5[4] PWM LED6[4] PWM LED7[4] PWM LED8[4] LED4EN PWM LED1[3] PWM LED2[3] PWM LED3[3] PWM LED4[3] PWM LED5[3] PWM LED6[3] PWM LED7[3] PWM LED8[3] LED3EN PWM LED1[2] PWM LED2[2] PWM LED3[2] PWM LED4[2] PWM LED5[2] PWM LED6[2] PWM LED7[2] PWM LED8[2] LED2EN PWM LED1[1] PWM LED1[9] PWM LED2[1] PWM LED2[9] PWM LED3[1] PWM LED3[9] PWM LED4[1] PWM LED4[9] PWM LED5[1] PWM LED5[9] PWM LED6[1] PWM LED6[9] PWM LED7[1] PWM LED7[9] PWM LED8[1] PWM LED8[9] LED1EN PWM LED1[0] PWM LED1[8] PWM LED2[0] PWM LED2[8] PWM LED3[0] PWM LED3[8] PWM LED4[0] PWM LED4[8] PWM LED5[0] PWM LED5[8] PWM LED6[0] PWM LED6[8] PWM LED7[0] PWM LED7[8] PWM LED8[0] PWM LED8[8] Bit7 PWMRS Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 PARADRV Bit PWMEN
Technical Note
Function PWM control
register
LED ON/OFF Control register Register 1 for setting LED1 PWM ( Subordinate bit setting) Register 2 for setting LED1 PWM (Superior bit setting) Register 1 for setting LED2 PWM (Subordinate bit setting) Register 2 for setting LED2 PWM (Superior bit setting) Register 1 for setting LED3 PWM (Subordinate bit setting) Register 2 for setting LED3 PWM (Superior bit setting) Register 1 for setting LED4 PWM (Subordinate bit setting) Register 2 for setting LED4 PWM (Superior bit setting) Register 1 for setting LED5 PWM (Subordinate bit setting) Register 2 for setting LED5 PWM (Superior bit setting) Register 1 for setting LED6 PWM (Subordinate bit setting) Register 2 for setting LED6 PWM (Superior bit setting) Register 1 for setting LED7 PWM (Subordinate bit setting) Register 2 for setting LED7 PWM (Superior bit setting) Register 1 for setting LED8 PWM (Subordinate bit setting) Register 2 for setting LED8 PWM (Superior bit setting)
All registers are reset by each condition below. UVLO(VREG)2.9V(typ.) UVLO(EXT)1.9V(typ.) Thermal shutdown detection (Tj175) Register PWMRST=1( exclude PWMRST itself) ADDR=00h PWMCNT(PWM Control register : Read/Write) Bit 7 6 5 Register PWMRST not_used not_used name Initial value 0 0 0 PWMEN 0 1 PARADRV 0 1
4 not_used 0
3 not_used 0
2 not_used 0
1 PARADRV 0
0 PWMEN 0
PWM mode control disable (Default) PWM mode enable LED output control To control LED1-LED8 independently To control LED1and 2, LED3 and 4, LED5 and 6, LED7 and 8 simultaneously
PWMRST PWM logic reset control 0 Normal Function (Default) 1 Logic reset When it makes PWMRST = ' 1 ', PWM Logic and all registers (the PWMRST register is excluded) is reset. To make normal operation, it is necessary to reset if make PWMRST= ' 0 '. When it makes PARADRV= ' 1 ', because LED1 and LED2 (LED3 and LED4, LED5 andLED6, LED7 and LED8) operate synchronously (following the setting of LED of odd number turn), when you use the output of LED1 and LED2 (LED3and LED4, LED5 and LED6, LED7 and LED8) by short-circuiting, it operates as each heavy-current driver of ILEDMAX=300mA.
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8/19
2009.04 - Rev.A
BD9202EFS
ADDR=01h LEDEN(LED ON/OFF Control register : Read/Write) Bit 7 6 5 Register LED8EN LED7EN LED6EN name Initial value 0 0 0
Technical Note
4 LED5EN 0
3 LED4EN 0
2 LED3EN 0
1 LED2EN 0
0 LED1EN 0
LED1(8)EN 0 1
LED1 (8) output control OFF (Default) Usual ON
When doing PWM modulated light with PWMEN of ADDR=00h, if LED1 of ADDR=01h (8) EN is designated as 1, it becomes regular ON. (LED1 (8) EN takes precedence.) So after that, if LED1 (8) EN is designated as 0, it returns to the PWM modulated light that is set at beginning. ADDR=02h SETPWM11(Register 1 for setting LED1 PWM Subordinate bit setting: Read/Write) Bit 7 6 5 4 3 2 1 0 Register PWMLED1 PWMLED PWMLED1 PWMLED1 PWMLED1 PWMLED1 PWMLED1 PWMLED1 name [7] 1[6] [5] [4] [3] [2] [1] [0] Initial value 0 0 0 0 0 0 0 0 ADDR=03h SETPWM12((Register 2 for setting LED1 PWM (superior bit setting) : Read/Write) Bit 7 6 5 4 3 Register not used not used not used not used not used name Initial value 0 0 0 0 0
2 not used 0
1
0
PWMLED1 PWMLED1 [9] [8]
0 0
It sets Duty of PWM modulated light with the total 10bit of Bit70 of ADDR=02h and Bit1-0 of ADDR=03h. To set the subordinate position 8bit with ADDR=02h and the Superior position 2bit with ADDR=03h. (Chart below)
PWMLED1 [9:0] "0000000000" "0000000001" "0000000010" "0000000011" "1111111100" "1111111101" "1111111110" "1111111111"
LED1 Pulse width Usual `L' (Default) PWMCLK 1 Clock width PWMCLK 2 Clock width PWMCLK 3 Clock width PWMCLK 1020 Clock width PWMCLK 1021 Clock width PWMCLK 1022 Clock width PWMCLK 1023 Clock width
ADDR=04h11h The setting method is similar to LED1 of ADDR=02h,03h is described above with the PWM pulse width setting register of LED28.
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9/19
2009.04 - Rev.A
BD9202EFS
PWM Setting example
PWMCLK(=FBCT) (600kHz)
Technical Note
PWM
PWMEN (resister)
COUNT [9:0] (internal)
0
1
2
3
4
5
6
300
1021 1022 1023
0
PWMLED1 [9:0] = 300d = 12Ch LED1ON (internal) PWMLED2 [9:0] = 6d = 006h LED2ON (internal)
1.71ms586Hz
When count [ 9:0 ] becomes 1, LEDON will become High and then LED lights up. When COUNT [ 9:0 ] reaches to the value that is set by PWM pulse, LEDON will become Low and the light goes out. COUNT [9:0 ] =1 with Illumination timing of each channel becomes being identical. When setting of pwm modulated light is modified, it is reflected being at the point where COUNT [ 9:0 ] is reset to 0 (It is not immediately reflection with register entry) After writing ' 1 ' in PWMEN, the delay of 0 maximum of 1 clocks occurs until LED lights up.
Register setting example of LED illuminations When illuminates LED3 and LED8 regular (100% illumination) (ADDR,DATA)(01h84h) Operation of regular illumination When it does PWM modulated light with 40% to LED3, and 80% to LED8, 1024x40%=409 , 1024x80%=819 Because (409)DEC=(199)HEX , (819)DEC=(333)HEX (ADDR,DATA)(06h99h) (ADDR,DATA)(07h01h) Setting LED3 to 40% (ADDR,DATA)(10h33h) (ADDR,DATA)(11h03h) Setting LED8 to 80% Operation of modulated light (ADDR,DATA)(00h01h) The method connected control wire when plural IC is used
Connected method of the control wire when plural BD9202EFS is controlled with one CPU is shown. You connect CPUCLK and CPUDI in parallel (note the ability of respective drive), CPUCS wires in each BD9202EFS.
CPU
BD9202 No.1
CPUCS
DATA CLK CS1 CS2 CS3
CPUDI CPUCLK
BD9202 No.2
CPUCS CPUDI CPUCLK
BD9202 No.3
CPUCS CPUDI CPUCLK
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10/19
2009.04 - Rev.A
BD9202EFS
Technical Note
Booster DC/DC Controller LED Series Numeric It detects the LED cathode voltage, or the LED voltage, and controls the output voltage to be 0.75 (Typ.). The booster only operates when the LED output is operating. When multiple LED outputs are operating, the LED VF controls the LED output of the highest line to be 0.75V (Typ.). Therefore, the voltages of other LED outputs are higher by the variation of VF. Furthermore, you must be aware that the LED inline numerics have the following limits. At open detection, 85% of the OVP configured voltage becomes the trigger, so the maximum value of output voltage during normal operation is 51V=60x0.85, and 51V/VF>maximum N. Over voltage Protection Circuit OVP Inputs the output voltage to the OVP terminal with resistive divide. The configured value of OVP should be determined by the series numeric of the LED and the VF variance. When determining the OVP configured voltage, the open detection trigger, OVPx0.85 should be considered. The switching operation stops when OVP is detected. Furthermore, if the output voltage falls to 80% of the OVP configuration voltage within the filter time tcp1 determined by CP1, OVP is released. If OVP continues for over tcp1, the error detection flag FAIL1 turns to Low, it latches with the switching operation in the stopped position. When the output voltage side is ROVP1 and the GND side is ROVP2, the OVP detection voltage is: VOVP=(ROVP1+ROVP2)/ROVP2x2.0V When ROVP1=560kand ROVP2=20k, OVP activates when VOUT=58V or more.
Booster DC/DC Converter Oscillation Frequency and LED Driver PWM Standard Frequency By attaching resistance to RT (BRT), it is possible to configure triangular wave oscillation frequency. The RT (BRT) determines the charge and discharge current corresponding to the internal condenser, and the frequency changes. Configure the RT (BRT) resistance by referring to the theoretical formula below. We recommend a range of 30k ~300k. Configurations outside of the frequency range in the chart below can result in stopping switching, and operation cannot be guaranteed.
R T(B R T)-FOSC RT(BRT)-FOSC Characteristics
1200 1000 800 fOS C [kHz] 600 400 200 0 0 100 200 300 R T(BR T)[k ] 400 500 600
Calculated Value (Actual Line)
(
fosc
Measured ( Value (Marker)
3.04 10 4 [kHz] RT (BRT )[ k]
Internal Oscillation Frequency Output Terminal CT_SYNC_OUT and External Synchronous Terminal CT_SYNC_IN The internal oscillation frequency output terminal CT_SYNC_ OUT outputs the internal oscillator's clock configured by the RT terminal. However, there is no output when there is a CLK input in the external synchronous terminal CT_SYNC_IN. The external synchronous terminal CT_SYNC_IN can be the operational frequency of the DC/DC converter by externally inputting CLK. At this time, the external input frequency should be configured to be higher than the internal oscillation frequency. Furthermore, there should be no switching between the external synchronous and internal oscillator during operation.
Soft Start There is no soft start function with this IC. At startup, stand-up occurs with control by the current value configured by OCP (over-current detection). Over-current Protection Circuit (OCP) The current flowing through the coil is changed to voltage by the sense resistance Rcs, and when the CS terminal is over 0.2V (typ), the switching operation is stopped. OCP detection is in pulse-by-pulse format, and is detected at every switching cycle and reset at the next clock. When detection continues longer than the time configured at tCP1, FAIL1=L and it latches with the switching operation in the stopped position. Error Detection Output Function Outputs errors detected by protection circuits to FAIL1 and FAIL2 terminals. FAIL1 or FAIL2 switch to Low after the filter time configured at CP1 or CP2, when they detect OVP or OCP (FAIL1) or LED open/short (FAIL2). (Because FAIL1 terminal is open collector output, it is used with external pull-up.) The filter time for CP1 and CP2 is expressed as:
Tcp1(cp2)
Ccp1 2V 1A
2009.04 - Rev.A
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11/19
BD9202EFS
Protection Functions Protection Function
UVLO (VREG) UVLO (EXT) TSD OVP OCP LED open detection LED short detection
Technical Note
Detection
VREG2.9V UVLO1.9V Tj175 VOVP2.0V & t>tCP1 VCS0.2V & t>tCP1 VLED0.2V & VOVP1.7V VLED4.0V
Release
VREG3.0V UVLO2.0V Tj150 VOVP1.5V VCS0.2V VLED0.2V & VOVP1.6V VLED4.0V
Type
Hysteresis Hysteresis Hysteresis Latch Latch Latch Latch
Logic at detection FAIL1 FAIL2
H H H L L H H H H H H H L L
To clear the latch type, the logic section must be reset.
Protection Function UVLO (VREG) UVLO (EXT) TSD OVP OCP LED open detection LED short detection Operation at protection function detection LOADSW LED Dr ON All CH stop ON All CH stop ON All CH stop OFF (All CH stop) *2 OFF Normal operation ON All CH stop ON All CH stop
*1 *1
DCDC Stop Stop Stop Stop Current limit Stop Stop
Internal logic Reset Reset Reset Normal operation Normal operation Normal operation Normal operation
*1 LED open and short detection is only valid with operating channels, and all CH turn to OFF when 1-ch error is detected. Furthermore, it is only valid in the ON areas during PWM operation. *2 Because the DC/DC converter stops and there is no voltage supply for the LED, the light will be turned off. Selection of External Parts 1. Selection of Coil (L) The value of the coil greatly affects the input ripple current. As presented in formula (1), the larger the coil and the higher the switching frequency, the lower the ripple current.
IL
VCC
IL
(VOUT Vcc) Vcc ] [A (1) L VOUT
When efficiency is expressed as in formula (2), the input peak current is as shown in formula (3).
L IL VOUT
VOUT IOUT (2) Vcc Icc
IL VOUT IOUT IL (3) 2 Vcc 2
CO
ILMAX Icc
If current that is stronger than the coil's fixed current value flows through the coil, there is magnetic saturation in the coil, lowering efficiency. A margin large enough should be considered during selection, so that the peak current does not exceed the coil's fixed current value. To lessen loss from the coil and improve efficiency, coils with low resistance components (DCR and ACR) should be selected. Selection of Output Condenser (Co)
2.
The stability domain of the output voltage and equivalent series resistance necessary to smooth out the ripple voltage should be consideredVCC when choosing a condenser for the output side.
The output ripple voltage is determined by formula (4).
VOUT ILMAX RESR
L IL VOUT
l IOUT 1 ] [V (4) Co
ESR CO
(IL: output ripple current, ESR: equivalent series resistance of Co, : efficiency) The condenser's fixed value should be selected with enough margin for the output voltage.
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12/19
2009.04 - Rev.A
BD9202EFS
3.
Technical Note
Selection of Input Condenser (Cin) The input condenser selected should have low ESR with enough capacity to be compatible large ripple current, in order to prevent large transient voltage. VCC The ripple current IRMS can be derived from formula (5).
Cin
IRMS IOUT
L IL VOUT
(VOUT VCC) VOUT VOUT
] [A (5)
CO
Furthermore, because it relies heavily on the characteristics of the power used for input, the wiring pattern on the substrate and MOSFET gate drain capacity, the usage temperature, load range and MOSFET conditions must be adequately confirmed.
4.
Selection of MOSFET for Load Switch, and its Soft Start Because there are no switches on the route between the VCC and the VO with regular boost applications, in case of an output short circuit the coil or rectification diode may be damaged. To prevent this from happening, a PMOSFET load switch should inserted between the VCC and the coil. PMOSFET with better ability to withstand pressure between gate-source and drain-source than VCC should be selected. To initiate soft start of the load switch, insert capacity between the gate and source. Selection of Switching MOSFET There are no problems as long as the absolute maximum rating of the current rating is L and the pressure threshold and rectification diode of C are at least VF, but in order to actualize high-speed switching, one with small gate capacity (injected charge amount) should be selected. Excess of over current protection configuration recommended Higher efficiency can be gained if one with smaller ON resistance is selected. Selection of Rectification Diode Select a Schottky barrier diode with higher current ability than the current rating of L and higher reverse pressure threshold than the threshold of C, particularly with low forward voltage VF.
5.
6.
Phase Compensation Configuration Method
Stability of Applications Feedback stability conditions for reverse feedback are as follows: Phase-lag of less than 150(phase margin of over 30) when gain is 1 (0dB) Furthermore, DC/DC converter applications have been sampled by the switching frequency, so the GBW of the entire line is configured at less than 1/10 of the switching frequency. To sum up, the characteristics aimed for by applications are as outlined below: Phase-lag less than 150(phase margin over 30) when gain is 1 (0dB) The GBW (frequency of gain 0dB) at that time is less than 1/10 of switching frequency Therefore, to improve the response with GBW limitations, it is necessary to make the switching frequency higher. The trick to secure stability by phase compensation is to cancel out the second phase lag (-180) generated by LC resonance with two phase leads (insert two phase leads). Phase leads are by the output condenser's ESR component or the error amp output Comp terminal's CR. With DC/DC converter applications, there is always a LC resonance circuit at the output, so the phase lag at that section is 180. If the output condenser has large ESR (several ), such as an aluminum electrolysis condenser, a phase lead of +90is generated, and the phase lag is -90. When using an output condenser with low ESR such as a ceramic condenser, insert R for the ESR component.
VCC VCC
fr
VOUT
1 2 LCO
[ Hz ]
fr
VOUT
1 2 LCO
[ Hz ] -180
Resonance
point
CO
Resonance point phase lag -180
RESR
CO
fESR
1 [ Hz Phase lead ] 2RESRCo Phase lag -90
With the changes in phase characteristics by caused by ESR, the number of phase leads to be inserted is one. The frequency configuration to insert phase lead should ideally be configured close to the LC resonance frequency in order to cancel LC resonance. This configuration is for simplicity, and no detailed calculations have been carried out, so there are times when adjustments on the actual product are necessary. These characteristics change depending on substrate layout and load conditions, so ample confirmation is necessary during design for mass production.
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13/19
2009.04 - Rev.A
BD9202EFS
Electricity Consumption Calculations Pc(N)=ICC*VCC+2*Ciss*VREG*Fsw*Vcc*[VLED*N+Vf*(N-1)]*ILED ICC VCC Ciss Vsw Fsw Rload Iload VLED N Vf ILED Maximum circuit current Power voltage External FET capacity SW gate voltage SW frequency LOAD SW ON resistance LOAD SW maximum inflowing current LED control voltage LED parallel numeric LED Vf variance LED output current
Technical Note
Sample calculation When Pc(8)=21mAx30V+500pFx5Vx600kHzx30V+[0.95Vx8+Vfx7] x75mA Vf=1.2V (about 0.1V each), Pc(8)=0.63W+0.045W+1.2W =1.875W Because this IC has a built-in driver circuit, there is a considerable amount of heat generated. Careful consideration is necessary for substrate and heat dissipation design. PCB Board Circuit Diagram
RVCC300
VCC
14
CVCC=10uF RVULO1 91k
1
LED1 PGND2 LED2 CP1 CP2 FAIL1 FAIL2 AGND CPUDI CPUDO CPUVDD CPUCLK CPUCS VCC VREG VREF ISET VSET TEST LED3 PGND3 LED4
LED8 PGND5 LED7 EN TOUT2 COMP BCT_SYNC_IN
44
RUVLO2 =10k
2
43
1 2 3 4
RE-H42TD-1130
GND
J4
CT_SYNC_IN
J3
37 38
BCT_SYNC_IN
3
42
4
41 40
CPUVDD
RFL1=5.1k RFL2=5.1k
CP1=27pF
5
CP2=27pF
6 39
RPC=300 CPC1uF
7
38
BD9202EFS
8
CT_SYNC_IN BCT_SYNC_OUT CT_SYNC_OUT UVLO LOSDSW PGND1 SWOUT OVP CS RT BRT TOUT1 LED6 PGND4 LED5
37
RLD1 =5.1k RLD2 =5.1k Q1 CLD L1 47uH D1
LED2 3 LED1 1 LED8 44 LED7 42
9
36
10
35
11
34
12
33
13
32
RESR CVOUT =220uF Q2 RLPF=100
ROVP1= 560k
14
31
15
30
LED6 25
ROVP2 =20k
CREG=2.2uF
16 29
LED5 23 LED3 20 LED4 22
17
28
RCT=51k RBCT=51k
RSET=68k
18 27
CLPF =1000pF
RCS=51m
1 2 3 4 5 6 7 8 9 10 11 12
12FDZ-BT
CPUVDD 11 CPUDCLK 12 CPUDO CPUCS PGND1 CPUDI EN 10 13 32 9 41
1 2 3 4 5 6 7 8
08FDZ-ST (1)
J2 J1
VREF VSET
16 18
CSGND
J5
19 20 26 25
BCT_SYNC_IN
38
21
24
BCT_SYNC_OUT 36 CT_SYNC_IN 37 35
22
23
CT_SYNC_OUT
1 2 3 4 5 6 7 8
08FDZ-ST (2)

The CVCC and CREG decoupling condensers should be placed as close as possible to the IC pin. Because high current can flow through CSGND and PGND1~4, they should all be wired independently with low impedance. Do not apply noise to 17-pin ISET, 18-pinVSET, 27-pin BRT, 28-pin RT and 39-pin COMP. 1-pin LED, 3-pin LED2, 20-pin LED3, 22-pin LED4, 23-pin LED5, 25-pin LED6, 31-pin SWOUT, 35-pin CT_CYNC_OUT, 36-pin BCT_SYNC_OUT, 42-pin LED7 and 44-pin LED8 switch, so make sure they do not affect the surrounding pattern. The thick-lined areas should be laid out as short as possible with broad pattern. During normal use, the jumper configurations are J1J4=Short and J5=open.
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14/19
2009.04 - Rev.A
BD9202EFS
External Parts for PCB Board
Name Connector Type For SPI/IF For LED Board I/F For Power Supply Ceramic 27pF 1000pF 10uF 2.2uF 1uF Tantal Resistance 220uF 5.1k 51m 100 300 10k 20k 51k 68k 91k 560k PMOS NMOS Indactance Diode 47uH Parts Number 22 05 2081 22 05 2121 22 01 2045 GRM1882C1H270JA01 GRM15XB11H102KA86 GRM55D31106KA87 GRM188R71A225KE15 GRM188R71A105KA61 UVR5A221MPD MCR03Series5101 MCR10SeriesR051 MCR03Series1000 MCR03Series3000 MCR03Series1002 MCR03Series2002 MCR03Series5102 MCR03Series6802 MCR03Series9102 MCR03Series5603 RSS090P03FU6TB TPC8213-H C12-K7.5L EJ RB160L-60TE25 Connecting Point CSS CP1 , CP2 CLPF CVCC CREG CPC CLD CVOUT RLD1 , RLD2 , RFL1 , RFL2 RESR RCS RLPF RPC , RVCC RUVLO2 ROVP2 RCT , RBCT RSET RUVLO1 ROVP1 Q1 Q2 L1 D1 Size 1005 1608 1005 5750 1608 1608 3225 1608 3216 2012 1608 1608 1608 1608 1608 1608 1608 1608 Maker Molex Molex Molex murata murata murata murata murata murata murata Rubicon ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM TOSHIBA Mitsumi ROHM
Technical Note
Pieces/Board 2 1 1 1 2 1 1 1 1 1 1 4 1 1 1 1 1 1 2 1 1 1 1 1 1 1
The values above are fixed, and have been verified for operation at VCC=24V, LED12-series 8-parallel and ILED=150mA. Therefore, the optimal values can vary depending on usage conditions, so fixed values should be determined with careful consideration.
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15/19
2009.04 - Rev.A
BD9202EFS
In/Output Equivalent Circuit 1
Technical Note
1.LED1 , 3.LED2 , 20.LED3 , 22.LED4 , 23.LED5 , 25.LED6 , 42.LED7 , 44.LED8
4.CP1 , 5.CP2
VREG
6.FAIL1 , 7.FAIL2
50
LED18
100k
OVP
100
3k
7V
5k
9.CPUDI ,12.CPUCLK , 13.CPUCS
CPUVDD CPUVDD
10.CPUDO
CPUVDD CPUVDD
15.VREG
CL7V
CPUDO
VREG 765k 252k
150k
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16/19
2009.04 - Rev.A
BD9202EFS
In/Output Equivalent Circuit 2 16.VREF
VREG CL7V
CL7V
Technical Note
17.ISET
CL7V
18.VSET
VREF
ISET
500
VSET
500
800k
19.TEST
CL7V
26.TOUT1 , 35.CT_SYNC_OUT , 36.BCT_SYNC_OUT
VREG VREG
27.BRT , 28. RT
CL7V
TEST
30k
RT
167
20k
29.CS
CL7V
30.OVP, 34.UVLO
CL7V VREG
31.SWOUT
VREG
CS
OVP
1k
100
SWOUT
5k
100k
5P
5k
33.LOADSW
37.CT_SYNC_IN , 38.BCT_SYNC_IN
39.COMP
CL7V VREG
VREG LOADSW
VREG
10k
COMP 2k
40.TOUT2
VREG
EN
41.EN
VCC
CL7V
CL7V
TOUT2
2k
172k
10k 7V
50
135k
100k
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17/19
2009.04 - Rev.A
BD9202EFS
Usage Notes
1.) Absolute Maximum Ratings
Technical Note
Although the quality of this product has been tightly controlled, deterioration or even destruction may occur if the absolute maximum ratings, such as for applied pressure and operational temperature range, are exceeded. mode destruction conditions. such as fuses should be considered. 2.) Reverse Connection of Power Supply Connector The IC can destruct from reverse connection of the power supply connector. 3.) Power Supply Line Because there is a return of current regenerated by back EMF of the external coil, the capacity value should be determined after confirming that there are no problems with characteristics such as capacity loss at low temperatures with electrolysis condensers, for example by placing a condenser between the power supply and GND as a route for the regenerated current. 4.) GND Potential The potential of the GND pin should be at the minimum potential during all operation status 5.) Heat Design Heat design should consider power dissipation (Pd) during actual use and margins should be set with plenty of room. 6.) Short-circuiting Between Terminals and Incorrect Mounting When attaching to the printed substrate, pay special attention to the direction and proper placement of the IC. incorrectly, it may be destroyed. Destruction can also occur when there is a short, which can be caused by foreign objects entering between outputs or an output and the power GND. 7.) Operation in Strong Magnetic Fields Exercise caution when operating in strong magnet fields, as errors can occur. 8.) ASO When using this IC, it should be configured so that the output Tr should not exceed absolute maximum ratings and ASO. With CMOS ICs and ICs that have multiple power sources, there is a chance of rush current flowing momentarily, so exercise caution with power supply coupling capacity, power supply and width of GND pattern wiring and its layout. 9.) Heat Interruption Circuit This IC has a built-in Temperature Protection Circuit (TSD circuit). The temperature protection circuit (TSD circuit) is only to cut off the IC from thermal runaway, and has not been designed to protect or guarantee the IC. Therefore, the user should not plan to activate this circuit with continued operation in mind. 10.) Inspection of Set Substrates If a condenser is connected to a pin with low impedance when inspecting the set substrate, stress may be placed on the IC, so there should be a discharge after each process. Furthermore, when connecting a jig for the inspection process, the power must first be turned OFF before connection and inspection, and turned OFF again before removal. 11.) IC Terminal Input This IC is a monolithic IC, and between each element there is a P+ isolation and P substrate for element separation. There is a P-N junction formed between this P-layer and each element's N-layer, which makes up various parasitic elements. For example, when resistance and transistor are connected with a terminal as in figure 15: When GND>(terminal A) at the resistance, or GND>(terminal B) at the transistor (NPN), the P-N junction operates as a parasitic diode. Also, when GND>(terminal B) at the transistor, a parasitic NPN transistor operates by the N-layer of other elements close to the aforementioned parasitic diode. With the IC's configuration, the production of parasitic elements by the relationships of the electrical potentials is inevitable. The operation of the parasitic elements can also interfere with the circuit operation, leading to malfunction and even destruction. Therefore, uses that cause the parasitic elements to operate, such as applying voltage to the input terminal that is lower than the GND (P-substrate), should be avoided. If the IC is attached Precautions, such as inserting a diode between the external power supply and IC power terminal, should be taken as protection against reverse connection destruction. Furthermore, we are unable to assume short or open If special modes, which exceed the absolute maximum ratings, are expected, physical safely precautions
Resistance (Terminal A)
Transistor (NPN)
(Terminal B) C

B
E GND
N N P board N
Parasitic Element
P N
P
P N GND
Parasitic Element
P board
GND
Parasitic Element Fig.32 Simple Structure of Bipolar IC
12.)
Earth Wiring Pattern
Where there are both a small signal GND and a large current GND, it is recommended that large current GND pattern and small signal GND pattern are separated, and that there is an earth at the set's control point so that the pattern wiring's resistance and voltage change from the large current doesn't change the small signal GND's voltage. Ensure that the GND wiring patterns for external parts do not fluctuate.
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18/19
2009.04 - Rev.A

P
P
P
N
(Terminal A)
BD9202EFS
Selecting a Model Name When Ordering
Technical Note
B
D
9
2
0
2
E
F
S
-
E
2
ROHM model name
Part number
Package type EFS = HTSSOP
Taping type E2 = Reel-wound embossed taping
HTSSOP-A44

18.50.1
(MAX 18.85 include BURR)

Tape Quantity
23
Embossed carrier tape 1500pcs E2
(The direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand)
(6.0)
44
4 +6 -4
0.85
1
1PIN MARK
22
0.17 +0.05 -0.03
S
1.0MAX 0.850.05 0.080.05
0.50.15 1.00.2
9.50.2 7.50.1
(5.0)
Direction of feed
1234
1234
1234
1234
1234
1234
1234
1234
0.08 S 0.8 0.37 +0.05 -0.04 0.08 M
Reel
1pin
Direction of feed
(Unit:mm)
When you order , please order in times the amount of package quantity.
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19/19
2009.04 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
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