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NX9548
9A SINGLE CHANNEL MOBILE PWM SWITCHING REGULATOR
PRELIMINARY DATA SHEET Pb Free Product
DESCRIPTION
The NX9548 is buck switching converter in multi chip module designed for step down DC to DC converter in portable applications. It is optimized to convert single supply up to 24V bus voltage to as low as 0.75V output voltage.The output current can be up to 9A. It can be selected to operate in synchronous mode or non-synchronous mode to improve the efficiency at light load. Constant on time control provides fast response, good line regulation and nearly constant frequency under wide voltage input range. Over current protection and FB UVLO followed by latch feature. Other features includes: internal boost schottky diode, 5V gate drive capability, power good indicator, over current protection, over voltage protection and adaptive dead band control.NX9548 is available in 5x5 MCM package.
FEATURES
n Internal Boost Schottky Diode n Ultrasonic mode operation available n Bus voltage operation from 4.5V to 24V n Less than 1uA shutdown current with Enable low n Excellent dynamic response with constant on time control n Selectable between Synchronous CCM mode and diode emulation mode to improve efficiency at light load n Programmable switching frequency n Current limit and FB UVLO with latch off n Over voltage protection with latch off n n n n
APPLICATIONS
UMPC, Notebook PCs and Desknotes Tablet PCs/Slates On board DC to DC such as 12V to 3.3V, 2.5V or 1.8V Hand-held portable instruments
TYPICAL APPLICATION
PGOOD 100k D1 5V 10 1u 1u PVCC VCC BST 4.7 1u S1 D2 3.3uH Vout 1.5V/9A 2x10uF PGOOD 1M TON 1n VIN 8V~22V
NX9 5 4 8
2R5TPE330MC 330uF 10k
ENSW /MODE
OCP
HG HDRV GND
VOUT 330p FB 7.5k S2 7.5k
Figure 1 - Typical application of 9548
ORDERING INFORMATION
Device NX9548CMTR Temperature 0 to 70oC Package 5X5 MCM-32L Pb-Free Yes
Rev.1.6 03/06/09
1
NX9548
ABSOLUTE MAXIMUM RATINGS
VCC,PVCC to GND & BST to SW voltage ........... -0.3V to 6.5V TON to GND ................................................. .... -0.3V to 28V HDRV to SW Voltage ....................................... -0.3V to 6.5V D1 to S1and D2 to S2 ........................................ 30V All other pins .................................................... -0.3V to VCC+0.3V or 6.5V Storage Temperature Range ............................... -65oC to 150oC Operating Junction Temperature Range ............... -40oC to 125oC ESD Susceptibility ........................................... 2kV Power Dissipation ............................................. TBD Output Current ...................................................TBD CAUTION: Stresses above those listed in "ABSOLUTE MAXIMUM RATINGS", may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
PACKAGE INFORMATION
32-LEAD PLASTIC MCM 5 x 5
PGOOD
GND
D1
D1
32 31 30 29 28 27 26 25 S1 S1 S1 D1 D2 D2 D2 D2 1 2 3 4 5 6 7 8 9 S2 10 11 12 13 14 15 16 S2 PVCC OCP S2 S2 S2 S2 D2 (PAD3) D1 (PAD2) GND (PAD1) 24 TON 23 VOUT 22 ENSW/MODE 21 GND 20 BST 19 D2 18 HDRV
FB
VCC 17 NC
HG
D1
Rev.1.6 03/06/09
2
NX9548
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Vcc = 5V, VIN = 12V and TA= 0 to 70oC. Typical values refer to TA = 25oC. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature.
PARAMETER VIN recommended voltage range Shut down current VCC,PVCC Supply Input voltage range Operating quiescent current Shut down current VCC UVLO Under-voltage Lockout threshold Falling VCC threshold ON and OFF time TON operating current ON -time Minimum off time FB voltage Internal FB voltage Input bias current Line regulation OUTPUT voltage Output range VOUT shut down discharge resistance Soft start time PGOOD PGOOD high rising threshold PGOOD delay after softstart PGOOD propagation delay filter PGOOD hysteresis PGOOD output switch impedance PGOOD leakage current ENSW/MODE threshold and bias current PFM/Non Synchronous Mode Ultrasonic Mode Synchronous Mode Shutdown mode Input bias current
Rev.1.6 03/06/09
SYM
Test Condition
Min 4.5
TYP
MAX 24
Units V uA
ENSW=GND Vin FB=0.85V, ENSW =5V ENSW=GND VCC_UVLO 4.5
1 5.5 1.8 1
V mA uA
4.1 3.9 VIN=15V, Rton=1Mohm VIN=9V,VOUT=0.75V,Rton= 1Mohm 15 390 590 0.75 VCC from 4.5V to 5.5V -1 0.75 ENSW/MODE=GND 30 1.5 90 1.6 2 5 13 1 200 1 3.3
V V uA ns ns V nA % V ohm ms % Vref ms us % ohm uA
Vref
NOTE1 NOTE1
80% VCC 60% VCC Leave it open or use limits in spec ENSW/MODE=VCC ENSW/MODE=GND 2 0 5 -5
VCC+0 .3V 80% VCC 60% VCC 0.8
V V V V uA uA
3
NX9548
PARAMETER SW zero cross comparator Offset voltage Current Limit Ocset setting current Over temperature Threshold Hysteresis Under voltage FB threshold Over voltage Over voltage tripp point Internal Schottky Diode Forward voltage drop Ouput Stage High Side MOSFET RDSON Low Side MOSFET R DSON Output Current 5 24 NOTE1 155 15 70 125 forward current=50mA 500 20 17 9 mV uA
o o
SYM
Test Condition
Min
TYP
MAX
Units
C C
%Vref %Vref mV mohm mohm A
NOTE1: This parameter is guaranteed by design but not tested in production(GBNT).
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NX9548
PIN DESCRIPTIONS
PIN # 1-3 4,30-32 PAD2 5-8,19, PAD3 9-14 15 16 PIN SYMBOL PIN DESCRIPTION S1 Source of high side MOSFET.These pins must be connected directly to the drain of low side MOSFET via a plane connection. D1 D2 S2 PVCC OCP Drain of high side MOSFET. Drain of low side MOSFET and the controller pin out SW. Source of low side MOSFET and need to be directly connected to power ground via multiple vias. This pin provides the voltage supply to the lower MOSFET drivers. Place a high frequency decoupling capacitor 1uF X5R from this pin to GND. This pin is connected to the drain of the external low side MOSFET via resistor and is the input of the over current protection(OCP) comparator. An internal current source is flown from this pin to the external resistor which sets the OCP voltage across the Rdson of the low side MOSFET. Current limit point is this voltage divided by the Rdson. Once this threshold is reached the chip is latched out. Not used. High side gate driver output which needs to be connected to high side MOSFET gate HG pin. A small value resistor may be placed between two pins to slow down the high side MOSFET, reducing the ringing on SW nodes. This pin supplies voltage to high side FET driver. A minimum high freq 0.47uF ceramic capacitor is placed as close as possible to and connected to this pin and respected pin 19.A 4.7ohm resister is recommended in series with this capacitor. Switching converter enable input. Connect to VCC for PFM/Non synchronous mode, connected to an external resistor divider equals to 70%VCC for ultrasonic, connected to GND for shutdown mode, floating or connected to 2V for the synchronous mode. This pin is directly connected to the output of the switching regulator and senses the VOUT voltage. An internal MOSFET discharges the output during turn off. VIN sensing input. A resistor connects from this pin to VIN will set the frequency. A 1nF capacitor from this pin to GND is recommended to ensure the proper operation. This pin supplies the internal 5V bias circuit. A 1uF X7R ceramic capacitor is placed as close as possible to this pin and ground pin. This pin is the error amplifiers inverting input. This pin is connected via resistor divider to the output of the switching regulator to set the output DC voltage from 0.75V to 3.3V. PGOOD indicator for switching regulator. It requires a pull up resistor to Vcc or lower voltage. When FB pin reaches 90% of the reference voltage PGOOD transitions from LO to HI state. Ground pin. High side MOSFET gate. 5
17 18
NC HDRV
20
BST
22
ENSW/ MODE
23 24 25 26
VOUT TON VCC FB
27
PGOOD
21,28 PAD1 29
Rev.1.6 03/06/09
GND HG
NX9548
BLOCK DIAGRAM
BST HDRV HG D1
VCC Bias 4.3/4.1 Disable_B Thermal shutdown ON time pulse genearation R S Q POR
TON VOUT
start HD
ODB FET Driver HD_IN S1 D2
FB
OCP_COMP
Mini offtime 400ns S2 POR FBUVLO_latch
VREF=0.75V start soft start VCC ENSW /MODE 1M 1M MODE SELECTION Disable PFM_nonultrasonic Sync FB 1.25*Vref/0.7VREF OCP_COMP Diode emulation HD
PVCC
OCP
OVP
GND FB FBUVLO_latch 0.7*Vref VOUT start 0.9*Vref VOUT
SS_finished PGOOD
Figure 2 - Simplified block diagram of the NX9548
Rev.1.6 03/06/09
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NX9548
Demoboard design and waveforms
sdfd
PGOOD R6 10k
27 PGOOD
TON
24 C3 1n
R1 1M
D1 5V R5 10 C6 1u C7 1u 15 PVCC BST
4,30-32,PAD2 C1 2 x 4.7uF,25V,X5R 20 R6 4.7 C4 1u
VIN 8V~22V C2 10uF,25V,X5R
25 VCC
NX9548
S1 1-3 5-8,19,PAD3 D2
DO5010H-332MLD L1 3.3uH
Vout 1.5V/9A 2R5TPE330MC C5 330uF
ENSW 22 /MODE
OCP 16
R2 10k
29 18
HG HDRV
VOUT
23 C8 330p R3 7.5k R4 7.5k
FB 26
GND S2 9-14 21,28,PAD1
Figure 3 - Demoboard schematic of NX9548
Rev.1.6 03/06/09
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NX9548
Bill of Materials
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 Quantity 2 1 1 3 1 1 1 2 2 1 1 1 1 Reference C1 C2 C3 C4,C6,C7 C5 C8 R1 R2,R6 R3,R4 R5 R6 L1 U1 Part 4.7uF,25V,X5R 10uF,25V,X5R 1nF,50V,X7R 1uF,10V,X7R 2R5TPE330MC 330pF 1MEG 10k 7.5k 10 4.7 DO5010H-332MLD NX9548 Manufacturer
SANYO
COILCRAFT NEXSEM INC.
Rev.1.6 03/06/09
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NX9548
Demoboard Waveforms
Fig.4 Startup when 5V is present and 12V bus is started up, output load current is at 1.5A.
Fig.5 Startup when 12V bus is present and 5V is started up.
Fig.6 Shutdown when 12V bus is present and 5V is shuted down.
Fig.7Output ripple (VIN=15V IOUT=1.2A)
Fig.8 5A step response(VIN=5V)
Rev.1.6 03/06/09
Fig.9 5A step response(VIN=20V) 9
NX9548
Demoboard Waveforms(Cont')
VIN=12V, VOUT=1.5V
92.00% 90.00% 88.00% EFFICIENCY 86.00% 84.00% 82.00% 80.00% 78.00% 10 100 1000 10000 OUTPUT CURRENT(mA)
Fig.10 Output efficiency at different load
IOUT=10A, VOUT=1.5V
79.00%
78.60% EFFICIENCY
78.20%
77.80%
77.40%
77.00% 0 5 10 VIN(V) 15 20 25
Fig.11 Output efficiency at different VIN bus voltage
Rev.1.6 03/06/09
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NX9548
APPLICATION INFORMATION
Symbol Used In Application Information:
VIN VOUT IOUT FS - Input voltage - Output voltage - Output current - Working frequency is around 220kHz.
Output Inductor Selection
The value of inductor is decided by inductor ripple current and working frequency. Larger inductor value normally means smaller ripple current. However if the inductance is chosen too large, it brings slow response and lower efficiency. The ripple current is a design freedom which can be decided by design engineer according to various application requirements. The inductor value can be calculated by using the following equations:
DVRIPPLE - Output voltage ripple DIRIPPLE - Inductor current ripple
Design Example
The following is typical application for NX9548, the schematic is figure 1. VIN = 8 to 22V VOUT=1.5V FS=220kHz IOUT=9A DVRIPPLE <=60mV DVDROOP<=60mV @ 3A step
LOUT =
( VIN -VOUT ) x TON
IRIPPLE
...(3)
IRIPPLE =k x IOUTPUT
where k is percentage of output current. In this example, inductor from COILCRAFT DO5010H-332 with L=3.3uH is chosen. Current Ripple is recalculated as below: IRIPPLE = = (VIN -VOUT ) x TON L OUT ...(4)
On_Time and Frequency Calculation
The constant on time control technique used in NX9548 delivers high efficiency, excellent transient dynamic response, make it a good candidate for step down notebook applications. An internal one shot timer turns on the high side driver with an on time which is proportional to the input supply VIN as well inversely proportional to the output voltage VOUT. During this time, the output inductor charges the output cap increasing the output voltage by the amount equal to the output ripple. Once the timer turns off, the Hdrv turns off and cause the output voltage to decrease until reaching the internal FB voltage of 0.75V on the PFM comparator. At this point the comparator trips causing the cycle to repeat itself. A minimum off time of 400nS is internally set. The equation setting the On Time is as follows:
TON = 4.45 x 10 -12 x R TON x VOUT VIN - 0.5V
(22V-1.5V) x 310nS 3.3uH =1.925A
Output Capacitor Selection
Output capacitor is basically decided by the amount of the output voltage ripple allowed during steady state(DC) load condition as well as specification for the load transient. The optimum design may require a couple of iterations to satisfy both conditions. Based on DC Load Condition The amount of voltage ripple during the DC load condition is determined by equation(5).
VRIPPLE = ESR x IRIPPLE +
IRIPPLE ...(5) 8 x FS x COUT
Where ESR is the output capacitors' equivalent ...(1) series resistance,COUT is the value of output capacitors. Typically POSCAP is recommended to use in ...(2) NX9548's applications. The amount of the output voltage ripple is dominated by the first term in equation(5) and the second term can be neglected. For this example, one POSCAP 2R5TPE330MC 11
VOUT FS = VIN x TON
In this application example, the RTON is chosen to be 1Mohm, when VIN=22V, the TON is 310nS and FS
Rev.1.6 03/06/09
NX9548
is chosen as output capacitor, the ESR and inductor current typically determines the output voltage ripple. When VIN reach maximum voltage, the output voltage ripple is in the worst case. in parallel. The above equation shows that if the selected output inductor is smaller than the critical inductance, the voltage droop or overshoot is only dependent on the ESR of output capacitor. For low frequency capacitor such ...(6) as electrolytic capacitor, the product of ESR and capacitance is high and L L crit is true. In that case, the transient spec is mostly like to dependent on the ESR of capacitor. Most case, the output capacitor is multiple capacitor in parallel. The number of capacitor can be calculated by the following
N= ESR E x Istep Vtran + VOUT x 2 2 x L x C E x Vtran
ESRdesire =
VRIPPLE 30mV = = 15.5m IRIPPLE 1.925A
If low ESR is required, for most applications, multiple capacitors in parallel are needed. The number of output capacitor can be calculate as the following:
E S R E x IR I P P L E N= VR IPPLE
12mx1.925A N= 30mV
...(7)
...(11)
N =0.77 The number of capacitor has to be round up to a integer. Choose N =1. Based On Transient Requirement Typically, the output voltage droop during transient is specified as V droop < V tran @step load DISTEP During the transient, the voltage droop during the transient is composed of two sections. One section is dependent on the ESR of capacitor, the other section is a function of the inductor, output capacitance as well as input, output voltage. For example, for the overshoot when load from high load to light load with a DISTEP transient load, if assuming the bandwidth of system is high enough, the overshoot can be estimated as the following equation. where
0 if L L crit = L x Istep - ESR E x CE V OUT
if
L L crit
...(12)
For example, assume voltage droop during transient is 60mV for 3A load step. If one POSCAP 2R5TPE330MC(330uF, 12mohm ESR) is used, the crticial inductance is given as
Lcrit =
ESRE x CE x VOUT = Istep
12mx 3300F x1.8V = 23.76H 3A
The selected inductor is 3.3uH which is smaller than critical inductance. In that case, the output voltage transient mainly dependent on the ESR. number of capacitor is
Vovershoot = ESR x Istep +
VOUT x 2 2 x L x COUT
...(8)
where is the a function of capacitor,etc.
0 if L L crit = L x Istep - ESR x COUT V OUT
where
L crit =
N=
...(9
ESR E x Istep Vtran
if
L L crit
12m x 4.5A 60mV = 0.9 =
Choose N=1. Based On Stability Requirement ESR of the output capacitor can not be chosen too low which will cause system unstable. The zero caused 12
ESR x COUT x VOUT ESR E x C E x VOUT = ...(10) Istep Istep
where ESRE and CE represents ESR and capacitance of each capacitor if multiple capacitors are used
Rev.1.6 03/06/09
NX9548
by output capacitor's ESR must satisfy the requirement as below:
Vout
F 1 SW ...(13) 2 x x ESR x COUT 4
FESR =
R2 Fb R1 Vref
Besides that, ESR has to be bigger enough so that the output voltage ripple can provide enough voltage ramp to error amplifier through FB pin. If ESR is too small, the error amplifier can not correctly dectect the ramp, high side MOSFET will be only turned off for minimum time 400nS. Double pulsing and bigger output ripple will be observed. In summary, the ESR of output capacitor has to be big enough to make the system stable, but also has to be small enough to satify the transient and DC ripple requirements.
Figure 12 - Voltage Divider
R 1=
R 2 x VR E F V O U T -V R E F
...(15)
where R2 is part of the compensator, and the value
Input Capacitor Selection
Input capacitors are usually a mix of high frequency ceramic capacitors and bulk capacitors. Ceramic capacitors bypass the high frequency noise, and bulk capacitors supply switching current to the MOSFETs. Usually 1uF ceramic capacitor is chosen to decouple the high frequency noise.The bulk input capacitors are decided by voltage rating and RMS current rating. The RMS current in the input capacitors can be calculated as:
IRMS = IOUT x D x 1- D D = TON x FS
of R1 value can be set by voltage divider.
Mode Selection
NX9548 can be operated in PFM mode, ultrasonic PFM mode, CCM mode and shutdown mode by applying different voltage on ENSW/MODE pin. When VCC applied to ENSW/MODE pin, NX9548 is In PFM mode. The low side MOSFET emulates the function of diode when discontinuous continuous mode happens, often in light load condition. During that time, the inductor current crosses the zero ampere border and becomes negative current. When the inductor current reaches negative territory, the low side MOSFET is turned off and it takes longer time for the output voltage to drop, the high side MOSFET waits longer to be turned on. At the same time, no matter light load and heavy load, the on time of high side MOSFET keeps the same. Therefore the lightier load, the lower the switching frequency will be. In ultrosonic PFM mode, the lowest frequency is set to be 25kHz to avoid audio frequency modulation. This kind of reduction of frequency keeps the system running at light light with high efficiency. In CCM mode, inductor current zero-crossing sensing is disabled, low side MOSFET keeps on even when inductor current becomes negative. In this way the effibut frequency will be kept constant.
...(14)
When VIN = 22V, VOUT=1.5V, IOUT=9A, the result of input RMS current is 2.3A. For higher efficiency, low ESR capacitors are recommended. One 10uF/X5R/25V and two 4.7uF/X5R /25V ceramic capacitors are chosen as input capacitors.
Output Voltage Calculation
Output voltage is set by reference voltage and external voltage divider. The reference voltage is fixed at 0.75V. The divider consists of two ratioed resistors so that the output voltage applied at the Fb pin is 0.75V when the output voltage is at the desired value. The following equation applies to figure 12, which shows the relationship between age divider.
VOUT , VREF and volt- ciency is lower compared with PFM mode at light load,
Rev.1.6 03/06/09
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NX9548
Over Current Protection
Over current protection for NX9548 is achieved by sensing current through the low side MOSFET. An typical internal current source of 24uA flows through an external resistor connected from OCSET pin to SW node sets the over current protection threshold. When synchronous FET is on, the voltage at node SW is given as reset VCC or EN is necessary.
Under Output Voltage Protection
Typically when the FB pin voltage is under 70% of VREF, the high side and low side MOSFET will be turned off. To resume the switching operation, VCC or ENSW has to be reset.
VSW =-IL x RDSON
The voltage at pin OCSET is given as
IOCP x ROCP +VSW
When the voltage is below zero, the over current occurs as shown in figure below.
vbus I OCP 24uA OCP R OCP OCP comparator SW
Figure 13 - Over Voltage Protection The over current limit can be set by the following equation.
ISET = IOCP x ROCP /RDSON
The low side MOSFET RDSON is 24m at the OCP occuring moment, and the current limit is set at 10A, then
ROCP = ISET x RDSON 10A x 24m = = 10k IOCP 24uA
Choose ROCP=10k
Power Good Output
Power good output is open drain output, a pull up resistor is needed. Typically when softstart is finised and FB pin voltage is over 90% of VREF, the PGOOD pin is pulled to high after a 1.6ms delay.
Over Output Voltage Protection
Typically when the FB pin voltage is over 125% of VREF, the high side MOSFET will be turned off and the low side MOSFET will be latched to be on to discharge the output voltage. To resume the switching operation,
Rev.1.6 03/06/09
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NX9548
Demoboard Schematic
R18 7.5k
R16 7.5k C19 330p R3 1M C10 1n PGOOD GND1 FB VOUT VBUS
5V
22
26
23
21
17
EN
NC
TON
24
29
HG
PGOOD PVCC
27 15 5V
R17 100k 5V
18 20 R8 4.7 28 G C11 0.1u 19 VSW R7 6k D1 30 VBUS VIN 31 32 16
HDRV BST GND2 VCC GND(PAD1) C2 1u D2-5 OCP S2-5 D1(PAD2) D1-1 D1-2 D1-3 D2(PAD3) S2-4 S2-3 S2-2 S2-1
U1
25
R5 10
C17 1u
NX9548 MLPQ32
S2-6
14 13 12 11 10 9
D1-4
D2-1
D2-2
D2-3 7
1
2
3
4
5
6
8
D2-4
S1-1
S1-2
S1-3
D2
VSW
2
L2 1 DO5010H-332HC
VOUT
VOUT
R13 10 CIN1 CIN2 CIN3 10u/25V 4.7u/25V 4.7u/25V C24 470p
CO1 2R5TPE330MC
CO2 4.7u
GND
Figure 14 - NX9548 schematic for the demoboard layout
Rev.1.6 03/06/09
15
NX9548
Demoboard Layout
Figure 15 Top layer
Figure 16 Ground layer
Rev.1.6 03/06/09
16
NX9548
Figure 17 Power layer
Figure 18 Bottom layer
Rev.1.6 03/06/09
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NX9548
MCM 32 PIN 5 x 5 PACKAGE OUTLINE DIMENSIONS
NOTE: ALL DIMENSIONS ARE DISPLAYED IN MILLIMETERS.
Rev.1.6 03/06/09
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