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| SSM90T03GP,S N-channel Enhancement-mode Power MOSFET Low gate-charge Simple drive requirement Fast switching Pb-free, RoHS compliant. D BV DSS RDS(ON) ID 30V 4m 75A G S DESCRIPTION The SSM90T03GS is in a TO-263 package, which is widely used for commercial and industrial surface mount applications. This device is suitable for low voltage applications such as DC/DC converters. The through-hole version, the SSM90T03GP in TO-220, is available for vertical-mounting, where a small footprint is required on the board, and/or an external heatsink is to be attached. G GD S TO-263 (S) D TO-220 (P) S ABSOLUTE MAXIMUM RATINGS Symbol VDS VGS ID @ Tc=25C ID @ Tc=100C IDM PD @ Tc=25C EAS TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current, VGS = 4.5V Continuous Drain Current, VGS = 4.5V Pulsed Drain Current 1 Rating 30 20 75 63 350 96 0.7 3 Units V V A A A W W/C mJ C C Total Power Dissipation Linear Derating Factor Single Pulse Avalanche Energy Storage Temperature Range Operating Junction Temperature Range 29 -55 to 150 -55 to 150 THERMAL DATA Symbol RJC RJA Parameter Maximum Thermal Resistance, Junction-case Maximum Thermal Resistance, Junction-ambient Value 1.3 62 Units C/W C/W 2/17/2005 Rev.2.3 www.SiliconStandard.com 1 of 5 SSM90T03GP,S ELECTRICAL CHARACTERISTICS Symbol BVDSS Parameter Drain-Source Breakdown Voltage (at Tj=25C, unless otherwise specified) Test Conditions VGS=0V, ID=1mA Min. 30 0.8 Typ. 0.02 55 60 8.5 38 14 83 66 120 1010 890 Max. Units 4 6 3 1 25 100 96 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF BV DSS/ Tj RDS(ON) Breakdown Voltage Temperature Coefficient Reference to 25C, ID=1mA Static Drain-Source On-Resistance2 VGS=10V, ID=45A VGS=4.5V, ID=30A VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (T j=25 C) Drain-Source Leakage Current (T j=150 C) o o VDS=VGS, ID=250uA VDS=10V, ID=30A VDS=30V, VGS=0V VDS=24V ,VGS=0V VGS= 20V ID=40A VDS=24V VGS=4.5V VDS=15V ID=30A RG=3.3 , VGS=10V RD=0.5 VGS=0V VDS=25V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 4090 6540 Source-Drain Diode Symbol VSD trr Qrr Parameter Forward On Voltage 2 2 Test Conditions IS=45A, VGS=0V IS=30A, VGS=0V, dI/dt=100A/s Min. - Typ. 51 63 Max. Units 1.3 V ns nC Reverse Recovery Time Reverse Recovery Charge Notes: 1.Pulse width limited by safe operating area. 2.Pulse width <300us , duty cycle <2%. 3.VDD=25V, L=100uH, RG=25 , IAS=24A. 2/17/2005 Rev.2.3 www.SiliconStandard.com 2 of 5 SSM90T03GP,S 200 160 T C =25C 160 ID , Drain Current (A) ID , Drain Current (A) 10V 7.0V 5.0V 4.5V 140 T C =150C 120 10V 7.0V 5.0V 4.5V 100 120 V G =3.0V 80 80 V G =3.0V 60 40 40 20 0 0 1 2 3 0 0 1 2 3 4 5 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 5.0 2.0 I D =20A T C =25C Normalized R DS(ON) 1.8 I D = 45A 1.5 RDS(ON) (m ) 4.5 1.3 1.0 0.8 4.0 0.5 0.3 3.5 0.0 2 4 6 8 10 12 -50 0 50 100 150 V GS , Gate-to-Source Voltage (V) T j , Junction Temperature (C) Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 2 20 15 1.5 T j =150C Is (A) 10 T j =25C VGS(th) (V) 1 5 0.5 0 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -50 25 100 175 V SD , Source-to-Drain Voltage (V) T j , Junction Temperature (C) Fig 5. Forward Characteristic of Reverse Diode 2/17/2005 Rev.2.3 Fig 6. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 3 of 5 SSM90T03GP,S f=1.0MHz 14 10000 I D = 40 VGS , Gate to Source Voltage (V) 12 10 V DS =15V V DS =20V V DS =24V C (pF) 1000 C iss 8 C oss C rss 6 4 2 0 100 0 20 40 60 80 100 120 1 5 9 13 17 21 25 29 Q G , Total Gate Charge (nC) V DS ,Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 1000 1 Normalized Thermal Response (R thjc) Duty factor=0.5 100 0.2 ID (A) 1ms 0.1 0.1 0.05 PDM 0.02 10 10ms t T T c =25 C Single 1 0.1 1 10 o 100m s 0.01 Single Pulse Duty factor = t/T Peak Tj = PDM x Rthjc + TC 0.01 100 0.00001 0.0001 0.001 0.01 0.1 1 10 V DS ,Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG 4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Waveform 2/17/2005 Rev.2.3 Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 of 5 SSM90T03GP,S Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 2/17/2005 Rev.2.3 www.SiliconStandard.com 5 of 5 |
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