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ISL99202
Data Sheet May 29, 2009 FN6758.0
60mW, Capfree, Stereo Headphone Amplifier
The ISL99202 is a stereo, capfree headphone amplifier. The wide operating voltage of 2.4V to 5.5V makes it versatile enough to be used in mobile battery powered applications powered by 2 AA or Single cell Li-Ion batteries as well as 3.3/5V power supply available notebook computers. The ISL99202 has robust RF immunity, which makes it ideally suited for today's mobile applications. It has audiophile quality SNR and THD specifications and Click/Pop suppression. The ISL99202 comes with Comprehensive Protection features, which include undervoltage and short-circuit protection and thermal shutdown. The ISL99202 lowest power consumption in the industry is achieved by low Iqq and current shutdown. The product is available in 12 Ld TQFN and 0.4mm pitch 12 ball WLCSP.
Features
* Supports 16 to 600 Speaker Impedance * Ground Referenced: No Output Coupling Capacitors * Audiophile Quality Sound THD of 0.01%, SNR of 102dB * PSRR < -90dB, No Need for LDO * Wide Operating Voltage of 2.4V to 5.5V * < 3mA Quiesent Current and 0.1A Shutdown Current * State of the Art Pop and Click Suppression * Pb-Free (RoHS Compliant)
Applications
* Mobile Phones * MP3 Players
Ordering Information
PART NUMBER ISL99202IIAZ-T* (Notes 1, 3) ISL99202IIBZ-T* (Notes 1, 3) ISL99202IRTAZ (Notes 2, 3) ISL99202IRTAZ-T* (Notes 2, 3) PART MARKING 202A 202B 202A 202A GAIN SETTING (dB) -1.5V/V Adjustable -1.5V/V -1.5V/V -1.5V/V Adjustable Adjustable Adjustable TEMP. RANGE (C) -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 PACKAGE Tape & Reel (Pb-Free) PKG. DWG. #
12 Ball 3x4 WLCSP Array W3x4.12 12 Ball 3x4 WLCSP Array W3x4.12 12 Ld TQFN 12 Ld TQFN 12 Ld TQFN 12 Ld TQFN 12 Ld TQFN 12 Ld TQFN L12.3x3Z L12.3x3Z L12.3x3Z L12.3x3Z L12.3x3Z L12.3x3Z
ISL99202IRTAZ-TK* (Notes 2, 3) 202A ISL99202IRTBZ (Notes 2, 3) ISL99202IRTBZ-T* (Notes 2, 3) 202B 202B
ISL99202IRTBZ-TK* (Notes 2, 3) 202B *Please refer to TB347 for details on reel specifications. NOTES:
1. These Intersil Pb-free WLCSP and BGA packaged products products employ special Pb-free material sets; molding compounds/die attach materials and SnAgCu - e1 solder ball terminals, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free WLCSP and BGA packaged products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. Contact factory for ordering details.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL99202 Pinouts
ISL99202 (12 LD TQFN) TOP VIEW
10 OUTR 11 OUTL 12 VDD
ISL99202 (12 BALL WLCSP) TOP VIEW
3 VDD 9 SVSS 2 OUTL 1 OUTR A SVSS B SGND C INL D INR SDB PVSS CP PGND CN
CP 1 PGND 2 CN 3 PVSS 4 SDB 5 INL 6 THERMAL PAD
8 INR 7 SGND
Pin Descriptions
PIN NUMBER TQFN 1 2 3 4 5 6 7 8 9 10 11 12 WLCSP B3 C3 D3 D2 C2 D1 C1 B2 B1 A1 A2 A3 PIN NAME CP PGND CN PVSS SDB INL SGND INR SVSS OUTR OUTL VDD Charge pump positive terminal Charge pump Ground Charge pump negative terminal Charge pump output Active low shutdown input Left channel input Analog ground Right channel input Amplifier negative supply Right channel output Left channel output Positive power supply DESCRIPTION
NOTE: Exposed Pad is connected to PGND and SGND
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ISL99202
Absolute Maximum Ratings (Reference to GND)
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V INR, INL, CP, SDB . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD + 0.3V
Thermal Information
Thermal Resistance (Typical, Notes 4, 5) JA (C/W) JC (C/W) TQFN Package . . . . . . . . . . . . . . . . . . 54 8 WLCSP Package . . . . . . . . . . . . . . . . . 90 N/A Maximum Junction Temperature (Plastic Package) -65C to +150C Maximum Storage Temperature Range . . . . . . . . . .-65C to +150C Dissipation Ratings Derating Factor 12 LD 3x3 TQFN . . . . . . . . . . . . . . . . . . . . . . . . . . .14.7mW/C 12 Ball 3x4 Array WLCSP . . . . . . . . . . . . . . . . . . . .10.1mW/C Power Rating TA 12 Ld 3x3 TQFN +25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.84W +70C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.12W +85C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.96W 12 Ball 3x4 Array WLCSP +25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.79W +70C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.33W +85C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.18W Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . .-40C to +85C Maximum Supply Voltage (VDD Pin) . . . . . . . . . . . . . . . . . . . . . 5.5V Operating Supply Voltage (VDD Pin) . . . . . . . . . . . . . . . . 2.4V to 5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTES: 4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379. 5. For theta JC the "case temp." location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Typical Values are Tested at VDD = 5V, TA = +25C and RL = 32. All Maximum and Minimum Values Are Established Under the Recommended Operating Supply Voltage Range and Ambient Temperature Range, Unless Otherwise Noted. SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
PARAMETER OUTPUT POWER Output Power (QFN)
POUT
RL= 32, THD = 1% RL= 16
30
63 70
mW mW mW mW % % %
Output Power (CSP)
POUT
RL=32 RL=16
25
63 70 0.003 0.01 0.02
Total Harmonic Distortion + Ratio
THD+N
RL = 1k, VOUT = 1.5VRMS, f = 1kHz RL = 32, POUT = 50mW, f = 1kHz RL = 16, POUT = 35mW, f = 1kHz
PROTECTION Thermal Shutdown Thermal Shutdown Hysteresis Overcurrent Protection Undervoltage Shutdown LOGIC INPUTS (SDB) Input Voltage High Input Voltage Low POWER SUPPLY Supply Voltage Range VDD 2.4 5.5 V VINH VINL 1.4 0.9 V V OCP OTP 160 15 200 2.4 C C mA V
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ISL99202
Electrical Specifications
Typical Values are Tested at VDD = 5V, TA = +25C and RL = 32. All Maximum and Minimum Values Are Established Under the Recommended Operating Supply Voltage Range and Ambient Temperature Range, Unless Otherwise Noted. (Continued) SYMBOL PSRR TEST CONDITIONS VDD = 2.5V to 5.0V at 217Hz VDD = 2.5V to 5.0V at 1kHz VDD = 2.5V to 5.0V at 20kHz Quiescent Current Shutdown Current GAIN CONTROL Voltage Gain Ch to Ch Gain Tracking Total Harmonic Distortion + Ratio THD+N RL = 1k, VOUT = 1.5VRMS, f = 1kHz RL = 32, POUT = 50mW, f = 1kHz RL = 16, POUT = 35mW, f = 1kHz NOISE PERFORMANCE Signal to Noise Ratio SNR RL= 1k, VOUT = 1.5VRMS, BW = 22Hz to 20kHz RL= 1k, VOUT = 1.5VRMS, BW = 22Hz to 20kHz, A-weighted RL= 32, POUT = 35mW, BW = 22Hz to 20kHz RL= 32, POUT = 35mW, BW = 22Hz to 20kHz, A-weighted Slew Rate Capacitve Drive Crosstalk (QFN, CSP) Charge Pump Oscillation Frequency Click and Pop Level VDD = 3.0V Power Supply Rejection Ratio PSRR 217Hz 1kHz 20kHz Quiescent Current Shutdown Current Output Offset Voltage Output Power at 32 Load Output Power at 16 Load Total Harmonic Distortion + Noise Ratio THD+N Iqq ISDB VOS RL = 32, THD = 1% RL = 16, THD = 1% RL = 1k, VOUT = 1.5VRMS, f = 1kHz RL = 32, POUT = 50mW, f = 1kHz RL = 16, POUT = 35mW, f = 1kHz SDB = GND -1 96 88 76 2.4 0.1 0.05 54 56 0.005 0.01 0.02 3.6 1.1 1 dB dB dB mA A mV mW mW % % % SR CL xtalk fsoc KCP RL = 32, Peak voltage, Awtg. 32 sam/sec RL = 16, POUT = 15mW, f = 10kHz 400 102 105 100 113 0.5 100 -76 500 -67 600 dB dB dB dB VS pF dB kHz dB AV -1.55 -1.50 0.15 0.005 0.01 0.04 -1.45 V/V % % % % Iqq ISDB VDD = 5.0V SDB = GND , VDD = 5.0V MIN TYP 96 88 76 3 0.1 4.6 1.1 MAX UNITS dB dB dB mA A
PARAMETER Power Supply Rejection Ratio
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ISL99202
Block Diagram
VDD SDB SDB LOGIC CLICK AND POP SUPPRESSION PVSS
POSITIVE VOLTAGE REGULATOR
BIAS AND REFERENCE INR AMPR + SGND SVSS + AMPL OUTL OVERCURRENT PROTECTION OUTR
INL
PGND DYNAMICALLY ADJUSTED VOLTAGE REGULATOR PVSS CP CN
CLOCK GENERATOR
Typical Performance Curves
100 VDD = 3V RL = 16 THD + NOISE RATIO (%) THD + NOISE RATIO (%) 10 10 100 VDD = 3V RL = 32 10kHz
1.0 20Hz 0.1 10kHz
1.0
20Hz
0.1
0.01 1kHz
0.01 1kHz
0.001 1
0.001 10 OUTPUT POWER (mW) 100 1 10 OUTPUT POWER (mW) 100
FIGURE 1. TOTAL HARMONIC DISTORTION + NOISE RATIO vs OUTPUT POWER
FIGURE 2. TOTAL HARMONIC DISTORTION + NOISE RATIO vs OUTPUT POWER
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ISL99202 Typical Performance Curves (Continued)
100 VDD = 3V RL = 32 THD + NOISE RATIO (%) 10 10kHz THD + NOISE RATIO (%) 10 100 VDD = 5V RL = 32 10kHz
1.0
20Hz
1.0 20Hz 0.1
0.1
0.01 1kHz 1 10 OUTPUT POWER (mW) 100
0.01 1kHz 0.001 1 10 OUTPUT POWER (mW) 100
0.001
FIGURE 3. TOTAL HARMONIC DISTORTION + NOISE RATIO vs OUTPUT POWER
FIGURE 4. TOTAL HARMONIC DISTORTION + NOISE RATIO vs OUTPUT POWER
10 VDD = 3V RL = 16 THD + NOISE RATIO (%) THD + NOISE RATIO (%) 1.0 POUT = 10mW 0.1
10 VDD = 5V RL = 16 1.0 POUT = 20mW 0.1
0.01 POUT = 5mW
0.01 POUT = 40mW
0.001 10
100
1k FREQUENCY (Hz)
10k
100k
0.001 10
100
1k FREQUENCY (Hz)
10k
100k
FIGURE 5. TOTAL HARMONIC DISTORTION + NOISE RATIO vs FREQUENCY
FIGURE 6. TOTAL HARMONIC DISTORTION + NOISE RATIO vs FREQUENCY
10 VDD = 3V RL = 32 THD + NOISE RATIO (%) THD + NOISE RATIO (%) 1.0
10 VDD = 5V RL = 32 1.0
0.1 POUT = 15mW 0.01 POUT = 10mW
0.1
POUT = 50mW
0.01 POUT = 30mW
0.001 10
100
1k FREQUENCY (Hz)
10k
100k
0.001 10
100
1k FREQUENCY (Hz)
10k
100k
FIGURE 7. TOTAL HARMONIC DISTORTION + NOISE RATIO vs FREQUENCY
FIGURE 8. TOTAL HARMONIC DISTORTION + NOISE RATIO vs FREQUENCY
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ISL99202 Typical Performance Curves (Continued)
0 RL = 32 -20 -40 PSRR(dB) -60 VDD = 5V -80 -100 -120 10 CROSSTALK (dB) -40 -30 VDD = 5V RL = 16
-50 RIGHT TO LEFT
-60
VDD = 3V
-70 -80 10 LEFT TO RIGHT 100 1k FREQUENCY (Hz) 10k 100k
100
1k FREQUENCY (Hz)
10k
100k
FIGURE 9. POWER SUPPLY REJECTION RATIO vs FREQUENCY
FIGURE 10. CROSSTALK vs FREQUENCY
70 RL = 32 (STEREO INPUT) 60 POWER DISSIPATION (mW) POWER DISSIPATION (MW) 50 40 30 20 10 0
90 80 70 60 50 40 30 20 10 RL = 16 (STEREO INPUT)
5
15
25
35
45
55
65
0
5
15
25
35
45
55
65
75
85
95
OUTPUT POWER (mW)
OUTPUT POWER (mW)
FIGURE 11. POWER DISSIPATION vs OUTPUT POWER
FIGURE 12. POWER DISSIPATION vs OUTPUT POWER
90 NO LOAD INPUTS GND 255 SHUTDOWN CURRENT (nA) 205 155 105 55 5 2.4 OUTPUT POWER (mW) 80 70 60 50 40 30 2.5 RL = 32 fIN = 1kHz THD + N = 10%
THD + N = 1%
2.9
3.4
3.9
4.4
4.9
5.4
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
FIGURE 13. SHUTDOWN CURRENT vs SUPPLY VOLTAGE
FIGURE 14. OUTPUT POWER vs SUPPLY VOLTAGE
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ISL99202 Typical Performance Curves (Continued)
100 90 OUTPUT POWER (mW) 80 70 60 50 40 30 2.5 THD + N = 1% RL = 16 fIN = 1kHz THD + N = 10% OUTPUT POWER (W) 0.100 0.095 0.090 0.085 0.080 0.075 0.070 0.065 0.060 0.055 0.050 0.045 0.040 0.035 0.030 0.025 0.020 0.015 0.010 0.005 0 10 VDD = 5V fIN = 1kHz
THD + N = 10%
THD + N = 1%
3.0
3.5
4.0
4.5
5.0
5.5
100 LOAD RESISTANCE ()
1k
SUPPLY VOLTAGE (V)
FIGURE 15. OUTPUT POWER vs SUPPLY VOLTAGE
FIGURE 16. OUTPUT POWER vs LOAD RESISTANCE
0.080 0.075 0.070 0.065 0.060 0.055 0.050 0.045 0.040 0.035 0.030 0.025 0.020 0.015 0.010 0.005 0 10
THD + N = 10%
VDD = 3V fIN = 1kHz SUPPLY CURRENT (mA)
3.6 3.4 3.2 3.0 2.8 2.6 2.4 2.4
NO LOAD INPUTS GND INPUT GND
OUTPUT POWER (W)
THD + N = 1%
100 LOAD RESISTANCE ()
1k
2.9
3.4
3.9
4.4
4.9
5.4
5.9
SUPPLY VOLTAGE (V)
FIGURE 17. OUTPUT POWER vs. LOAD RESISTANCE
FIGURE 18. SUPPLY CURRENT vs. SUPPLY VOLTAGE
FIGURE 19. CHARGE PUMP RESPONSE FOR SDB GOING HIGH
FIGURE 20. CHARGE PUMP RESPONSE FOR SDB GOING LOW
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ISL99202 Typical Application Circuit
ISL99202
LEFT AUDIO INPUT 1
INL
-
OUTL
+
+
INR RIGHT AUDIO INPUT 1 OUTR
-
Detailed Description
The ISL99202 incorporates a novel proprietary architecture to eliminate the large output capacitors associated with single supply headphone amplifiers. Traditional charge pump based architectures that eliminated the output capacitors required additional power to operate the charge pump, which made them ill-suited for portable battery powered applications. The ISL99202 architecture eliminates the need for large output capacitors while consuming industry's lowest quiescent and shutdown currents.
current in quiescent state. The ISL99202 is tested and trimmed to have very low offset voltages (typically 50V).
RF Immunity
Most portable applications for ISL99202 are subject to RF radiation from a myriad of sources, like Wi-Fi networks or cellular phone networks. Though these signals are not in the audio band, they can interfere with the audio signals through complex non-linear mechanisms, aliasing or demodulations to create audio band noise. The ISL99202 architecture prevents this coupling into audio band to achieve superior audio performance.
Capfree Architecture
At the core of the Capfree architecture is a dynamically adjusted negative voltage regulator. By continuously monitoring the output power requirements, it adjusts the energy delivery circuitry. The feedback system ensures that overhead power required to deliver audio at the headphone speaker is always optimized for lower power dissipation.
Protection Circuitry
The ISL99202 has comprehensive protection circuitry, which protects the part due to undervoltage, over-temperature and overcurrent. There is hysteresis built into over-temperature and undervoltage, while the overcurrent is designed to limit the output current in case of accidental short circuit or low impedance headphone load connection.
Integrated LDO
A high precision LDO integrated into the power path of the amplifier accounts for a 92dB PSRR. This eliminates the need for a dedicated LDO used in some systems resulting in BOM/cost savings.
References
Intersil Technical Brief 451: "PCB Assembly Guidelines for Intersil Wafer Level Chip Scale Package Devices" http://www.intersil.com/data/tb/TB451.pdf Intersil Technical Brief 389: "PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages" http://www.intersil.com/data/tb/tb389.pdf
Offset Cancellation Circuitry
The DC offset is a very important parameter. It is a principal contributor to Click and Pop. In the cast Capfree architecture, the DC offset can also be a source of DC
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FN6758.0 May 29, 2009
ISL99202
Package Outline Drawing
L12.3x3Z
12 LEAD THIN QUAD FLAT NO LEAD PLASTIC PACKAGE Rev 0, 10/08
3.00 A B 10 0.5 BSC 12 6 PIN #1 INDEX AREA
FOR ISL99202 USE ONLY WITH REDUCED e-PAD SIZE TO 1.4mm ON LAND PATTERN
6 PIN 1 INDEX AREA 4X 1.70 REF 9 1
3.00
7 3 0.10 M C A B (4X) 0.15 6 12X 0 . 4 0 . 4 4 0.25 +0.07 / -0.05
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X" 0.10 C BASE PLANE 1.40 ) SEATING PLANE 0.08 C
0 . 75 ( 2 . 8 TYP )
C
SIDE VIEW
(
0.6
C
0 . 2 REF
5
0 . 50 0 . 25
0 . 00 MIN. 0 . 05 MAX.
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to JEDEC STD MO-229. 3. Unless otherwise specified, tolerance : Decimal 0.0 4. Dimension b applies to the metallized terminal and is measured between 0.20mm and 0.32mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature.
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FN6758.0 May 29, 2009
ISL99202 Wafer Level Chip Scale Package (WLCSP 0.4mm Ball Pitch)
W3x4.12
D
3x4 ARRAY 12 BALL WAFER LEVEL CHIP SCALE PACKAGE SYMBOL A
E
MILLIMETERS 0.445 Min 0.495 Nom 0.545 Max 0.190 0.025 0.305 0.025 0.270 0.030 1.695 0.020 0.400 BASIC 1.295 0.020 0.400 BASIC 0.400 BASIC 0.200 BASIC 0 BASIC NUMBER OF BUMPS: 12
A1 A2 b
PIN 1 ID TOP VIEW
D D1 E E1 e
A2 A
SD SE
A1 b SIDE VIEW
Rev. 0 12/08 NOTES: 1. All Dimensions are in Millimeters.
b SD e (E1) 3 2 1 D C e (D1) BOTTOM VIEW B A SE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 11
FN6758.0 May 29, 2009

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