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SSM4800M
N-CHANNEL ENHANCEMENT MODE POWER MOSFET Low On-Resistance Fast Switching Simple Drive Requirement
G D D D
D
BV DSS R DS(ON) ID
S
25V 18m 9A
SO-8
S
S
Description
DD
Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. G
G
The SSM4800M is in the SO-8 package, which is widely preferred for commercial and industrial surface mount applications, and is well suited for low-voltage applications such as DC/DC converters.
SS
Absolute Maximum Ratings
Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current
1
Rating 25 20 9 7 40 2.5 0.02 -55 to 150 -55 to 150
Units V V A A A W W/
Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range
Thermal Data
Symbol Rthj-amb Parameter Thermal Resistance Junction-ambient Max. Value 50 Unit /W
Rev.2.01 6/26/2003
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SSM4800M
Electrical Characteristics @ T j=25oC (unless otherwise specified)
Symbol BVDSS
BVDSS/Tj
Parameter Drain-Source Breakdown Voltage
Test Conditions VGS=0V, ID=250uA
Min. 25 1 -
Typ. 0.037
Max. Units 18 33 3 1 25 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA
RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Static Drain-Source On-Resistance
VGS=10V, ID=9A VGS=4.5V, ID=7A VDS=VGS, ID=250uA VDS=15V, ID=10A
20 -
Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (T j=25 C) Drain-Source Leakage Current (T j=55 C)
o o
VDS=25V, VGS=0V VDS=20V, VGS=0V VGS= 20V ID=9A VDS=15V VGS=5V VDS=15V ID=1A RG=6.2,VGS=10V RD=15 VGS=0V VDS=25V f=1.0MHz
Gate-Source Leakage Total Gate Charge
2
100 10.9 1.9 7.4 7 10.5 20 17.5 390 245 100 -
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
2
Source-Drain Diode
Symbol IS ISM VSD Parameter
Continuous Source Current ( Body Diode )
Test Conditions VD=VG=0V , VS=1.3V
1
Min. -
Typ. -
Max. Units 2.3 40 1.3 A A V
Pulsed Source Current ( Body Diode )
Forward On Voltage
2
Tj=25, IS=2.3A, VGS=0V
Notes:
1.Pulse width limited by safe operating area. 2.Pulse width <300us , duty cycle <2%.
Rev.2.01 6/26/2003
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SSM4800M
40
40
T C =25 o C
30
V G =10V V G =8.0V V G =6.0V
T C =150 o C
30
V G =10V V G =8.0V
ID , Drain Current (A)
20
ID , Drain Current (A)
V G =6.0V
20
V G =4.0V
V G =4.0V
10
10
0
0 0 1 2 3 4 5 6
0
1
2
3
4
5
6
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
34
1.80
30
I D =9A T c =25
I D =9A
1.60
V G =10V
26
Normalized R DS(ON)
1.40
RDSON (m )
22
1.20
18
1.00
14
0.80
10 2 3 4 5 6 7 8 9 10 11
0.60 -50 0 50 100 150
V GS (V)
T j , Junction Temperature ( o C)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance v.s. Junction Temperature
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SSM4800M
10
3
9
2.5
8
7
ID , Drain Current (A)
2
6
5
PD (W)
25 50 75 100 125 150
1.5
4
1
3
2
0.5
1
0
0 0 50 100 150
T c , Case Temperature ( C)
o
T c , Case Temperature ( C)
o
Fig 5. Maximum Drain Current v.s.
Fig 6. Typical Power Dissipation
Case Temperature
100
1
DUTY=0.5
Normalized Thermal Response (R thjc)
0.2
10
0.1
0.1
0.05
ID (A)
10us
0.02
100us
1
0.01
PDM
0.01
SINGLE PULSE
t T
1ms 10ms 100ms
T c =25 o C Single Pulse
0 0.1 1 10
Duty factor = t/T Peak Tj = P DM x Rthjc + TC
0.001 100 0.0001 0.001 0.01 0.1 1 10 100 1000
V DS (V)
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
Rev.2.01 6/26/2003
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SSM4800M
f=1.0MHz
16
10000
14
I D =9A V DS =15V
VGS , Gate to Source Voltage (V)
12
1000
10
8
C (pF)
Ciss Coss
100
6
Crss
4
2
0 0 5 10 15 20 25 30
10 1 6 11 16 21 26
Q G , Total Gate Charge (nC)
V DS (V)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
100
3
10
T j =150 o C
2
IS(A)
T j =25 o C
1
VGS(th) (V)
1 0 1.1 1.3 1.5 -50
0.1 0.1 0.3 0.5 0.7 0.9
0
50
100
150
V SD (V)
T j , Junction Temperature( C)
o
Fig 11. Forward Characteristic of
Reverse Diode
Fig 12. Gate Threshold Voltage v.s. Junction Temperature
Rev.2.01 6/26/2003
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SSM4800M
VDS
RD
90%
D
VDS
TO THE OSCILLOSCOPE 0.6 x RATED VDS
RG
G
+ 10 V -
S VGS
10% VGS td(on) tr td(off) tf
Fig 13. Switching Time Circuit
Fig 14. Switching Time Waveform
VG
VDS TO THE OSCILLOSCOPE
QG 5V
D
0.6 x RATED VDS G S
+
QGS
QGD
VGS
1~ 3 mA
IG ID
Charge
Q
Fig 15. Gate Charge Circuit
Fig 16. Gate Charge Waveform
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
Rev.2.01 6/26/2003
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