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| Large Current External FET Controller Type Switching Regulators Single/Dual-output High-frequency Step-down Switching Regulator(Controller type) BD9845FV No.09028EAT08 Overview BD9845FV is an IC containing a circuit of switching regulator controller by pulse width modulation system. This circuit can be used for step-down DC/DC converter operation. In addition, the package is designed compact, and is optimum for compact power supply for many kinds of equipment. Feature 1) High voltage resistance input (Vcc=35V) 2) FET driver circuit is contained (step-down circuit 1 output). 3) Error amplifier reference voltage (1.0V1%) and REG output circuit (2.5V) are contained. 4) Overcurrent detection circuit is contained. 5) Soft start and pause period can be adjusted. 6) Three modes of standby, master, and slave can be switched. (iccs = 0 uA typ in standby mode.) 7) ON/OFF control is enabled independently for each channel. (DT terminal) Application LCD, PDP, PC, AV, Printer, DVD, Projector TV, Fax, Copy machine, Measuring instrument, etc. Absolute maximum rating Item Supply voltage Permissible loss OUT terminal voltage resistance C5V terminal voltage resistance Operation temperature range Storage temperature range Joint temperature Symbol Vcc Pd OUT C5V Topr Tstg Tjmax Rating 36 5001 Vcc-7V to Vcc Vcc-7V to Vcc -40 to +85 -55 to +150 150 Unit V mW V V C C C *1 When glass epoxy board 70.0 mm 70.0 mm 1.6 mm is installed onboard. Reduced by 4.0 mW/C above Ta=25C. Operating condition (Ta=25C) Item Supply voltage Output terminal voltage Timing capacity Oscillation frequency STB input voltage SEL input voltage Symbol Vcc OUT CCT Fosc VSTB VSELTB Range 3.6 to 35 C5V - Vcc 47 to 3000 100 to 1500 0 to Vcc 0 to Vcc Unit V V pF kHz V V www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 1/15 2009.05 - Rev.A BD9845FV Electric characteristics (Ta=25C, VCC=6V unless otherwise specified) Standard value Item Symbol Min. Typ. Max. [VREF output unit] Output voltage VREF 2.450 2.500 2.550 Input stability Line reg. 1 10 Load stability Load reg. 2 10 Current capacity IOMAX 2 13 [Triangular wave oscillator] Oscillation frequency FOSC 95 106 117 Frequency fluctuation FDV 0 1 [Soft start unit] SS source current ISSSO 1.4 2 2.6 SS sink current ISSSI 5 12 [Pause period adjusting circuit] DT input bias current IDT 0.1 1 DT sink current IDTSI 1 3.3 [Low input malfunction preventing circuit] Threshold voltage VUTH 3.0 3.2 3.4 Hysteresis VUHYS 0.15 0.25 [Error amplifier] Non-inverting input reference voltage VINV 0.99 1 1.01 Reference voltage supply fluctuation dVinv 1 6 INV input bias current IIB 0 1 Open gain AV 65 85 Max output voltage VFBH 2.30 VREF Min output voltage VFBL 0.6 1.3 Output sink current IFBSI 0.5 1.5 Output source current IFBSO 50 105 [PWM comparator] Vt0 1.4 1.5 1.6 Input threshold voltage(fosc=100kHz) Vt100 1.9 2 2.1 [Output unit] Output ON resistance H RONH 4.0 10 Output ON resistance L RONL 3.3 10 C5V clamp voltage VCLMP 4.5 5 5.5 [Overcurrent protection circuit] Overcurrent detection threshold voltage VOCPTH 0.04 0.05 0.06 OCP-input bias current IOCP 0.1 10 Overcurrent detection delay time tdocpth 200 400 Overcurrent detection minimum tdocpre 0.8 1.6 retention time [Standby changeover unit] STB flow-in current ISTB 55 100 Standby mode setting range VSTBL 0 0.5 Active (master) mode setting range VSTBH 3.0 VCC SEL flow-in current ISEL 15 30 Master mode setting range VSELL 0 0.5 Slave mode setting range VSELH 2.0 VCC [Device overall] Standby current ICCS 0 1 Average power consumption ICCA 1 2.4 4 * Radiation resistance design is not applied. Technical Note Unit V mV mV mA kHz % A mA A mA V V V mV A dB V V mA A V V V V A ns ms A V V A V V A mA Condition IO=0.1 mA Vcc=3.6 V35 V IO=0.1 mA2 mA VREF=(typ.)x0.95 CCP=1800 pF Vcc=3.6 V35 V SS=0.5 V SS=0.5 V DT=1.75 V DT=1.75 V, (OCP+)-(OCP-)=0.5 V Vcc start detection INV=FB Vcc=3.6 V35 V INV=1 V FB=1.25 V, INV=1.5 V FB=1.25 V, INV=0.5 V On duty 0% On duty 100% RONH=(VCC -OUT)/ Iout, Iout=0.1 A RONL=(OUT-C5 V)/ Iout, Iout=0.1 A VCLMP= VCC-C5V , VCC 7 V Voltage between(OCP+) and (OCP-) OCP+= VCC, OCP-= VCC-0.5 V OCP-= VCCVCC-0.2 V OCP-= VCC-0.2 VVCC STB=6V SEL=2.5V STB=0 V INV=0 V, FB=H, DT=1.75 V www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 2/15 2009.05 - Rev.A BD9845FV Reference data 10 9 Standby Current: ICCS(uA) Current: ICCA(mA) 8 7 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 VCC=6V 8 7 Circuit Current: ICCA(mA) 6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 40 Ta=25C 8 7 6 5 4 3 2 1 0 -50 -25 0 Technical Note VCC=6V Circuit 25 50 75 100 125 Ambient Temperature: Ta(C) Supply Voltage: VCC(V) Ambient Temperature: Ta(C) Fig.1 Standby current temperature characteristics 2.520 Reference Voltage: VREF(V) 2.515 Reference Voltage: VREF(V) 2.510 2.505 2.500 2.495 2.490 2.485 2.480 0 5 10 15 20 25 30 35 40 Supply Voltage: VCC(V) Ta=25C Fig.2 Circuit current in operation 2.520 2.515 2.510 2.505 2.500 2.495 2.490 2.485 2.480 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Ta=25C VCC=6V Fig.3 Circuit current temperature characteristics in operation 2.520 2.515 2.510 2.505 2.500 2.495 2.490 2.485 2.480 -50 -25 0 25 50 75 100 125 VCC=6V Reference Output Current: IREF(mA) Reference Output Voltage: VREF (V) Ambient Temperature: Ta(C) Fig.4 VREF supply voltage characteristics Fig.5 VREF current capability Fig.6 VREF temperature characteristics 3.5 3.4 UVLO Threshold: VUTH(V) 3.3 3.2 3.1 3 2.9 2.8 2.7 2.6 2.5 -50 -25 0 25 50 75 100 125 Loop Gain :Closed [ dB ] 100 80 60 40 20 0 -20 Gain Phase 0 -45 ErrAmp Input Current: IIB(A) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -90 Phase -135 -180 Phase Shift [ deg ] VCC=6V Ta=25 Gain 100 1K -225 -270 Ambient Temperature: Ta(C) Frequency [Hz] 10K 100K 1M 10M ErrAmp Input Voltage: VINV(V) Fig.7 UVLO threshold temperature characteristics Fig.8 Error amplifier I/O characteristics Fig.9 Error amplifier input current 1.01 ErrAmp Reference Voltage: VINV(V) FB Source Current: IFBSO(A) 1.006 1.004 1.002 1 0.998 0.996 0.994 0.992 0.99 -50 -25 0 25 50 75 100 125 VCC=6V 120 100 80 60 40 20 0 0 1 2 3 4 ErrAmp Output Voltage: VFB(V) Ta=-40C VCC=6.0V FB Sinkt Current: IFBSI(mA) 1.008 140 Ta=85C Ta=25C 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 0 0.5 1 1.5 2 VCC=6.0V Ta=85C Ta=25C Ta=-40C Ambient Temperature: Ta(C) ErrAmp Output Voltage: VFB(V) Fig.10 Error amplifier reference voltage temperature characteristics Fig.11 FB output source current Fig.12 FB output sink current www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 3/15 2009.05 - Rev.A BD9845FV Reference data 4.0 SS Source Current: ISSso(A) SS Sink Current: ISSsi(mA) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VCC=6.0V 35 30 25 20 15 10 5 0 0 0.5 1 1.5 2 SS Voltage: VSS(V) VCC=6.0V Ta=-40C Ta=25C Ta=85C Technical Note SS Source Current: ISSso(uA) 5 4 3 2 1 0 -50 VCC=6.0V -25 0 25 50 75 100 125 SS Voltage: VSS(V) Ambient Temperature: Ta(C) Fig.13 SS source current Fig.14 SS sink current Fig.15 SS source current temperature characteristics 120 CCP=1800pF DT Input Current: IDT(A) Frequency: FOSC(kHz) 110 7 6 Dt SInk Current: IDT(mA) 5 4 3 2 1 0 -25 0 25 50 75 100 125 0 0.5 1 1.5 2 2.5 VCC=6.0V Ta=25C 7 6 5 4 3 2 VCC=6.0V 1 0 0 0.5 1 1.5 2 2.5 DT Input Voltage: VDT(V) Ta=-40C Ta=25C Ta=85C 100 VCC=6V 90 80 -50 Ambient Temperature: Ta(C) DT Input Voltage: VDT(V) Fig.16 Oscillation frequency temperature characteristics Fig.17 DT bias current Fig.18 DT sink current 100 90 80 70 60 50 40 30 20 10 0 1.4 1.6 1.8 VCC=6.0V Ta=25C 100 90 80 70 60 50 40 30 20 10 0 1.4 40 35 VCC=6.0V Ta=25C 30 IDS(mA) 25 20 15 10 5 1.6 1.8 2 2.2 0 VCC VCC -0.05 VCC -0.10 VOUT(V) VCC -0.15 VCC -0.20 Ta=-40C Ta=25C Ta=85C VCC=6.0V Ta=25C Output Duty Cycle: Duty(%) 2 2.2 DT Input Voltage: VDT(V) Output Duty Cycle:Duty(%) DT Input Voltage: VDT(V) Fig.19 Output Duty-VDT characteristics (100kHz) Fig.20 Output Duty-VDT characteristics (1.5MHz) Fig.21 Output ON resistance H (RONH) 40 35 30 IDS(mA) 25 20 15 10 5 0 C5V C5V -0.05 C5V -0.10 VOUT(V) C5V -0.15 C5V -0.20 VCC=6.0V Ta=-40C Ta=25C Ta=85C ISTB(uA) 500 70 VCC=35V Ta=85 Ta=25 Ta=-40 400 350 300 250 200 150 100 50 0 0 5 10 15 OCP Threshold: Vocpth(mV) 450 65 60 55 50 45 40 35 30 -50 -25 0 25 50 75 100 125 VCC=6V 20 VSTB(V) 25 30 35 40 Ambient Temperature: Ta(C) Fig.22 Output ON resistance L (RONH) Fig.23 STB flow-in current Fig.24 Overcurrent detection voltage temperature characteristics www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 4/15 2009.05 - Rev.A BD9845FV Reference data 5.0 4.5 3.5 VC5V(V) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 50 100 150 200 250 VCC=5.0V Ta=25C 4.0 5.5 5.4 5.3 VCC=6.0V Ta=25C VCC-VC5V(V) 10 9 8 7 6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 40 0 5 10 Technical Note VCC-VC5V(V) 5.2 5.1 5.0 4.9 4.8 4.7 4.6 4.5 Ta=25C 15 20 25 30 35 40 IC5V(mA) IC5V(mA) Supply Voltage: VCC(V) Fig.25 C5V saturation voltage Fig.26 C5V load regulation Fig.27 C5V line regulation www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 5/15 2009.05 - Rev.A BD9845FV Block diagram/Pin layout VCC VCC Technical Note STB SEL OCP+ OCP- VCC VREF + REG (2.5V) STB MASTER /SLAVE VCC OCP VREF - OCP + C5V C5V 50mV10mV REG (VCC-5V) C5V DT DTOFF FB VREF 2A 1V10mV DT + 1.25V DTLow VCC SS SSOFF + + ERR - + + PWM - LS DRV OUT C5V INV OSC 200A + 200A PROTECTION LOGIC OCP 2.0V 1.5V Hold time (1.6msec) DTLow SSOFF DTOFF TSD TSD UVLO TSD Hold time (0.2msec) MASTER /SLAVE VCC VREF C5V 3.2V 2.2V 3V 2V 1.5V UVLO UVLO CT Fig.28 Block diagram GND VREF CT DT SS Terminal number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Terminal name VREF CT GND STB C5V OUT Vcc OCP OCP SEL FB INV SS DT Function Reference voltage (2.5V) output terminal Timing capacity external terminal GROUND SSOP-B14 GND STB C5V OUT VCC INV FB SEL OCPOCP+ Standby mode setting terminal Output L side voltage (Vcc-5V) Output Power terminal Output Overcurrent detector + Input terminal Output Overcurrent detector - Input terminal Master/Slave mode setting terminal Fig.29 Pin layout Output Error amplifier output terminal Output Output Error amplifier - input terminal Soft start time setting terminal Output Dead time setting terminal www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 6/15 2009.05 - Rev.A BD9845FV Technical Note Operation description of each block and function 1) REG (reference voltage unit) As for REG (2.5V), reference voltage (2.5V) stabilized better than supply voltage input to VCC terminal is supplied as an operation voltage of IC internal circuit, as well as output outside through VREF terminal. Insert a capacitor of 1uF to VREF terminal. As for REG (VCC-5V), voltage of VCC-5V is supplied as power supply (LDO) of driver circuit (DRV) of OUT terminal, as well as output outside through C5V terminal. Insert a capacitor of 1uF to VCC terminal of C5V terminal. 2) ERR Amp (error amplifier) In step-down application, inverting input INV of error amplifier detects output voltage by sending back feedback current from final output stage (on load side) of switching regulator. R1 and R2 connected to this input terminal are resistor for setting output voltage. Non-inverting input of amplifier is a reference input of error amplifier itself by adding reference voltage (1.0V) inside IC. Rf and Cf connected between FB, which is output from error amplifier, and INV are for feedback of error amplifier, and allows setting of loop gain. FB is connected to PWM Comp and supplied as non-inverting input. Setting of output voltage (Vo) is as follows: Vo = R1+R2 R2 1.0V Vo R1 1V ErrAmp 12 Rf R2 Cf 11 FB INV Fig.30 3) OSC (triangular wave oscillating unit) Generates triangular wave for inputting to PWM Comp. First, timing capacitor CCT connected between CT terminal and GND is charged by constant current (200 uA) generated inside IC. When CT voltage reaches 2.0 V typ, the comparator is switched, and then CCT is discharged by constant current (200 A). Then, when CT voltage reaches 1.5V, the comparator is switched again, and CCT is charged again. This repetition generates triangular wave. Oscillation frequency is determined by externally mounted CCT through theoretical formula below: Fosc ICT/(2CCTVosc) ICT : CT sink/source current 200 uA typ Vosc : Triangular wave amplifying voltage(Vt0-Vt100)0.50 V typ. Here, error from theoretical formula is caused by delay of internal circuit at a high frequency. See the graph in Fig 31 for setting. This triangular wave can be taken out through CT terminal. It is also possible to input the oscillator externally by switching to slave mode described later. Waveform input here in principle must be triangular wave of Vpeak = (1.5V 2.0V) equivalent to internal oscillation circuit. External input voltage range VCT : 1.4 V < VCT < 2.3 V Standard external CCT range CCT : MIN.47 pF - MAX.3000 pF 10000 Oscillation frequency (kHz) 1000 100 Ta=25 10 10 100 1000 10000 CT timing capacity (pF) Fig.31 www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 7/15 2009.05 - Rev.A BD9845FV 4) Soft start (soft start function) It is possible to provide SS terminal (13pin) with soft start function by connecting CSS as shown on the right. Soft start time TSS is shown by the formula below: Tss = Css Vinv Issso (Ex) When Css = 0.01 uF Tss = = 0.01x10 x1 2x10-6 5 [msec] R1 -6 Technical Note VREF 2uA SS Css 13 1Vtyp. 12 ErrAmp Css : SS terminal connection capacity Vinv : Error amplifier reference voltage (1V typ) Issso : SS source current (2uA typ) INV Fig.32 1 VREF In order to function soft start, time must be set longer enough than start time of power supply and STB. It is also possible to provide function of soft start by connecting the resistor (R1/R2) and capacitor (CDT) to DT terminal (14pin) as shown on the right. 14 DT CDT R2 Fig.33 5) PWM Comp - DEAD TIME (Pause period adjusting circuit - dead time) Dead time can be set by applying voltage dividing resistance between VREF and GND to DT terminal. PWM Comp compares the input dead time voltage (DT terminal voltage) and error voltage from Err Amp (FB terminal voltage) with triangular wave, and turns off and on the output. When dead time voltage < error voltage, duty of output is determined by dead time voltage. (When dead time setting is not used, pull up DT terminal to VREF terminal with resistor approx 10 k ohms.) Dead time voltage VDT in Fig 32 is shown by the formula below: VDT VREF R2 R1R2 2.4 2.2 2 VDT[V] 1.8 1.6 Vt0 Relation between VDT and Duty [See the graph on the right.] Duty 100% Duty 0% min typ max min typ max When f = 100kHz 1.9 2.0 2.1 1.4 1.5 1.6 When f = 1.5MHz 1.95 2.1 2.25 1.35 1.5 1.65 [Unit : V] Be careful when oscillation frequency is high, upper/lower limit of triangular wave (Vt100/Vt0) is shifted by delay time of comparator to directions expanding amplitude. Vt100 1.4 1.2 1 100 1000 fosc[KHz] 10000 6) OCP Comp (overcurrent detection circuit) This function provides protection by forcibly turning off the output when abnormal overcurrent flows due to shorting of output, etc. When voltage between terminal OCP+(8pin)/OCP-(9pin) monitoring the current with sense resistor exceeds overcurrent detection voltage (50 mV typ), it is determined as overcurrent condition, and switching operation is stopped immediately by setting OUT to "H" and DT,SS (and FB) to "L". It is automatically recovered when voltage between terminal OCP+/OCPis below overcurrent detection voltage. In addition, although hysteresis, etc. are not set here, minimum detection retention time (1.6ms typ) is set for suppressing the heating of FET, etc. (See the timing chart.) When the overcurrent detection circuit is not used, short-circuit both terminal OCP+/OCP- to VCC pin. Fig.34 Direction of current VIN OCP+ 8 Sense resistor OCP- 9 50mVtyp. OCP Comp Fig.35 www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 8/15 2009.05 - Rev.A BD9845FV 7) STB /SEL(Standby/Master/Slave function) Standby mode and normal mode can be switched by STB terminal (4pin). 1. When STB<0.5V, standby mode is set. Out put stop (OUT=H) and REG also stops. Circuit current is also Isc = 0 uA here. 2. When STB>3.0V, normal operation mode is set. All circuits operate. Use the controller normally in this range. Technical Note Master mode and slave mode can be switched by SEL terminal (10pin). 1. When SEL<0.5V, master mode is set. All circuits operate. 2. When SEL>0.5V, slave mode is set. Operation status is set , but OSC block alone is stopped, CT terminal is High-Z here, and triangular wave is not output.(PWM circuit and protection circuit perform the same operation as usual.) Therefore, if the controller is used in this more without using master IC, triangular wave is not emitted, operation is unstable, and normal output cannot be obtained. Be careful. OUT terminal permissible capacity [F] 8) OUT (Output: External FET gate drive) OUT terminal (6pin) is capable of directly driving the gate of external (PchMOS) FET. Amplitude of output is restricted between Vcc and C5V (Vcc-5V), and is not restricted by voltage resistance of gate by input voltage, which allows broad selection of FET. However, for precaution when selecting FET, there is a restriction that input capacity of gate is determined by current capability of C5V and permissible loss of IC, therefore refer to the permissible range in the graph on the right when determining FET. 1.E-07 Cout_max Cout_max (Vcc=10V) Cout_max (Vcc=20V) Cout_max (Vcc=30V) 1.E-08 1.E-09 Permissible range Fig.35 OUT Area below each line under each condition 1.E-10 100 1000 Switching f requency [kHz] 10000 Fig.36 9) Protection (other protection functions) This IC is equipped with low input malfunction prevention circuit (UVLO) and abnormal temperature protection circuit (TSD) in addition to overcurrent detection circuit (OCP). Low input malfunction prevention circuit is for preventing unstable output when input voltage is low. Three positions of Vcc (3.2V), VREF(2.35V), and C5V(Vcc-3V) are monitored, and output is made only when all are canceled. (See the timing chart.) Abnormal temperature protection circuit is for protecting IC chip from destruction for preventing runaway when abnormal heating is caused on IC exceeding rated temperature. (It does not operate normally.) Apply a design with full margin allowed for heating in consideration of permissible loss. www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 9/15 2009.05 - Rev.A BD9845FV Timing chart Starting characteristics (UVLO cancel) and standby operation VCC Technical Note (1) UVLO (Vcc) is canceled when Vcc>3.2V. Vcc3.2VUVLO(Vcc) STB 1.8Vtyp. 0.9Vtyp. VREF VREF VREF (2) UVLO (VREF) is canceled when VREF>2.2V. VREF2.2VUVLO(VREF) SS UVLO (TSD) Minimum retention time (0.2 ms) UVLO(TSD)(0.2msec) 1V Set SS by external capacity. SS Although SS is notated by the same time axis in the figure for showing the image, actually set sufficiently longer time in comparison with the cycle of triangular wave. UVLO VccVREFC5V UVLO VccVREFC5VUVLO DT FB CT UVLO UVLO UVLO voltage [unit: V] Item Threshold voltage (VCC) Hysteresis CT: :UVLOVREF CT Pull-up to VREF during UVLO period DT: Pull-down during UVLO DTUVLO Min 3.0 2.0 - Typ 3.2 0.15 2.2 3.0 Max 3.4 0.25 2.4 3.4 OUT C5V When UVLO (Vcc , and VREF) is UVLO(Vcc,VREF) canceled, (Vcc - 5V) Reg is started. (Vcc-5V)Reg Vcc Vcc-5V FBUVLO FB: Pull-down during UVLO OUT Threshold voltage (VREF) Threshold voltage (C5V) C5V (3) UVLO (C5V) is canceled when C5V OCP+ OCPVcc Vocpth Overcurrent detection Overcurrent detection Overcurrent detection Delay time in detection tdocpth OCPOCP+ DT FB CT FB Minimum time retaining detection condition tdocpre tdocpre 1.6mS 1.6mS DT SS DT"L" SS"L" (FB"L") Open DT (FB) and SS. DT(FB)SS OUT C5V Vcc Vcc-5V OUT C5V www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 10/15 2009.05 - Rev.A BD9845FV Example of application circuit Technical Note Vin VCC VCC STB VREF VREF VREF VCC-5V VCC 5VREG C5V CT INV VREF OSC UVLO TSD VCC SS + ERR + + PWM + VCC OCP2 DRV OUT Vo (Step-down) VCC-5V FB DT OCP VCC-5V + OCP+ OCP- GND Fig.37 1) Setting of output unit coil (L) and capacitor (Co) Set the coil and capacitor as follows in step-down application: Delta IL: Ripple current of coil Normally set Delta IL below 30% of the maximum output current (Iomax). When L-value is made greater, ripple current (Delta IL) becomes smaller. In general, the greater the L-value is, the smaller the permissible current of coil gets, and when the current exceeds permissible current, the coil is saturated and L-value changes. Contact the coil manufacturer and check permissible current. The relation above is established. Ripple component by output capacitor is small enough to be neglected in comparison with ripple component by ESR in many cases. As for Co value, it is recommended to use a sufficiently large capacitor with a capacity that satisfies ESR condition. www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 11/15 2009.05 - Rev.A BD9845FV 2) Example of overcurrent protection circuit Insert a sense resistor between the source and VIN of output Pch-FET for detecting overcurrent as shown in the figure. Refer to the formula below for determining a sense resistor and select permissible loss ensuring a margin. 8 Technical Note VIN OCP+ R1 C4 Rsense Vocpth Iocp Vocpth : Overcurrent detection voltage (50 mV typ) Iocp : Overcurrent detection setting current Vocpth=50mV OCPOCP comp 9 C1 R2 Sense resistor C3 Iocp is a peak current Isw (peak) here, and the amperage for output load is an overcurrent setting amperage minus ripple current component (Delta IL/2), etc. (See the formula on P10.) There is a time delay approx 200ns from detection until stop of output is made (pulse of approx 100 ns causes delay time but detection is made), and an error may be caused from the value above. In addition, input to overcurrent detection unit is such a sensitive circuit, and wrong detection by noise may be possible. When wrong detection occurs, try to eliminate noise by the resistor R1 and R2 or capacitance C1, C2, C3, and C4 shown above. 3) Example of output ON/OFF control circuit When stopping the whole circuit, set STB terminal to "Low (STB<0.5V) to stop switching and reduce power consumption of IC to 0 microA (typ). Also when switching ON and OFF for each channel, control is fixed to OFF by setting DT terminal of desired channel to "Low (DT<1.25V)". This control is independent for each channel, and when DT="L", SS terminal and FB terminal are also discharged, and soft start is enabled in restarting. VREF C2 OUT 6 Fig.38 D T 14 To OUT for each Ch Each Ch control signal SS 13 DTcomp 1.25Vtyp. Digital transistor, etc. Fig.39 4) Example of master/slave (sync multi-ch output) operation circuit This IC is set to slave mode by setting the input of STB terminal at 2.5V0.1V, and multi-channel output is enabled with frequency synchronized. (Fig.40) However, CT terminal has high impedance in slave mode status, and triangular wave is generated by CT waveform of master mode IC. Therefore the example of master slave circuit below is recommended when starting and stopping in order to avoid malfunction by start/stop timing of master IC and slave IC. As for output, it is recommended to control ON/OFF reliably with DT terminal. Also, oscillation frequency is determined by capacitor (CCT) CT CT Master STB connected to CT. When the slave IC is large in number as Master IC STB Common Slave IC IC IC xN well as oscillation frequency is high, parasitic capacity by STB STB board wiring in contact with CT cannot be ignored, and preset Input a signal of high voltage frequency may be drifted. Be careful. 2.5V synchronized with master. High2.5V Example of master/slave circuit configuration is shown below. If any other configuration is to be applied, inform our Fig.40 personnel in charge. CT Master IC SEL Stand-by ON/OFF CCT CT Slave IC SEL 0.1uF 10k VREF VREF 0.1uF 10k STB DT STB DT Ch ON/OFF control Ch ON/OFF control DTC114Y DTC114Y Fig 41. Example of master/slave www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 12/15 2009.05 - Rev.A BD9845FV Technical Note 5) About board layout In order to make full use of IC performance, fully investigate the items below in addition to general precautions. Each output of OCP+/OCP- is such a sensitive circuit. When wiring is routed around, it is easily subjected to noise. Try to make the wiring as short as possible. Switching of large current is likely to generate noise. Try to make the large current route (VIN, Rsense, FET, L, Di, and Cout) as thick and short as possible, and try to apply one-point grounding for GND. OUT terminal is also a switching line, and it must be wired along a distance as short as possible. (When multi-layer board is used, shielding by intermediate layer also seems to be effective.) CCT and CVREF are reference of all, and must be wired along the shortest distance to GND of IC stabilized to be protected against external influence. Also be careful not to allow common impedance to sense family GND. 6) PIN processing of channel unused VREF VREF VCC VCC VREF DT SS INV FB OCP- OCP+ VCC OUT 1 14 13 12 11 9 8 7 6 Fig.43 When only one channel is used, process unused channels as shown above. I/O equivalent circuit diagram 2pin(CT) VREF VREF VREF VREF VREF 14pin (DT) VREF VREF 13pin (SS) VREF VREF VCC CT DT SS VREF 12pin (INV) VREF VREF 11pin (FB) VREF VREF 9pin (OCP-) VCC VCC INV FB OCP- C5V C5V 5pin (C5V) VCC VCC VCC VCC 6pin (OUT) VCC VCC 8pin (OCP+) VCC VCC OUT OCP+ C5V C5V C5V C5V C5V 4pin (STB) VCC 10pin (SEL) VCC 1pin (VREF) VCC VCC 3pin (GND) , 7pin (VCC) VCC STB SEL VREF GND www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 13/15 2009.05 - Rev.A BD9845FV Technical Note Notes for use 1) About maximum absolute rating When the maximum absolute rating of application voltage or operation voltage range is exceeded, it may lead to deterioration or rupture. It is impossible to forecast rupture in short mode or open mode. When a special mode is expected exceeding the maximum absolute rating, try to take a physical safety measure such as a fuse. 2) GND potential Ensure that the potential of GND terminal is the minimum in any operation condition. Also ensure that no terminal except GND terminal has a voltage below GND voltage including actual transient phenomenon. 3) Thermal design Allow a sufficient margin in thermal design in consideration of permissible loss (Pd) in actual use condition. 4) Shorting between terminals and wrong attachment When attaching an IC to a set board, pay full attention to the direction of IC and dislocation. Wrong attachment may cause rupture of IC. In addition, when shorting is caused by foreign substance placed between outputs or between output and power supply-GND, rupture is also possible. 5) Operation in intense magnetic field Use in intense magnetic field may result in malfunction. Be careful. 6) Inspection on set board In inspection on set board, when a capacitor is connected to a terminal with low impedance, stress may be applied to IC, therefore be sure to discharge electricity in each process. Apply grounding to assembling process for a measure against static electricity, and take enough care in transport and storage. When connecting a jig in inspection process, be sure to turn off power before detaching IC. 7) About IC terminal input + This IC is a monolithic IC, and contains P isolation and P board for separating elements between each element. This P-layer and N-layer of each element form P-N junction, and many kinds of parasitic elements are constituted. (See Fig 43.) For example, when resistor and transistor are connected with a terminal as shown below. P-N junction operates as a parasitic diode when GND>(Terminal A) for resistor, and when GND>(Terminal B) for transistor (NPN). In addition, when GND>(Terminal B) for transistor (NPN), parasitic NPN transistor is operated by N-layer of some other elements in the vicinity of parasitic diode mentioned above. Parasitic element is inevitably generated by potential because of IC structure. Operation of parasitic element causes interference with circuit operation, and may lead to malfunction, and also may cause rupture. Therefore when applying a voltage lower than GND (P board) to I/O terminal, pay full attention to usage so that parasitic elements do not operate. Resistor (Terminal A) NPN) Transistor (NPN) B E (Terminal B B) C GND P P board P P Parasitic element Parasitic element (Terminal B) P board GND GND (Terminal A) A) element Parasitic GND Another element in the vicinity GND Parasitic element Fig.44 www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 14/15 2009.05 - Rev.A BD9845FV Ordering part number Technical Note B D 9 Part No. 9845 8 4 5 F V - E 2 Part No. Package FV : SSOP-B14 Packaging and forming specification E2: Embossed tape and reel (SSOP-B14) SSOP-B14 5.0 0.2 14 8 Tape Quantity 0.3Min. Embossed carrier tape 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold 6.4 0.3 4.4 0.2 Direction of feed ( reel on the left hand and you pull out the tape on the right hand ) 1 7 0.15 0.1 1.15 0.1 0.10 0.65 0.1 0.22 0.1 1pin (Unit : mm) Direction of feed Reel Order quantity needs to be multiple of the minimum quantity. www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 15/15 2009.05 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. R0039A |
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