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 3.3 V Dual-Loop, 50 Mbps to 3.3 Gbps Laser Diode Driver ADN2872
FEATURES
SFP/SFF and SFF-8472 MSA compliant SFP reference design available Any rate from 50 Mbps to 3.3 Gbps operation Dual-loop control of average power and extinction ratio Typical rise/fall time: 60 ps Bias current range: 2 mA to 100 mA Modulation current range: 5 mA to 90 mA Laser FAIL alarm and automatic laser shutdown (ALS) Bias and modulation current monitoring 3.3 V operation 4 mm x 4 mm LFCSP Voltage setpoint control Resistor setpoint control
GENERAL DESCRIPTION
Like the ADN2870, the ADN28721 laser diode driver is designed for advanced SFP and SFF modules, using SFF-8472 digital diagnostics. The device features dual-loop control of the average power and extinction ratio, which automatically compensates for variations in laser characteristics over temperature and aging. The laser needs only be calibrated at 25C, eliminating the need for expensive and time consuming temperature calibration. The ADN2872 supports single-rate operation from 50 Mbps to 3.3 Gbps, or multirate operation from 155 Mbps to 3.3 Gbps. With a new alarm scheme, this device avoids the shutdown issue caused by the system transient generated from various lasers. The average power and extinction ratio can be set with a voltage provided by a microcontroller DAC or by a trimmable resistor. The part provides both bias and modulation current monitoring, as well as fail alarms and automatic laser shutdown. The ADN2872, a SFF-/SFP-compliant laser diode driver, can work with the Analog Devices, Inc., ADuC7019/ADuC702x MicroConverter(R) family and the ADN289x limiting amplifier family, to form a complete SFP/SFF transceiver solution. The ADN2872 is available in a space-saving 4 mm x 4 mm LFCSP specified over the -40C to +85C temperature range. Figure 1 shows an application diagram with a microcontroller interface.
1
APPLICATIONS
Multirate OC3 to OC48-FEC SFP/SFF modules 1x/2x/4x Fibre Channel SFP/SFF modules LX-4 modules DWDM/CWDM SFP modules 1GE SFP/SFF transceiver modules
Protected by U.S. Patent 6,414,974.
APPLICATIONS DIAGRAM
VCC VCC Tx_FAULT Tx_FAIL VCC MPD FAIL ALS IMODN VCC VCC L R IMODP DATAP ANALOG DEVICES MICROCONTROLLER DAC ADC PAVSET IMOD PAVREF CONTROL RPAV 1k GND ERREF IBIAS CCBIAS IBIAS 100 VCC RZ DATAN LASER
DAC
ADN2872
1k GND VCC GND GND 1k GND 470 GND GND
08013-001
ERSET IBMON IMMON PAVCAP ERCAP
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2009 Analog Devices, Inc. All rights reserved.
ADN2872 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Applications Diagram ...................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 SFP Timing Specifications........................................................... 4 Absolute Maximum Ratings............................................................ 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ............................................. 7 Optical Waveforms ........................................................................... 9 Theory of Operation ...................................................................... 10 Dual-Loop Control..................................................................... 10 Control ......................................................................................... 11 Voltage Setpoint Calibration ..................................................... 11 Resistor Setpoint Calibration .................................................... 13 IMPD Monitoring .......................................................................... 13 Loop Bandwidth Selection ........................................................ 14 Power Consumption .................................................................. 14 Automatic Laser Shutdown (Tx_Disable)............................... 14 Bias and Modulation Monitor Currents.................................. 14 IBIAS Pin ..................................................................................... 14 Data Inputs .................................................................................. 15 Laser Diode Interfacing ............................................................. 15 Alarms.......................................................................................... 16 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 17
REVISION HISTORY
3/09--Revision 0: Initial Version
Rev. 0 | Page 2 of 20
ADN2872 SPECIFICATIONS
VCC = 3.0 V to 3.6 V. All specifications TMIN to TMAX, unless otherwise noted.1 Typical values as specified at 25C. Table 1.
Parameter LASER BIAS CURRENT (IBIAS) Output Current, IBIAS Compliance Voltage IBIAS when ALS High CCBIAS Compliance Voltage MODULATION CURRENT (IMODP, IMODN)2 Output Current, IMOD Compliance Voltage IMOD when ALS High Rise Time2, 3 Fall Time2, 3 Random Jitter2, 3 Deterministic Jitter2, 3 Pulse Width Distortion2, 3 AVERAGE POWER SET (PAVSET) Pin Capacitance Voltage Photodiode Monitor Current (Average Current) EXTINCTION RATIO SET INPUT (ERSET) Resistance Range Voltage AVERAGE POWER REFERENCE VOLTAGE INPUT (PAVREF) Voltage Range Photodiode Monitor Current (Average Current) EXTINCTION RATIO REFERENCE VOLTAGE INPUT (ERREF) Voltage Range DATA INPUTS (DATAP, DATAN)4 Input Voltage Swing (Differential) Input Impedance (Single-Ended) LOGIC INPUTS (ALS) VIH VIL ALARM OUTPUT (FAIL)5 VOFF VON IBMON, IMMON DIVISION RATIO IBIAS/IBMON3 IBIAS/IBMON3 IBIAS/IBMON Stability3, 6 IMOD/IMMON IBMON Compliance Voltage Min 2 1.2 1.2 5 1.5 60 60 0.8 90 VCC 0.05 104 96 1.1 35 30 80 1.35 1200 25 1.35 1 1000 1 2.4 50 2 0.8 >1.8 <1.3 Typ Max 100 VCC 0.2 Unit mA V mA V mA V mA ps ps ps rms ps ps pF V A k V V A V V p-p V V V V Voltage required at FAIL for IBIAS and IMOD to turn off when FAIL asserted Voltage required at FAIL for IBIAS and IMOD to stay on when FAIL asserted 11 mA < IBIAS < 50 mA 50 mA < IBIAS < 100 mA 10 mA < IBIAS < 100 mA Conditions/Comments
20 mA < IMOD < 90 mA 20 mA < IMOD < 90 mA
1.1 50 1.2 1.1 0.12 120 0.1 0.4
1.2
Resistor setpoint mode Resistor setpoint mode Resistor setpoint mode Voltage setpoint mode (RPAV fixed at 1 k) Voltage setpoint mode (RPAV fixed at 1 k) Voltage setpoint mode (RERSET fixed at 1 k) AC-coupled
1.2
85 92
100 100 50
115 108 5 1.3
0
A/A A/A % A/A V
Rev. 0 | Page 3 of 20
ADN2872
Parameter SUPPLY ICC7 VCC (with respect to GND)8
1 2
Min
Typ 30 3.3
Max
Unit mA V
Conditions/Comments When IBIAS = IMOD = 0
3.0
3.6
Temperature range: -40C to +85C. Measured into a 15 load (22 resistor in parallel with digital scope 50 input) using a 11110000 pattern at 2.5 Gbps, shown in Figure 2. 3 Guaranteed by design and characterization. Not production tested. 4 When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows into the IMODP pin. 5 Guaranteed by design. Not production tested. 6 IBIAS/IBMON ratio stability is defined in SFF-8472 Revision 9 over temperature and supply variation. 7 See the Power Consumption section for ICC minimum for power calculation. 8 All VCC pins should be shorted together.
VCC VCC L C BIAS TEE 80kHz 27GHz
ADN2872
IMODP
R 22
Figure 2. High Speed Electrical Test Output Circuit
SFP TIMING SPECIFICATIONS
Table 2.
Parameter ALS Assert Time ALS Negate Time1 Time to Initialize, Including Reset of FAIL1 FAIL Assert Time ALS to Reset Time
1
Symbol t_off t_on t_init t_fault t_reset
Min
Typ 1 0.83 25
Max 5 0.95 275 100 5
Unit s ms ms s s
Conditions/Comments Time for the rising edge of ALS (Tx_DISABLE) to when the bias current falls below 10% of nominal Time for the falling edge of ALS to when the modulation current rises above 90% of nominal From power-on or negation of FAIL using ALS Time to fault to FAIL on Time Tx_DISABLE must be held high to reset Tx_FAULT
Guaranteed by design and characterization. Not production tested.
VSE DATAP DATAN
SFP MODULE
1H VCC_Tx 0.1F 0.1F 10F
08013-003
08013-034
TO HIGH SPEED DIGITAL OSCILLOSCOPE 50 INPUT
3.3V
DATAP - DATAN 0V
08013-002
Vp-p, DIFF = 2 x VSE
SFP HOST BOARD
Figure 4. Recommended SFP Supply
Figure 3. Signal Level Definition
Rev. 0 | Page 4 of 20
ADN2872 ABSOLUTE MAXIMUM RATINGS
TA = 25C, unless otherwise noted. Table 3.
Parameter VCC to GND IMODN, IMODP PAVCAP, ERCAP, PAVSET, PAVREF, ERREF, IBIAS, IBMON, IMMON, ALS, CCBIAS, RPAV, ERSET, FAIL DATAP, DATAN (Single-Ended Differential) Junction Temperature (TJ max) Operating Temperature Range, Industrial Storage Temperature Range Power Dissipation (W)1 JA Thermal Impedance2 JC Thermal Impedance2 JB Thermal Impedance2
1
Rating 4. 2 V -0.3 V to +4.8 V -0.3 V to +3.9 V
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
1.5 V 125C -40C to +85C -65C to +150C (TJ max - TA)/JA 48.6C/W 5.0C/W 28.4C/W
ESD CAUTION
Power consumption equations are provided in the Power Consumption section. 2 JA, JB, and JC are estimated when the part's exposed pad is soldered on a 4-layer JEDEC board at zero airflow.
Rev. 0 | Page 5 of 20
ADN2872 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IMODN IMODP IBIAS GND
24 1
GND ALS
VCC
19 18
CCBIAS PAVSET GND VCC PAVREF RPAV
6 7
FAIL IBMON
ADN2872
TOP VIEW (Not to Scale)
VCC ERREF IMMON ERSET
13
GND
ERCAP
Figure 5. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 (EPAD) Mnemonic CCBIAS PAVSET GND VCC PAVREF RPAV ERCAP PAVCAP GND DATAP DATAN ALS ERSET IMMON ERREF VCC IBMON FAIL GND VCC IMODP IMODN GND IBIAS Exposed Paddle (EPAD) Description Control Output Current. Average Optical Power Set Pin. Supply Ground. Supply Voltage. Reference Voltage Input for Average Optical Power Control. Average Power Resistor when Using PAVREF. Extinction Ratio Loop Capacitor. Average Power Loop Capacitor. Supply Ground. Data, Positive Differential Input. Data, Negative Differential Input. Automatic Laser Shutdown. Extinction Ratio Set Pin. Modulation Current Monitor Current Source. Reference Voltage Input for Extinction Ratio Control. Supply Voltage. Bias Current Monitor Current Source. FAIL Alarm Output. Supply Ground. Supply Voltage. Modulation Current Positive Output (Current Sink), Connect to Laser Diode. Modulation Current Negative Output (Current Sink). Supply Ground. Laser Diode Bias (Current Sink to Ground). The LFCSP package has an exposed paddle that must be connected to ground.
Rev. 0 | Page 6 of 20
08013-004
NOTES 1. THE LFCSP PACKAGE HAS AN EXPOSED PADDLE THAT MUST BE CONNECTED TO GROUND.
PAVCAP
DATAN
DATAP
12
ADN2872 TYPICAL PERFORMANCE CHARACTERISTICS
90
1.2 1.0
60
RISE TIME (ps)
JITTER (rms)
0.8
0.6
30
0.4
0.2
08013-022
08013-037
0 0 20 40 60 80 MODULATION CURRENT (mA)
0 0 20 40 60 80 MODULATION CURRENT (mA)
100
100
Figure 6. Rise Time vs. Modulation Current, IBIAS = 20 mA
80
Figure 9. Random Jitter vs. Modulation Current, IBIAS = 20 mA
250
220
TOTAL SUPPLY CURRENT (mA)
60
FALL TIME (ps)
IBIAS = 80mA 190 160 IBIAS = 40mA
40
130 IBIAS = 20mA 100 70
20
08013-025
0 0 20 40 60 80 MODULATION CURRENT (mA)
40 0 20 40 60 80 MODULATION CURRENT (mA)
100
100
Figure 7. Fall Time vs. Modulation Current, IBIAS = 20 mA
45 40
Figure 10. Total Supply Current vs. Modulation Current, Total Supply Current = ICC + IBIAS + IMOD
60 55 50 45 40 35 30
08013-027
DETERMINISTIC JITTER (ps)
35 30 25 20 15 10 5 0 20
08013-042
SUPPLY CURRENT (mA)
25 20 -50
40 60 80 MODULATION CURRENT (mA)
100
-30
-10
10
30
50
70
90
110
TEMPERATURE (C)
Figure 8. Deterministic Jitter vs. Modulation Current, IBIAS = 20 mA
Figure 11. Supply Current (ICC) vs. Temperature with ALS Asserted, IBIAS = 20 mA
Rev. 0 | Page 7 of 20
08013-038
ADN2872
120 115 110
60 58 56 54
IBIAS/IBMON GAIN
105 100 95 90
IMOD/IMMON GAIN
52 50 48 46 44
08013-028
42 40 -50 -30 -10 10 30 50 70 90
80 -50
-30
-10
10
30
50
70
90
110
110
TEMPERATURE (C)
TEMPERATURE (C)
Figure 12. IBIAS/IBMON Gain vs. Temperature, IBIAS = 20 mA
Figure 15. IMOD/IMMON Gain vs. Temperature, IMOD = 30 mA
OC48 PRBS31 DATA TRANSMISSION
t_OFF LESS THAN 1s
FAIL ASSERTED
FAULT FORCED ON PAVSET ALS
08013-029 08013-045
Figure 13. ALS Assert Time, 5 s/DIV
Figure 16. FAIL Assert Time,1 s/DIV
OC48 PRBS31 DATA TRANSMISSION
TRANSMISSION ON
t_ON
ALS
POWER SUPPLY TURN ON
08013-032 08013-046
Figure 14. ALS Negate Time, 200 s/DIV
Figure 17. Time to Initialize, Including Reset, 40 ms/DIV
Rev. 0 | Page 8 of 20
08013-031
85
ADN2872 OPTICAL WAVEFORMS
VCC = 3.3 V and TA = 25C, unless otherwise noted. Note that there was no change to PAVCAP and ERCAP values when different data rates were tested. Figure 18, Figure 19, and Figure 20 show multirate performance using the low cost Fabry Perot TOSA NEC NX7315UA; Figure 21 and Figure 22 show dual-loop performance over temperature using the DFB TOSA Sumitomo SLT2486.
(ACQ LIMIT TEST) WAVEFORMS 1000 (ACQ LIMIT TEST) WAVEFORMS 1001
08013-016
Figure 18. Optical Eye 2.488 Gbps, 65 ps/DIV, PRBS 231 - 1, PAV = -4.5 dBm, ER = 9 dB, Mask Margin 25%
(ACQ LIMIT TEST) WAVEFORMS 1000
Figure 21. Optical Eye 2.488 Gbps, 65 ps/DIV, PRBS 231 - 1, PAV = 0 dBm, ER = 9 dB, Mask Margin 22%, TA = 25C
(ACQ LIMIT TEST) WAVEFORMS 1001
08013-017
Figure 19. Optical Eye 622 Mbps, 264 ps/DIV, PRBS 231 - 1, PAV = -4.5 dBm, ER = 9 dB, Mask Margin 50%
(ACQ LIMIT TEST) WAVEFORMS 1000
Figure 22. Optical Eye 2.488 Gbps, 65 ps/DIV, PRBS 231 - 1, PAV = -0.2 dBm, ER = 8.96 dB, Mask Margin 21%, TA = 85C
Figure 20. Optical Eye 155 Mbps,1.078 ns/DIV, PRBS 231 - 1, PAV = -4.5 dBm, ER = 9 dB, Mask Margin 50%
08013-020
Rev. 0 | Page 9 of 20
08013-048
08013-047
ADN2872 THEORY OF OPERATION
Laser diodes have a current-in to light-out transfer function, as shown in Figure 23. Two key characteristics of this transfer function are the threshold current, ITH, and slope in the linear region beyond the threshold current, referred to as slope efficiency, LI.
P1 P0 P1 + P0 PAV = 2 ER =
ERSET PAVSET MOD SHA MPD INPUT Gm OPTICAL COUPLING BIAS SHA
1
2
IEX
1.2V VBGAP IPA
BIAS CURRENT
VCC
HIGH SPEED SWITCH
OPTICAL POWER
P1
2
08013-039
PAV I
P P I
08013-005
2
LI =
MOD CURRENT 100
2
Figure 24. Dual-Loop Control of Average Power and Extinction Ratio
P0 ITH CURRENT
Figure 23. Laser Transfer Function
DUAL-LOOP CONTROL
Typically, laser threshold current and slope efficiency are both functions of temperature. For FP and DFB type lasers, the threshold current increases and the slope efficiency decreases with increasing temperature. In addition, these parameters vary as the laser ages. To maintain a constant optical average power and a constant optical extinction ratio over temperature and laser lifetime, it is necessary to vary the applied electrical bias current and modulation current to compensate for the laser changing LI characteristics. Single-loop compensation schemes use the average monitor photodiode (MPD) current to measure and maintain the average optical output power over temperature and laser aging. The ADN2872 is a dual-loop device, implementing both this primary average power control loop and a secondary control loop, which maintains a constant optical extinction ratio. The dual-loop control of the average power and extinction ratio implemented in the ADN2872 can be used successfully with both lasers that maintain good linearity of LI transfer characteristics over temperature, and with those that exhibit increasing nonlinearity of the LI characteristics over temperature.
A dual loop is made up of an average power control loop (APCL) and the extinction ratio control loop (ERCL), which are separated into two time states. During Time 1, the APC loop is operating, and during Time 2, the ER loop is operating.
Average Power Control Loop
The APCL compensates for changes in the laser diode (LD), ITH and LI, by varying IBIAS. APC control is performed by measuring the MPD current, IMPD. This current is bandwidth limited by the MPD. This is not a problem because the APCL must be low frequency and the APCL must respond to the average current from the MPD. The APCL compares IMPD x RPAVSET to the BGAP voltage, VBGAP. If IMPD falls, the bias current is increased until IMPD x RPAVSET equals VBGAP. Conversely, if the IMPD increases, IBIAS is decreased.
Modulation Control Loop
The ERCL measures the slope efficiency, LI, of the laser diode by monitoring the IMPD changes. During the ERCL, IMPD is temporarily increased by IMOD. The ratio between IMPD and IMOD is a fixed ratio of 50:1, but during startup, this ratio is increased to decrease settling time. During ERCL, switching in IMOD causes a temporary increase in average optical power, PAV. However, the APC loop is disabled during ERCL, and the increase is kept small enough so as not to disturb the optical eye. When IMOD is switched into the laser circuit, an equal current, IEX, is switched into the PAVSET resistor. The user sets the value of IEX; this is the ERSET setpoint. If IMPD is too small, the control loop knows that LI has decreased, and increases IMPD and, therefore, IMOD accordingly until IMPD is equal to IEX. The previous control cycle status of the IBIAS and IMOD settings are stored on the hold capacitors, PAVCAP and ERCAP. The ERCL is constantly measuring the actual LI curve; it compensates for the effects of temperature and for changes in the LI curve due to laser aging. Therefore, the laser can be calibrated once at 25C so that it can then automatically control the laser over temperature. This eliminates the expensive and time consuming temperature calibration of a laser.
Dual Loop
The ADN2872 uses a proprietary patented method to control both average power and extinction ratio. The ADN2872 is constantly sending a test signal on the modulation current signal and reading the resulting change in the MPD current as a means of detecting the slope of the laser in real time. This information is used in a servo to control the ER of the laser, which is done in a time-multiplexed manner at a low frequency, typically 80 Hz. Figure 24 shows the dual-loop control implementation on the ADN2872.
Rev. 0 | Page 10 of 20
ADN2872
Operation with Lasers with Temperature-Dependent Nonlinearity of Laser LI Curve
The ADN2872 ERCL extracts information from the monitor photodiode signal relating to the slope of the LI characteristics at the Optical 1 level (P1). For lasers with good linearity over temperature, the slope measured by the ADN2872 at the Optical 1 level is representative of the slope anywhere on the LI curve. This slope information is used to set the required modulation current to achieve the required optical extinction ratio.
4.0 RELATIVELY LINEAR LI CURVE AT 25C 3.5 3.0 2.5 2.0 1.5 1.0
08013-008
the laser and apply the feedback. This scheme is particularly suitable for circuits that already use a microcontroller for control and digital diagnostic monitoring. The ER correction scheme, while using the average nonlinearity for the laser population, supplies a corrective measurement based on the actual performance of each laser as measured during operation. The ER correction scheme corrects for errors due to laser nonlinearity while the dual loop continues to adjust for changes in the Laser LI. For more details on maintaining average optical power and extinction ratio over temperature when working with lasers displaying a temperature-dependent nonlinearity of LI curve, contact sales at Analog Devices.
OPTICAL POWER (mW)
CONTROL
The ADN2872 has two methods for setting the average power (PAV) and extinction ratio (ER). The average power and extinction ratio can be voltage set using the voltage DAC outputs of a microcontroller to provide controlled reference voltages to PAVREF and ERREF. Alternatively, the average power and extinction ratio can be resistor set using potentiometers at the PAVSET and ERSET pins, respectively.
0.5 0 0 20 40
NONLINEAR LI CURVE AT 80C
60
80
100
CURRENT (mA)
Figure 25. Measurement of a Laser LI Curve Showing Laser Nonlinearity at High Temperatures
VOLTAGE SETPOINT CALIBRATION
The ADN2872 allows an interface to a microcontroller for both control and monitoring (see Figure 26). The average power at the PAVSET pin and extinction ratio at the ERSET pin can be set using the DAC of the microcontroller to provide controlled reference voltages to PAVREF and ERREF. Note that during power-up, there is an internal sequence that allows 25 ms before enabling the alarms; therefore, the user must ensure that the voltage for PAVREF and ERREF are active within 20 ms. PAVREF = PAV x RSP x RPAV
ERREF RERSET I MPD _ CW PCW ER 1 PAV ER 1
Some types of lasers have LI curves that become progressively more nonlinear with increasing temperature (see Figure 25). At temperatures where the LI curve shows significant nonlinearity, the LI curve slope measured by the ADN2872 at the Optical 1 level is no longer representative of the overall LI curve. It is evident that applying a modulation current based on this slope information cannot maintain a constant extinction ratio over temperature. However, the ADN2872 can be configured to maintain near constant optical bias and an extinction ratio with a laser exhibiting a monotonic temperature-dependent nonlinearity. To implement this correction, it is necessary to characterize a small sample of lasers for their typical nonlinearity by measuring them at two temperature points, typically 25C and 85C. The measured nonlinearity is used to determine the amount of feedback to apply. Typically, the user must characterize five to 10 lasers of a particular model to obtain a good number. The product can then be calibrated at 25C only, avoiding the expense of temperature calibration. Typically, the microcontroller is used to measure
(V) (V)
where: PAV (mW) is the average power required. ER is the desired extinction ratio (ER = P1/P0). RSP (A/W) is the monitor photodiode responsivity. IMPD_CW (mA) is the MPD current at that specified PCW. PCW (mW) is the dc optical power specified on the laser data sheet. In voltage setpoint, RPAV and RERSET must be 1 k resistors with a 1% tolerance and a temperature coefficient of 50 ppm/C.
Rev. 0 | Page 11 of 20
ADN2872
VCC VCC VCC VCC L VCC MPD FAIL ALS IMODN R IMODP DATAP ANALOG DEVICES MICROCONTROLLER DAC ADC 1k DAC GND ERREF PAVSET IMOD PAVREF CONTROL RPAV IBIAS CCBIAS IBIAS 100 VCC RZ DATAN LASER Tx_FAULT Tx_FAIL
ADN2872
1k ERSET GND IBMON VCC GND GND 1k GND 470 GND GND
08013-009
IMMON
PAVCAP
ERCAP
Figure 26. ADN2872 Using MicroConverter Calibration and Monitoring
VCC
VCC
VCC L VCC LASER
FAIL VCC MPD RPAV VCC PAVREF
ALS
IMODN
R IMODP
DATAP DATAN VCC IBIAS IBIAS RZ
IMOD PAVSET GND CONTROL
100
CCBIAS ERSET GND VCC ERREF IBMON VCC GND 1k GND IMMON 470 GND PAVCAP GND ERCAP GND
ADN2872
Figure 27. ADN2872 Using Resistor Setpoint Calibration of Average Power and Energy Ratio
Rev. 0 | Page 12 of 20
08013-010
ADN2872
RESISTOR SETPOINT CALIBRATION
In resistor setpoint calibration, the PAVREF, ERREF, and RPAV pins must all be tied to VCC. Average power and extinction ratio can be set using the PAVSET and ERSET pins, respectively. A resistor is placed between the pin and GND to set the current flowing in each pin, as shown in Figure 27. The ADN2872 ensures that both PAVSET and ERSET are kept 1.2 V above GND. The PAVSET and ERSET resistors are given by:
RPAVSET 1.23 V PAV RSP
Method 2: Measuring IMPD Across a Sense Resistor
The second method has the advantage of providing a valid IMPD reading at all times but has the disadvantage of requiring a differential measurement across a sense resistor directly in series with the IMPD. As shown in Figure 29, a small resistor, Rx, is placed in series with the IMPD. If the laser used in the design has a pinout where the monitor photodiode cathode and the lasers anode are not connected, a sense resistor can be placed in series with the photodiode cathode and VCC, as shown in Figure 30. When choosing the value of the resistor, the user must take into account the expected IMPD value in normal operation. The resistor must be large enough to make a significant signal for the buffered ADC to read, but small enough not to cause a significant voltage reduction across the IMPD. The voltage across the sense resistor should not exceed 250 mV when the laser is in normal operation. It is recommended that a 10 pF capacitor be placed in parallel with the sense resistor.
VCC
() ()
RERSET
1.23 V I MPD _ CW ER 1 P P CW ER 1 AV
where: PAV (mW) is the average power required. RSP (A/W) is the monitor photodiode responsivity. PCW (mW) is the dc optical power specified on the laser data sheet. IMPD_CW (mA) is the MPD current at that specified PCW. ER is the desired extinction ratio (ER = P1/P0).
PHOTODIODE
LD
IMPD MONITORING
IMPD monitoring can be implemented for voltage setpoint and resistor setpoint as follows.
MICROCONVERTER ADC DIFFERENTIAL INPUT
Rx 200
10pF
PAVSET
ADN2872
In voltage setpoint calibration, the following methods can be used for IMPD monitoring.
Figure 29. Differential Measurement of IMPD Across a Sense Resistor
VCC VCC
Method 1: Measuring Voltage at RPAV
The IMPD current is equal to the voltage at RPAV divided by the value of RPAV (see Figure 28) as long as the laser is on and is being controlled by the control loop. This method does not provide a valid IMPD reading when the laser is in shutdown or fail mode. A microconverter-buffered ADC input can be connected to RPAV to make this measurement. No decoupling or filter capacitors should be placed on the RPAV node because this can disturb the control loop.
VCC PHOTODIODE PAVSET
MICROCONVERTER ADC INPUT
Rx 200
LD
PHOTODIODE PAVSET
ADN2872
Figure 30. Single Measurement of IMPD Across a Sense Resistor
Resistor Setpoint
ADN2872
MICROCONVERTER ADC INPUT R 1k
RPAV
Figure 28. Single Measurement of IMPD at RPAV in Voltage Setpoint Mode
In resistor setpoint calibration, the current through the resistor from PAVSET to ground is the IMPD current. The recommended method for measuring the IMPD current is to place a small resistor in series with the PAVSET resistor (or potentiometer) and measure the voltage across this resistor, as shown in Figure 31. The IMPD current is then equal to this voltage divided by the value of the resistor used. In resistor setpoint, PAVSET is held to 1.2 V nominal; it is recommended that the sense resistor should be selected so that the voltage across the sense resistor does not exceed 250 mV.
08013-043
Rev. 0 | Page 13 of 20
08013-012
08013-011
Voltage Setpoint
ADN2872
VCC PHOTODIODE PAVSET
POWER CONSUMPTION
The ADN2872 die temperature must be kept below 125C. The LFCSP package has an exposed paddle that should be connected such that it is at the same potential as the ADN2872 ground pins. Power consumption can be calculated as:
ADN2872
MICROCONVERTER ADC INPUT
ICC = ICC min + 0.3 IMOD
08013-040
R
Figure 31. Single Measurement of IMPD Across a Sense Resistor in Resistor Setpoint IMPD Monitoring
P = VCC x ICC + (IBIAS x VBIAS_PIN) + IMOD (VMODP_PIN + VMODN_PIN)/2 TDIE = TAMBIENT + JA x P
where: ICC min is 30 mA, the typical value of ICC provided in Table 1 with IBIAS = IMOD = 0. TDIE is the die temperature. TAMBIENT is the ambient temperature. VBIAS_PIN is the voltage at the IBIAS pin. VMODP_PIN is the voltage at the IMODP pin. VMODN_PIN is the voltage at the IMODN pin. Thus, the maximum combination of IBIAS + IMOD must be calculated. (Farad)
LOOP BANDWIDTH SELECTION
To ensure that the ADN2872 control loops have sufficient bandwidth, the average power loop capacitor (PAVCAP) and the extinction ratio loop capacitor (ERCAP) are calculated using the laser slope efficiency and the average power required. For resistor setpoint control,
PAVCAP 3.2 10 6
ERCAP PAVCAP 2
LI PAV
(Farad)
AUTOMATIC LASER SHUTDOWN (Tx_DISABLE)
ALS (Tx_DISABLE) is an input that is used to shut down the transmitter optical output. The ALS pin is pulled up internally with a 6 k resistor and conforms to SFP MSA specifications. When ALS is logic high or open, both the bias and modulation currents are turned off.
For voltage setpoint control, PAVCAP 1.28 10 6 ERCAP PAVCAP 2 LI PAV (Farad) (Farad)
BIAS AND MODULATION MONITOR CURRENTS
IBMON and IMMON are current-controlled current sources that mirror a ratio of the bias and modulation current. The monitor bias current, IBMON, and the monitor modulation current, IMMON, should both be connected to ground through a resistor to provide a voltage proportional to the bias current and modulation current, respectively. When using a microcontroller, the voltage developed across these resistors can be connected to two of the ADC channels, making available a digital representation of the bias and modulation current.
where: PAV (mW) is the average power required. LI (mW/mA) is the typical slope efficiency at 25C of a batch of lasers that are used in a design. The preceding capacitor estimation formulas are used to obtain a centered value for the particular type of laser that is used in a design and average power setting. Laser LI can vary by a factor of 7 between different physical lasers of the same type and across temperature without the need to recalculate the PAVCAP and ERCAP values. In the ac coupling configuration, LI can be calculated as
IBIAS PIN
ADN2872 has one on-chip, 800 pull-up resistor. The current sink from this resistor is VIBIAS dependent.
P1 P0 LI I MOD
(mW/mA)
where P1 is the optical power (mW) at the one level, and P0 is the optical power (mW) at the zero level. These capacitors are placed between the PAVCAP and ERCAP pins and ground. It is important that these capacitors are low leakage multilayer ceramics with an insulation resistance greater than 100 G or a time constant of 1000 sec, whichever is less. The capacitor tolerance can be 30% from the calculated value to the available off-the-shelf value, including the capacitor's own tolerance.
I UP
VCC V IBIAS 0. 8
(mA)
where VIBIAS is the voltage measured at the IBIAS pin after setup of one laser bias current, IBIAS. Usually, when set up, a maximum laser bias current of 100 mA results in a VIBIAS of about 1.2 V. In a worst-case scenario, VCC = 3.6 V, VIBIAS = 1.2 V, and IUP 3 mA. This on-chip resistor helps to damp out the low frequency oscillation observed from some inexpensive lasers. If the onchip resistance does not provide enough damping, one external RZ may be necessary (see Figure 32 and Figure 33).
Rev. 0 | Page 14 of 20
ADN2872
DATA INPUTS
Data inputs should be ac-coupled (10 nF capacitors are recommended) and are terminated via a 100 internal resistor between the DATAP and DATAN pins. A high impedance circuit sets the common-mode voltage and is designed to allow maximum input voltage headroom over temperature. It is necessary to use ac coupling to eliminate the need for matching between common-mode voltages. The 30 transmission line used is a compromise between drive current required and total power consumed. Other transmission line values can be used, with some modification of the component values. The R and C snubber values in Figure 32, 24 and 2.2 pF, respectively, represent a starting point and must be tuned for the particular model of laser being used. RP, the pullup resistor, is in series with a very small (0.5 nH) inductor. In some cases, an inductor is not required or can be accommodated with deliberate parasitic inductance, such as a thin trace or a via placed on the PC board. Take care to mount the laser as close as possible to the PC board, minimizing the exposed lead length between the laser can and the edge of the board. The axial lead of a coax laser is very inductive (approximately 1 nH per millimeter). Long exposed leads result in slower edge rates and reduced eye margin. Recommended component layouts and gerber files are available by contacting sales at Analog Devices. Note that the circuit in Figure 32 can supply up to 56 mA of modulation current to the laser, sufficient for most lasers available today. Higher currents can be accommodated by changing transmission lines and backmatch values. This interface circuit is not recommended for butterfly-style lasers or other lasers with 25 characteristic impedance. Instead, a 25 transmission line and inductive (instead of resistive) pull-up is recommended. Contact sales for recommendations on transmission lines and backmatch values. The ADN2872 also supports differential drive schemes. These can be particularly useful when driving VCSELs or other lasers with slow fall times. Differential drive can be implemented by adding a few extra components. A possible implementation is shown in Figure 33. In Figure 32 and Figure 33, Resistor RZ is required to achieve optimum eye quality. The recommended value is approximately 200 ~ 500 .
LASER DIODE INTERFACING
The schematic in Figure 32 describes the recommended circuit for interfacing the ADN2872 to most TO-Can or coax lasers. These lasers typically have impedances of 5 to 7 and have axial leads. The circuit shown works over the full range of data rates from 155 Mbps to 3.3 Gbps including multirate operation (with no change to PAVCAP and ERCAP values); see Figure 18, Figure 19, and Figure 20 in the Typical Performance Characteristics section for multirate performance examples. Coax lasers have special characteristics that make them difficult to interface to. They tend to have higher inductance, and their impedance is not well controlled. The circuit in Figure 32 operates by deliberately misterminating the transmission line on the laser side, while providing a very high quality matching network on the driver side. The impedance of the driver side matching network is very flat vs. frequency and enables multirate operation. A series damping resistor should not be used.
VCC L (0.5nH) RP 24 IMODP C1 100nF Tx LINE 30 R 24 C 2.2pF
08013-014
VCC
ADN2872
IBIAS CCBIAS
VCC
Tx LINE 30
RZ
L
BLM18HG601SN1D
Figure 32. Recommended Interface for ADN2872 AC Coupling
VCC L1 = 0.5nH L4 = BLM18HG601SN1D
R1 = 15 IMODN
C1 = C2 = 100nF
L3 = 4.7nH
TO-CAN/VCSEL
ADN2872
IMODP CCBIAS IBIAS
20 TRANMISSION LINES
R3
C3 SNUBBER
LIGHT
R2 = 15 (12 TO 24) L2 = 0.5nH VCC VCC RZ
L5 = 4.7nH
L6 = BLM18HG601SN1D
SNUBBER SETTINGS: 40 AND 1.5pF, NOT OPTIMIZED, OPTIMIZATION SHOULD CONSIDER THE PARASITIC OF THE INTERFACE CIRCUITRY.
Figure 33. Recommended Differential Drive Circuit
Rev. 0 | Page 15 of 20
08013-041
ADN2872
ALARMS
The ADN2872 has a latched active high monitoring alarm (FAIL). The FAIL alarm output is an open drain in conformance with SFP MSA specification requirements. The ADN2872 has a three-fold alarm system that covers:

The bias current alarm trip point is set by selecting the value of resistor on the IBMON pin to GND. The alarm is triggered when the voltage on the IBMON pin goes above 1.2 V. FAIL is activated when the single-point faults in Table 5 occur.
Use of a bias current higher than expected, likely as a result of laser aging. Out-of-bounds average voltage at the monitor photodiode (MPD) input, indicating an excessive amount of laser power or a broken loop. Undervoltage in the IBIAS pin (laser diode cathode) that increases the laser power.
Table 5. ADN2872 Single-Point Alarms
Alarm Type Bias Current MPD Current Crucial Nodes Mnemonic IBMON PAVSET ERREF (the ERRREF is designed tied to VCC in resistor setting mode) IBIAS Overvoltage or Short to VCC Condition Alarm if > 1.2 V Alarm if > 2.0 V Alarm if shorted to VCC (the alarm is valid for voltage setting mode only) Ignore Undervoltage or Short to GND Condition Ignore Alarm if < 0.4 V Alarm if shorted to GND Alarm if < 0.6 V
Table 6. ADN2872 Response to Various Single-Point Faults in AC-Coupled Configuration, as Shown in Figure 32
Mnemonic CCBIAS PAVSET PAVREF RPAV Short to VCC Fault state occurs Fault state occurs Voltage mode: fault state occurs Resistor mode: tied to VCC Voltage mode: fault state occurs Resistor mode: tied to VCC Does not increase laser average power Fault state occurs Does not increase laser average power Does not increase laser average power Output currents shut off Does not increase laser average power Does not affect laser power Voltage mode: fault state occurs Resistor mode: tied to VCC Fault state occurs Fault state occurs Does not increase laser average power Does not increase laser average power Fault state occurs Short to GND Fault state occurs Fault state occurs Fault state occurs Fault state occurs Open Does not increase laser average power Fault state occurs Fault state occurs Voltage mode: fault state occurs Resistor mode: does not increase average power Does not increase laser average power Fault state occurs Does not increase laser average power Does not increase laser average power Output currents shut off Does not increase laser average power Does not increase laser average power Does not increase laser average power
ERCAP PAVCAP DATAP DATAN ALS ERSET IMMON ERREF
IBMON FAIL IMODP IMODN IBIAS
Does not increase laser average power Fault state occurs Does not increase laser average power Does not increase laser average power Normal currents Does not increase laser average power Does not increase laser average power Voltage mode: does not increase average power Resistor mode: fault state occurs Does not increase laser average power Does not increase laser average power Does not increase laser average power Does not increase laser average power Fault state occurs
Does not increase laser average power Does not increase laser average power Does not increase laser average power Does not increase laser power Fault state occurs
Rev. 0 | Page 16 of 20
ADN2872 OUTLINE DIMENSIONS
0.60 MAX 0.60 MAX
19 18 EXPOSED PAD
(BO OMVIEW) TT
4.00 BSC SQ
PIN 1 INDICATOR
24 1
PIN 1 INDICATOR
TOP VIEW
3.75 BSC SQ
0.50 BSC 0.50 0.40 0.30
*2.45 2.30 SQ 2.15
6
13 12
7
0.23 MIN 2.50 REF
1.00 0.85 0.80
12 MAX
0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.30 0.23 0.18 0.20 REF COPLANARITY 0.08
SEATING PLANE
FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET.
080808-A
*COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-2 EXCEPT FOR EXPOSED PAD DIMENSION
Figure 34. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm x 4 mm Body, Very Thin Quad (CP-24-2) Dimensions shown in millimeters
ORDERING GUIDE
Model ADN2872ACPZ1 ADN2872ACPZ-RL1 ADN2872ACPZ-R71
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C
Package Description 24-Lead LFCSP_VQ 24-Lead LFCSP_VQ 24-Lead LFCSP_VQ
Package Option CP-24-2 CP-24-2 CP-24-2
Ordering Quantity 490 5,000 1,500
Z = RoHS Compliant Part.
Rev. 0 | Page 17 of 20
ADN2872 NOTES
Rev. 0 | Page 18 of 20
ADN2872 NOTES
Rev. 0 | Page 19 of 20
ADN2872 NOTES
(c)2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08013-0-3/09(0)
Rev. 0 | Page 20 of 20


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