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| PROCESS Small Signal Transistor PNP - Saturated Switch Transistor Chip CP555 Central TM Semiconductor Corp. PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 75,330 PRINCIPAL DEVICE TYPES CMPT3640 CMPT4209 2N4209 BACKSIDE COLLECTOR EPITAXIAL PLANAR 15 X 10 MILS 8 MILS 3.6 X 2.4 MILS 3.6 X 2.4 MILS Al - 20,000A Au - 15,000A 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R2 (1-August 2002) Central TM PROCESS CP555 Semiconductor Corp. Typical Electrical Characteristics 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R2 (1-August 2002) |
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