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19-4770; Rev 3; 8/10
15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers
General Description
The MAX6816/MAX6817/MAX6818 are single, dual, and octal switch debouncers that provide clean interfacing of mechanical switches to digital systems. They accept one or more bouncing inputs from a mechanical switch and produce a clean digital output after a short, preset qualification delay. Both the switch opening bounce and the switch closing bounce are removed. Robust switch inputs handle 25V levels and are 15kV ESDprotected for use in harsh industrial environments. They feature single-supply operation from +2.7V to +5.5V. Undervoltage lockout circuitry ensures the output is in the correct state upon power-up. The single MAX6816 and dual MAX6817 are offered in SOT packages and require no external components. Their low supply current makes them ideal for use in portable equipment. The MAX6818 octal switch debouncer is designed for data-bus interfacing. The MAX6818 monitors switches and provides a switch change-of-state output (CH), simplifying microprocessor (P) polling and interrupts. Additionally, the MAX6818 has three-state outputs controlled by an enable (EN) pin, and is pin-compatible with the LS573 octal latch (except for the CH pin), allowing easy interfacing to a digital data bus.
Features
o Robust Inputs can Exceed Power Supplies up to 25V o ESD Protection for Input Pins 15kV--Human Body Model 8kV--IEC 1000-4-2, Contact Discharge 15kV--IEC 1000-4-2, Air-Gap Discharge o Small SOT Packages (4 and 6 pins) o Single-Supply Operation from +2.7V to +5.5V o Single (MAX6816), Dual (MAX6817), and Octal (MAX6818) Versions Available o No External Components Required o 6A Supply Current o Three-State Outputs for Directly Interfacing Switches to P Data Bus (MAX6818) o Switch Change-of-State Output Simplifies Polling and Interrupts (MAX6818) o Pin-Compatible with 'LS573 (MAX6818)
MAX6816/MAX6817/MAX6818
Ordering Information
PART MAX6816EUS-T TEMP RANGE -40C to +125C PINSOT PACKAGE TOP MARK 4 SOT143 KABA
Applications
P Switch Interfacing Industrial Instruments PC-Based Instruments Portable Instruments Automotive Applications Membrane Keypads
MAX6817EUT-T -40C to +125C 6 SOT23-6 AAAU MAX6818EAP -40C to +125C 20 SSOP -- Note: There is a minimum order increment of 2500 pieces for SOT packages. Devices are available in both leaded and lead-free packaging. Specify lead-free by replacing "-T" with "+T" when ordering.
Typical Operating Circuit
TOP VIEW
VCC
Pin Configurations
GND
1
4
VCC
MECHANICAL SWITCH
MAX6816
0.1F
P
MAX6816
IN GND
OUT DEBOUNCED OUTPUT
RESET
IN
2
3
OUT
SOT143
Pin Configurations continued at end of data sheet.
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15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers MAX6816/MAX6817/MAX6818
ABSOLUTE MAXIMUM RATINGS
Voltage (with respect to GND) VCC .......................................................................-0.3V to +6V IN_ (Switch Inputs) ..............................................-30V to +30V EN.........................................................................-0.3V to +6V OUT_, CH ...............................................-0.3V to (VCC + 0.3V) OUT Short-Circuit Duration (One or Two Outputs to GND)....................................Continuous Continuous Power Dissipation (TA = +70C) 4-Pin SOT143 (derate 4.0mW/C above +70C)..........320mW 6-Pin SOT23 (derate 8.7mW/C above +70C)............691mW 20-Pin SSOP (derate 8.0mW/C above +70C) ...........640mW Operating Temperature Range .........................-40C to +125C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10s) .................................+300C Soldering Temperature (reflow) Lead(Pb)-free...............................................................+260C Containing lead............................................................+240C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +5.5V, TA = -40C to +125C, unless otherwise noted. Typical values are at VCC = +5V, TA = +25C.) (Note 1) PARAMETER Operating Voltage Range Supply Current Debounce Duration SYMBOL VCC ICC tDP VIL Input Threshold Input Hysteresis Input Pullup Resistance IN Input Current Input Voltage Range Undervoltage-Lockout Threshold OUT_, CH Output Voltage EN Pulse Width EN Threshold EN Input Current EN Low to Out Active Propagation Delay EN High to Out Three-State Propagation Delay EN Low to CH Out High Propagation Delay OUT_ Three-State Leakage Current ESD CHARACTERISTICS IEC 1000-4-2 Air Discharge ESD Protection IN_ IEC 1000-4-2 Contact Discharge Human Body Model 15 8 15 kV IIL tPE tPD tPC RL = 10k, CL = 100pF RL = 1k, CL = 15pF RL = 10k, CL = 50pF VOUT = 0V or VCC VOL VOH tEN VCC = 5V VCC = 2.7V ISINK = 1.6mA ISOURCE = 0.4mA VCC - 1.0 200 0.8 0.8 1.7 1.1 2.4 2.0 1 100 100 100 10 IIN VIN VIN = 15V -25 1.9 32 VIH VCC = 5V VCC = 2.7V 2.4 2.0 300 63 100 1 +25 2.6 0.4 VCC = 5V, IOUT = 0A, IN_ = VCC MAX6818 MAX6816/MAX6817 20 20 CONDITIONS MIN 2.7 6 40 50 TYP MAX 5.5 20 60 80 0.8 UNITS V A ms V V mV k mA V V V ns V A ns ns ns A
Note 1: MAX6816 and MAX6817 production testing is done at TA = +25C; overtemperature limits are guaranteed by design. 2 _______________________________________________________________________________________
15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
MAX6816/MAX6817/MAX6818
SUPPLY CURRENT vs. TEMPERATURE
MAX6816 toc01
DEBOUNCE OF CLOSING SWITCH
MAX6816 TOC02
DEBOUNCE OF OPENING SWITCH
MAX6816 TOC03
7 6 SUPPLY CURRENT (A) 5 4 3 2 1 0 VCC = 3V VCC = 5V
IN (5V/div)
IN (5V/div) OUT (2V/div)
5V
5V
-5V 4V
-5V 4V
OUT (2V/div)
0V
0V VCC = 5V 10ms/div
VCC = 5V 10ms/div
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
OUTPUT LOGIC LEVEL vs. SUPPLY VOLTAGE
MAX6816 toc04
MAX6818 EN INPUT LOGIC THRESHOLD vs. SUPPLY VOLTAGE
MAX6816 toc05
6 VOH, ISOURCE = 0.4mA 5 OUTPUT LOGIC LEVEL (V) 4 3 2 1 VOL, ISINK = 1.6mA 0 2 3 4 SUPPLY VOLTAGE (V) 5 6
5
4 LOGIC THRESHOLD (V)
3
2
1
0 2 3 4 SUPPLY VOLTAGE (V) 5 6
DEBOUNCE DELAY PERIOD vs. TEMPERATURE
MAX6816 toc06
VCC UNDERVOLTAGE LOCKOUT vs. TEMPERATURE
MAX6816 toc07
50 DEBOUNCE DELAY PERIOD (ms)
5 VCC UNDERVOLTAGE LOCKOUT (V)
45 VCC = 5V 40 VCC = 3V 35
4
3
2
1
30 -40 -25 -10 5 20 35 50 65 80 95 100 125 TEMPERATURE (C)
0 -40 -25 -10 5 20 35 50 65 80 95 100 125 TEMPERATURE (C)
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15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers MAX6816/MAX6817/MAX6818
Pin Description
PIN MAX6816 1 2 -- -- 3 -- -- 4 -- -- MAX6817 2 -- 1, 3 -- -- 4, 6 -- 5 -- -- MAX6818 10 -- -- 2-9 -- -- 12-19 20 1 11 NAME GND IN IN1, IN2 IN1-IN8 OUT OUT2, OUT1 OUT8-OUT1 VCC EN CH Ground Switch Input Switch Inputs Switch Inputs CMOS Debounced Output CMOS Debounced Outputs CMOS Debounced Outputs +2.7V to +5.5V Supply Voltage Active-Low, Three-State Enable Input for outputs. Resets CH. Tie to GND to "always enable" outputs. Change-of-State Output. Goes low on switch input change of state. Resets on EN. Leave unconnected if not used. FUNCTION
VCC VCC VCC RPU IN ESD PROTECTION OSC. D R COUNTER Q
D
Q
OUT
LOAD
UNDERVOLTAGE LOCKOUT
MAX6816 MAX6817 MAX6818
Figure 1. Block Diagram
_______________Detailed Description
Theory of Operation
The MAX6816/MAX6817/MAX6818 are designed to eliminate the extraneous level changes that result from interfacing with mechanical switches (switch bounce). Virtually all mechanical switches bounce upon opening or closing. These switch debouncers remove bounce when a switch opens or closes by requiring that sequentially clocked inputs remain in the same state for a number of sampling periods. The output does not change until the input is stable for a duration of 40ms. The circuit block diagram (Figure 1) shows the functional blocks consisting of an on-chip oscillator, counter, exclusive-NOR gate, and D flip-flop. When the
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input does not equal the output, the XNOR gate issues a counter reset. When the switch input state is stable for the full qualification period, the counter clocks the flip-flop, updating the output. Figure 2 shows the typical opening and closing switch debounce operation. On the MAX6818, the change output (CH) is updated simultaneously with the switch outputs.
Undervoltage Lockout
The undervoltage lockout circuitry ensures that the outputs are at the correct state on power-up. While the supply voltage is below the undervoltage threshold (typically 1.9V), the debounce circuitry remains transparent. Switch states are present at the logic outputs with no debouce delay.
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15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers MAX6816/MAX6817/MAX6818
tDP IN1
EN
1/2 VCC
tEN
1/2 VCC
OUT1-OUT8
OUT1
tPE
1/2 VCC
OUT NORMALLY LOW
tPD VOL + 0.5V
tPE
IN2
OUT1-OUT8 tPC
1/2 VCC
OUT NORMALLY HIGH
VOH - 0.5V tPD
OUT2
CH
1/2 VCC
CH
Figure 4. MAX6818 P-Interface Timing Diagram
+VCC
MAX6818 ONLY
0.1F
+VCC
Figure 2. Input Characteristics
SW1 IN1 EN CH I/O IRQ P
20V IN (20V/div)
MAX6818
0V -20V IN8 SW8 4V OUT8 D7 OUT1 D0
OUT (2V/div) 0V
Figure 5. MAX6818 Typical P Interfacing Circuit
20ms/div
Figure 3. Switch Input 25V Fault Tolerance
Robust Switch Inputs
The switch inputs on the MAX6816/MAX6817/MAX6818 have overvoltage clamping diodes to protect against damaging fault conditions. Switch input voltages can safely swing 25V to ground (Figure 3). Proprietary ESD-protection structures protect against high ESD encountered in harsh industrial environments, membrane keypads, and portable applications. They are designed to withstand 15kV per the IEC 1000-4-2 Air Gap Discharge Test and 8kV per the IEC 1000-4-2 Contact Discharge Test. Since there are 63k (typical) pullup resistors connected to each input, driving an input to -25V will draw
approximately 0.5mA (up to 4mA for eight inputs) from the VCC supply. Driving an input to +25V will cause approximately 0.32mA of current (up to 2.6mA for eight inputs) to flow back into the VCC supply. If the total system VCC supply current is less than the current flowing back into the VCC supply, VCC will rise above normal levels. In some low-current systems, a zener diode on VCC may be required.
15kV ESD Protection
As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The MAX6816/MAX6817/MAX6818 have extra protection against static electricity. Maxim's engineers have developed state-of-the-art structures to protect against ESD of 15kV at the switch inputs without
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15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers MAX6816/MAX6817/MAX6818
RC 1M CHARGE-CURRENT LIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1500 DISCHARGE RESISTANCE DEVICE UNDER TEST HIGHVOLTAGE DC SOURCE RC 50M to 100M CHARGE CURRENT LIMIT RESISTOR RD 330 DISCHARGE RESISTANCE DEVICE UNDER TEST
Cs 100pF
STORAGE CAPACITOR
Cs 150pF
STORAGE CAPACITOR
Figure 6a. Human Body ESD Test Model
Figure 7a. IEC 1000-4-2 ESD Test Model
I IP 100% 90% AMPERES 36.8% 10% 0 0 tRL TIME tDL CURRENT WAVEFORM 10% I PEAK Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) 100% 90%
Figure 6b. Human Body Current Waveform
t r = 0.7ns to 1ns 30ns 60ns
t
damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, the MAX6816/MAX6817/ MAX6818 keep working without latchup, whereas other solutions can latch and must be powered down to remove latchup. ESD protection can be tested in various ways; these products are characterized for protection to the following limits: 1) 15kV using the Human Body Model 2) 8kV using the Contact-Discharge method specified in IEC 1000-4-2 3) 15kV using IEC 1000-4-2's Air-Gap method.
Figure 7b. IEC 1000-4-2 ESD Generator Current Waveform
Human Body Model Figure 6a shows the Human Body Model and Figure 6b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5k resistor. IEC 1000-4-2 The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The MAX6816/ MAX6817/MAX6818 help you design equipment that
ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results.
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15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers
meets Level 4 (the highest level) of IEC 1000-4-2, without the need for additional ESD-protection components. The major difference between tests done using the Human Body Model and IEC 1000-4-2 is higher peak current in IEC 1000-4-2, because series resistance is lower in the IEC 1000-4-2 model. Hence, the ESD withstand voltage measured to IEC 1000-4-2 is generally lower than that measured using the Human Body Model. Figure 7a shows the IEC 1000-4-2 model and Figure 7b shows the current waveform for the 8kV, IEC 1000-4-2, Level 4, ESD Contact-Discharge test. The Air-Gap test involves approaching the device with a charged probe. The Contact-Discharge method connects the probe to the device before the probe is energized.
Machine Model The Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing.
MAX6816/MAX6817/MAX6818
MAX6818 P Interfacing
The MAX6818 has an output enable (EN) input that allows switch outputs to be three-stated on the P data bus until polled by the P. Also, state changes at the switch inputs are detected, and an output (CH) goes low after the debounce period to signal the P. Figure 4 shows the timing diagram for enabling outputs and reading data. If the output enable is not used, tie EN to GND to "always enable'' the switch outputs. If EN is low, CH is always high. If a change of state is not required, leave CH unconnected.
Pin Configurations (continued)
TOP VIEW
EN 1 IN1 2 IN2 3 IN1 1 6 OUT1 IN3 4 IN4 5 5 VCC IN5 6 IN6 7 IN2 3 4 OUT2 IN7 8 IN8 9 GND 10 20 VCC 19 OUT1 18 OUT2 17 OUT3
GND 2
MAX6817
MAX6818
16 OUT4 15 OUT5 14 OUT6 13 OUT7 12 OUT8 11 CH
SOT23-6
SSOP
___________________Chip Information
SUBSTRATE CONNECTED TO GND PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 4 SOT143 6 SOT23 20 SSOP PACKAGE CODE U4-1 U6-4 A20-1 OUTLINE NO. 21-0052 21-0058 21-0056 LAND PATTERN NO. 90-0183 90-0175 90-0094 7
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15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers MAX6816/MAX6817/MAX6818
Revision History
REVISION NUMBER 0 3 REVISION DATE 7/98 8/10 Initial release Updated Ordering Information, Electrical Characteristics, Typical Operating Characteristics, and the Undervoltage Lockout section. DESCRIPTION PAGES CHANGED -- 1-4, 7
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

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