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SAF7167AHW
YUV-to-RGB digital-to-analog converter
Rev. 01 -- 29 June 2004 Product data sheet
1. General description
The SAF7167AHW is a mixed-mode designed IC containing a video data path, keying control block, analog mixer, and a voltage output amplifier, capable of converting digital video data to analog RGB video, and then mixing video and external analog RGB inputs. The video data path contains a data re-formatter, YUV-to-RGB colour space matrix as well as triple DACs for video data processing. An analog mixer performs multiplexing between DAC outputs of the video path and external analog RGB inputs. The final analog outputs are buffered with built-in voltage output amplifiers to provide the direct driving capability for a 150 load. See the overall block diagram. The operation of SAF7167AHW is controlled via the I2C-bus.
2. Features
s s s s s s s On-chip mixing of digital video data and analog RGB signals Supports video input format of YUV 4 : 2 : 2, 4 : 1 : 1, 2 : 1 : 1 and RGB 5 : 6 : 5 Video input rate up to 66 MHz Allows for both binary and twos complement video input data Triple 8-bit DACs for video output Built-in voltage output amplifier Provides keying control with external key and internal 8-bit, 2 x 8-bit and 3 x 8-bit pixel colour key s Programmable via the I2C-bus s 5 V CMOS device; HTQFP48 package.
3. Quick reference data
Table 1: Symbol VDDD VDDA Tamb Quick reference data Parameter digital supply voltage analog supply voltage ambient temperature Conditions Min 4.75 4.75 -40 Typ 5.0 5.0 Max 5.25 5.25 +85 Unit V V C
Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
4. Ordering information
Table 2: Ordering information Package Name SAF7167AHW HTQFP48 Description plastic thermal enhanced thin quad flat package; 48 leads; body 7 x 7 x 1 mm; exposed die pad Version SOT545-1 Type number
5. Block diagram
B_IN R_IN G_IN C_REF(H) 36 29 31 33 MIXER YUV[7:0] 38 to 45 8 46 to 48, 1 to 5 8 9 MIXER OPAMP 28 B_OUT REFORMATTER YUVTORGB MATRIX MUX 8-BIT DAC (3x) MIXER OPAMP 30 G_OUT OPAMP 32 R_OUT
VDDD VSSD 7 8
VSSA2 VDDA2 26 27
VSSA1 VDDA1 34 35
UV[7:0]
HREF
SDA SCL RES_N
22 23 24
I 2 C-BUS CONTROL
SAF7167AHW
CLOCK GENERATOR
KEYING CONTROL 8
11 AP
12 SP
25, 37 n.c.
6 VCLK
10 PCLK
21 EXTKEY
13 to 20
001aaa390
P[7:0]
Fig 1. Block diagram.
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Product data sheet
Rev. 01 -- 29 June 2004
2 of 21
Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
6. Pinning information
6.1 Pinning
45 YUV[0] 44 YUV[1] 43 YUV[2] 42 YUV[3] 41 YUV[4] 40 YUV[5] 39 YUV[6] 38 YUV[7] 48 UV[5] 47 UV[6] 46 UV[7]
UV[4] UV[3] UV[2] UV[1] UV[0] VCLK VDDD VSSD HREF
37 n.c. 36 C_REF(H) 35 VDDA1 34 VSSA1 33 R_IN 32 R_OUT 31 G_IN 30 G_OUT 29 B_IN 28 B_OUT 27 VDDA2 26 VSSA2 25 n.c. RES_N 24
001aaa391
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
1 2 3 4 5 6 7 8 9
SAF7167AHW
PCLK 10 AP 11 SP 12 P[7] 13 P[6] 14 P[5] 15 P[4] 16 P[3] 17 P[2] 18 P[1] 19 P[0] 20 EXTKEY 21 SDA 22 SCL 23
Fig 2. Pin configuration.
6.2 Pin description
Table 3: Symbol UV[4] UV[3] UV[2] UV[1] UV[0] VCLK VDDD VSSD HREF PCLK AP SP
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Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 Type [1] I I I I I I S S I I I I Description digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data video clock input digital supply voltage digital ground horizontal reference input signal pixel clock input test pin, normally connected to ground test pin, normally connected to ground
Product data sheet
Rev. 01 -- 29 June 2004
3 of 21
Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
Pin description ...continued Pin 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 Type [1] I I I I I I I I I I/O I I S S O I O I O I S S S I I I I I I I I Description pixel bus input 7 (for keying control) pixel bus input 6 (for keying control) pixel bus input 5 (for keying control) pixel bus input 4 (for keying control) pixel bus input 3 (for keying control) pixel bus input 2 (for keying control) pixel bus input 1 (for keying control) pixel bus input 0 (for keying control) external key signal input I2C-bus data line I2C-bus clock line resetting the I2C-bus (active LOW) not connected analog ground 2 analog supply voltage 2 analog blue signal output analog blue signal input analog green signal output analog green signal input analog red signal output analog red signal input analog ground 1 analog supply voltage 1 de-coupling capacitor for internal reference voltage (2.25 V) not connected digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
Table 3: Symbol P[7] P[6] P[5] P[4] P[3] P[2] P[1] P[0] EXTKEY SDA SCL RES_N n.c. VSSA2 VDDA2 B_OUT B_IN G_OUT G_IN R_OUT R_IN VSSA1 VDDA1 C_REF(H) n.c. YUV[7] YUV[6] YUV[5] YUV[4] YUV[3] YUV[2] YUV[1] YUV[0]
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Product data sheet
Rev. 01 -- 29 June 2004
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Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
Pin description ...continued Pin 46 47 48 Type [1] I I I Description digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data
Table 3: Symbol UV[7] UV[6] UV[5]
[1]
I = input; I/O = input or output; O = output; S = supply.
7. Functional description
The SAF7167AHW contains a video data path, 3 analog mixers and voltage output amplifiers for the RGB channels respectively, a keying control block as well as an I2C-bus control block.
7.1 Video data path
The video data path includes a video data re-formatter, a YUV-to-RGB colour space conversion matrix, and triple 8-bit DACs.
7.1.1 Re-formatter
The re-formatter de-multiplexes the different video formats YUV 4 : 1 : 1, 4 : 2 : 2 or 2 : 1 : 1 to internal YUV 4 : 4 : 4, which can then be processed by the RGB matrix. The pixel byte sequences of those video input formats are shown in Table 4 to Table 7.
Table 4: Input YUV0 (LSB) YUV1 YUV2 YUV3 YUV4 YUV5 YUV6 YUV7 (MSB) UV0 (LSB) UV1 UV2 UV3 UV4 UV5 UV6 UV7 (MSB) Y data UV data
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Pixel byte sequence of 4 : 2 : 2 Pixel byte sequence of 4 : 2 : 2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 U0 U1 U2 U3 U4 U5 U6 U7 0 0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 V0 V1 V2 V3 V4 V5 V6 V7 1 0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 U0 U1 U2 U3 U4 U5 U6 U7 2 2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 V0 V1 V2 V3 V4 V5 V6 V7 3 2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 U0 U1 U2 U3 U4 U5 U6 U7 4 4 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 V0 V1 V2 V3 V4 V5 V6 V7 5 4
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Product data sheet
Rev. 01 -- 29 June 2004
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Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
Pixel byte sequence of 4 : 1 : 1 Pixel byte sequence of 4 : 1 : 1 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X X X V6 V7 U6 U7 0 0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X X X V4 V5 U4 U5 1 0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X X X V2 V3 U2 U3 2 0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X X X V0 V1 U0 U1 3 0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X X X V6 V7 U6 U7 4 4 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X X X V4 V5 U4 U5 5 4 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X X X V2 V3 U2 U3 6 4 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X X X V0 V1 U0 U1 7 4
Table 5: Input YUV0 YUV1 YUV2 YUV3 YUV4 YUV5 YUV6 YUV7 UV0 UV1 UV2 UV3 UV4 UV5 UV6 UV7 Y data UV data Table 6: Input YUV0 YUV1 YUV2 YUV3 YUV4 YUV5 YUV6 YUV7 Y data UV data Table 7: Input UV7 UV6 UV5 UV4 UV3 UV2 UV1
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Pixel byte sequence of 2 : 1 : 1 Pixel byte sequence of 2 : 1 : 1 U0 U1 U2 U3 U4 U5 U6 U7 X 0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 0 X V0 V1 V2 V3 V4 V5 V6 V7 X 0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 2 X U0 U1 U2 U3 U4 U5 U6 U7 X 4 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 4 X V0 V1 V2 V3 V4 V5 V6 V7 X 4 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 6 X
Pixel byte sequence of 5 : 6 : 5 Pixel byte sequence of RGB 5 : 6 : 5 G0 R4 R3 R2 R1 R0 G5 G0 R4 R3 R2 R1 R0 G5 G0 R4 R3 R2 R1 R0 G5 G0 R4 R3 R2 R1 R0 G5
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Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
Pixel byte sequence of 5 : 6 : 5 ...continued Pixel byte sequence of RGB 5 : 6 : 5 G4 G3 G2 G1 B4 B3 B2 B1 B0 0 G4 G3 G2 G1 B4 B3 B2 B1 B0 1 G4 G3 G2 G1 B4 B3 B2 B1 B0 2 G4 G3 G2 G1 B4 B3 B2 B1 B0 3
Table 7: Input UV0 YUV7 YUV6 YUV5 YUV4 YUV3 YUV2 YUV1 YUV0 RGB data
For RGB 5 : 6 : 5 video inputs, the video data are just directly bypassed to triple DACs. The input video data can be selected to either twos complement (I2C-bus bit DRP = 0) or binary offset (I2C-bus bit DRP = 1). The video input format is selected by I2C-bus bits FMTC[1:0]. The rising edge of HREF input defines the start of active video data. When HREF is inactive, the video output will be blanked.
7.1.2 YUV-to-RGB matrix
The matrix converts YUV data, in accordance with ITU-R BT.601, to RGB data with approximately 1.5 LSB deviation to the theoretical values for 8-bit resolution.
7.1.3 Triple 8-bit DACs
Three identical DACs for R, G and B video outputs are designed with voltage-drive architecture to provide high-speed operation of up to 66 MHz conversion data rate. Pin C_REF(H) is provided to allow for one external de-coupling capacitor to be connected between the internal reference voltage source and ground.
7.2 Analog mixers and keying control
The analog mixers are controlled to switch between the outputs from the video DACs and analog RGB inputs by a keying signal. The analog RGB inputs need to interface with analog mixers in the way of DC-coupling, also these RGB inputs are limited to RGB signals without a sync level pedestal. The keying control can be enabled by setting I2C-bus bit KEN = 1. Two kinds of keying are possible to generate: one is external key (from EXTKEY pin when KMOD[2:0] are all logic 0), and the other is the internal pixel colour key (when KMOD[2:0] are not all logic 0) generated by comparing the input pixel data with the internal I2C-bus register value KD[7:0]. Controlled by KMOD[2:0] bits, there are 4 ways to compare the pixel data (see Table 8).
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Product data sheet
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Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
KMOD[2:0] Pixel type 8-bit pixel 2 x 8-bit pixel Remark pseudo colour mode high colour mode 1 with pixels given at both rising and falling edges of PCLK high colour mode 2 with pixels given only at rising edges of PCLK true colour mode
Table 8: 100 101
KMOD[2:0]
110
2 x 8-bit pixel
111
3 x 8-bit pixel
Since only one control register KD[7:0] provides the data value for pixel data comparison, when at 2 x 8-bit or 3 x 8-bit pixel input modes, it is presumed that all input bytes (lower, middle or higher) of each pixel must be the same as KD[7:0] in order to make graphics colour key active. The polarity of EXTKEY can be selected with KINV. With KINV = 0, EXTKEY = HIGH switches analog mixers to select DAC outputs. Before the internal keying signal switches the analog multiplexers, it can be further delayed up to 7 PCLK cycles with the control bits KDLY[2:0].
7.3 Voltage output amplifiers
Before the analog input enters the analog mixers, it passes through voltage output amplifiers. Level shifters are used internally to provide an offset of 0.2 V and an amplifier gain of 2 for analog inputs to match with the output levels from DACs. After buffering with voltage output amplifiers, the final RGB outputs can drive a 150 load directly (25 internal resistor, 47 external serial resistor, and 75 load resistor) at the monitor side (see Figure 9). The output voltage level of DAC ranges from the lowest level 0.2 V (zero code) to the highest level 1.82 V (all one code). With the digital input YUV video data in accordance with ITU-R BT.601, the RGB output of 8-bit DAC actually ranges from the 16th step (black) to the 235th step (white). Therefore, after the voltage divider with external serial resistor and monitor load resistor, the output voltage range to a monitor is approximately 0.7 V (p-p).
7.4 I2C-bus control
Only one control byte is needed for the SAF7167AHW. The I2C-bus format is shown in Table 9.
Table 9: S [1]
[1] [2] [3] [4] [5] [6]
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I2C-bus format SLAVE ADDRESS [2] A [3] SUBADDRESS [4] A [3] DATA [5] A [3] P [6]
S = START condition. SLAVE ADDRESS = 1011 111X; X = R/W control bit. X = 0: order to write. X = 1: order to read (not used for SAF7167AHW). A = acknowledge; generated by the slave. SUBADDRESS = subaddress byte. DATA = data byte. P = STOP condition.
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Product data sheet
Rev. 01 -- 29 June 2004
8 of 21
Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
Control data byte D6 KMOD1 0 KD6 D5 KMOD0 0 KD5 D4 DRP 0 KD4 D3 KEN 0 KD3 D2 KINV KDLY2 KD2 D1 FMTC1 KDLY1 KD1 D0 FMTC0 KDLY0 KD0 KMOD2 0 KD7
Table 10: 00 01 02 Table 11: Bit FMTC[1:0]
Subaddress D7
Bit functions in data byte; Table note 1 and Table note 2 Description video format control: 00: YUV 4 : 2 : 2 01: YUV 4 : 1 : 1 10: YUV 2 : 1 : 1/ITU-R BT.656 11: RGB 5 : 6 : 5
KINV
key polarity: KINV = 0: pin EXTKEY = HIGH for analog mixer to select DAC outputs KINV = 1: pin EXTKEY = HIGH for analog mixer to select analog RGB inputs
KEN
key enable: 0 = disable 1 = enable
DRP
UV input data code: 0 = twos complement 1 = binary offset
KMOD[2:0]
keying mode: 000: external key 100: 8-bit pixel colour key 101: 2 x 8-bit pixel colour key (with two-edge clock latching for pixel input) 110: 2 x 8-bit pixel colour key (with one-edge clock latching for pixel input) 111: 3 x 8-bit pixel colour key (with one-edge clock latching for pixel input) all other combinations are reserved
KDLY[2:0] KD[7:0]
[1] [2]
added keying delay cycles (from 0 to 7 PCLK cycles) the data value compared for 8, 16 or 24-bit pixel colour key
All I2C-bus control bits are initialized to logic 0 after RES_N is activated. PCLK should be active in any event to allow for correct operation of I2C-bus programming.
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Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
8. Limiting values
Table 12: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). All ground pins and all supply pins connected together. Symbol VDDD VDDA VI(D) VI(A) Vdiff Tstg Tamb Vesd Parameter digital supply voltage analog supply voltage digital input voltage analog input voltage voltage difference between VSS pins storage temperature ambient temperature electrostatic discharge voltage: human body model machine model
[1] [2] Class 2 according to EIA/JESD22-114-B. Class B according to EIA/JESD22-115-A.
[1] [2]
Conditions
Min -0.5 -0.5 -0.5 -0.5 -65 -40 -
Max +7.0 +7.0 +7.0 +7.0 100 +150 +85 2000 200
Unit V V V V mV C C V V
9. Thermal characteristics
Table 13: Symbol Rth(j-a)
[1]
Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air Typ 34 [1] Unit K/W
The overall Rth(j-a) value can vary depending on the board layout. To minimize the effective Rth(j-a) all power and ground pins must be connected to the power and ground layers directly. An ample copper area direct under the SAF7167AHW with a number of through-hole plating, which connect to the ground layer (four-layer board: second layer), can also reduce the effective Rth(j-a). Please do not use any solder-stop varnish under the chip. In addition the usage of soldering glue with a high thermal conductance after curing is recommended.
10. Static characteristics
Table 14: Static characteristics Tamb = -40 C to +85 C. Symbol VDDD VDDA IDD(tot) VIH(SDA) VIL(SDA) VIH VIL Vi
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Parameter digital supply voltage analog supply voltage total supply current HIGH-level input voltage on pin SDA LOW-level input voltage on pin SDA HIGH-level digital input voltage LOW-level digital input voltage full-scale analog RGB at input pins
Conditions
Min 4.75 4.75
Typ 5.0 5.0 130 0.7
Max 5.25 5.25 +1.5 0.8 -
Unit V V mA V V V V
fclk = 27 MHz
3 -0.5 2 -
VDDD + 0.5 V
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Product data sheet
Rev. 01 -- 29 June 2004
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Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
Table 14: Static characteristics ...continued Tamb = -40 C to +85 C. Symbol Vo DNL INL Parameter full-scale analog RGB at output pins differential non-linearity error of video output integral non-linearity error of video output Conditions with 125 external load Min 1.250 Typ 1.375 Max 1.500 1 1 Unit V LSB LSB
11. Dynamic characteristics
Table 15: Dynamic characteristics Tamb = -40 C to +85 C. Symbol VCLK fclk PCLK fclk pixel clock rate: 8-bit pixel colour key 2 x 8-bit pixel colour key; mode 1 2 x 8-bit pixel colour key; mode 2 3 x 8-bit pixel colour key tsu1 th1 tsu2 th2 tsu3 th3 tsw Tgroup duty factor of PCLK digital input set-up time to VCLK rising edge digital input hold time to VCLK rising edge digital input set-up time to PCLK rising edge digital input hold time to PCLK rising edge digital input set-up time to PCLK falling edge digital input hold time to PCLK falling edge switching time between video DAC outputs and analog inputs overall group delay from digital video inputs to analog outputs: YUV video input mode RGB video input mode tr tf ts tPD DAC analog output rise time DAC analog output fall time DAC analog output settling time DAC analog output propagation delay see Figure 8 see Figure 8 see Figure 8 see Figure 8 see Figure 8 see Figure 8
[2] [2] [3] [4] [1]
Parameter video clock rate duty factor of VCLK
Conditions
Min 40
Typ 50
Max 66 60
Unit MHz %
see Figure 4 see Figure 5 see Figure 6 see Figure 7
40 3 2 0 4.2 -1 6 -
50 -
77.5 50 80 77.5 60 15
MHz MHz MHz MHz % ns ns ns ns ns ns ns
-
20TVCLK + tPD 12TVCLK + tPD 3.5 3.5 16.5 20
-
ns ns ns ns ns ns
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Product data sheet
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Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
Table 15: Dynamic characteristics ...continued Tamb = -40 C to +85 C. Symbol Gv B SR
[1] [2] [3] [4]
Parameter voltage gain bandwidth slew rate
Conditions
Min -
Typ 2.0 110
Max -
Unit
Analog outputs from analog inputs at -3 dB 160 100 MHz V/s
Switching time measured from the 50 % point of the EXTKEY transition edge to the 50 % point of the selected analog output transition. DAC output rise and fall times measured between the 10 % and 90 % points of full-scale transition. DAC settling time measured from the 50 % point of full-scale transition to the output remaining within 1 LSB. DAC analog output propagation delay measured from the 50 % point of the rising edge of VCLK to the 50 % point of full-scale transition.
VCLK t su1 HREF t h1 YUV t su1 UV
001aaa404
Fig 3. Video data input timing.
PCLK t su2 t h2 P [7:0] pixel 1 pixel 2 pixel 3 pixel 4 pixel 5 pixel 6 pixel 7
001aaa394
Fig 4. Pixel data input timing; 8-bit pixel colour key.
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SAF7167AHW
YUV-to-RGB digital-to-analog converter
PCLK t su2 t h2 P [7:0] t su3 t h3
pixel 1
pixel 2
pixel 3
001aaa396
Fig 5. Pixel data input timing; 2 x 8-bit pixel colour key; mode 1.
PCLK t su2 t h2 P [7:0]
pixel 1
pixel 2
pixel 3
001aaa397
Fig 6. Pixel data input timing; 2 x 8-bit pixel colour key; mode 2.
PCLK t su2 t h2 P [7:0]
pixel 1
pixel 2
001aaa398
Fig 7. Pixel data input timing; 3 x 8-bit pixel colour key.
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Product data sheet
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Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
VCLK
Tgroup
YUV and UV
(full-scale transition) ts t PD
R_OUT, G_OUT, B_OUT
t r, t f
001aaa399
Fig 8. DAC output timing.
12. Application information
digital YUV video data inputs 8 38 to 45 YUV[7:0] UV[7:0] analog inputs from VGA R_IN
75
36
C_REF(H)
0.1 F
8
46 to 48, 1 to 5 to PC monitor 33 SAF7167AHW G_IN G_OUT 47
75
32
R_OUT 47
75
31
30
75
B_IN
75
29
28
B_OUT 47
75
001aaa400
cable
monitor side
Fig 9. Typical application diagram for analog circuits.
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SAF7167AHW
YUV-to-RGB digital-to-analog converter
13. Package outline
HTQFP48: plastic thermal enhanced thin quad flat package; 48 leads; body 7 x 7 x 1 mm; exposed die pad
SOT545-2
c y exposed die pad side X
Dh 36 37 25 24 ZE A
e Eh wM bp pin 1 index 48 1 wM 12 ZD vM A 13 detail X Lp L E HE A A2 A1 (A 3)
bp e D HD
B vM B
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) A UNIT max. mm 1.2 A1 0.15 0.05 A2 1.05 0.95 A3 0.25 bp 0.27 0.17 c 0.20 0.09 D(1) 7.1 6.9 Dh 4.6 4.4 E(1) 7.1 6.9 Eh 4.6 4.4 e 0.5 HD 9.1 8.9 HE 9.1 8.9 L 1 Lp 0.75 0.45 v 0.2 w 0.08 y 0.08 ZD(1) ZE(1) 0.9 0.6 0.9 0.6 7 0
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT545-2 REFERENCES IEC JEDEC MS-026 JEITA EUROPEAN PROJECTION
ISSUE DATE 03-04-07 04-01-29
Fig 10. Package outline diagram.
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SAF7167AHW
YUV-to-RGB digital-to-analog converter
14. Soldering
14.1 Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
14.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 C to 270 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept:
* below 225 C (SnPb process) or below 245 C (Pb-free process)
- for all BGA, HTSSON..T and SSOP..T packages - for packages with a thickness 2.5 mm - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages.
* below 240 C (SnPb process) or below 260 C (Pb-free process) for packages with a
thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
14.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;
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Product data sheet
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Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
- smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
* For packages with leads on four sides, the footprint must be placed at a 45 angle to
the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
14.4 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 C and 320 C.
14.5 Package related soldering information
Table 16: Package [1] BGA, HTSSON..T [3], LBGA, LFBGA, SQFP, SSOP..T [3], TFBGA, USON, VFBGA DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC [5], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP CWQCCN..L [8], PMFP [9], WQCCN..L [8]
[1] [2]
Suitability of surface mount IC packages for wave and reflow soldering methods Soldering method Wave not suitable not suitable [4] Reflow [2] suitable suitable
suitable not not recommended [5] [6] recommended [7]
suitable suitable suitable not suitable
not suitable
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible.
[3]
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Product data sheet
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SAF7167AHW
YUV-to-RGB digital-to-analog converter
[4]
These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP, TSSOP, VSO and VSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate soldering profile can be provided on request. Hot bar soldering or manual soldering is suitable for PMFP packages.
[5] [6] [7] [8]
[9]
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Product data sheet
Rev. 01 -- 29 June 2004
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SAF7167AHW
YUV-to-RGB digital-to-analog converter
15. Revision history
Table 17: Revision history Release date 20040629 Data sheet status Product data Change notice Order number 9397 750 12667 Supersedes Document ID SAF7167AHW_1
9397 750 12667
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Product data sheet
Rev. 01 -- 29 June 2004
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SAF7167AHW
YUV-to-RGB digital-to-analog converter
16. Data sheet status
Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
19. Licenses
Purchase of Philips I2C-bus components Purchase of Philips I2C-bus components conveys a license under the Philips' I2C-bus patent to use the components in the I2C-bus system provided the system conforms to the I2C-bus specification defined by Koninklijke Philips Electronics N.V. This specification can be ordered using the code 9398 393 40011.
18. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
20. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
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(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 -- 29 June 2004
20 of 21
Philips Semiconductors
SAF7167AHW
YUV-to-RGB digital-to-analog converter
21. Contents
1 2 3 4 5 6 6.1 6.2 7 7.1 7.1.1 7.1.2 7.1.3 7.2 7.3 7.4 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 14.5 15 16 17 18 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 5 Video data path. . . . . . . . . . . . . . . . . . . . . . . . . 5 Re-formatter . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 YUV-to-RGB matrix. . . . . . . . . . . . . . . . . . . . . . 7 Triple 8-bit DACs . . . . . . . . . . . . . . . . . . . . . . . . 7 Analog mixers and keying control . . . . . . . . . . . 7 Voltage output amplifiers . . . . . . . . . . . . . . . . . 8 I2C-bus control . . . . . . . . . . . . . . . . . . . . . . . . . 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 10 Thermal characteristics. . . . . . . . . . . . . . . . . . 10 Static characteristics. . . . . . . . . . . . . . . . . . . . 10 Dynamic characteristics . . . . . . . . . . . . . . . . . 11 Application information. . . . . . . . . . . . . . . . . . 14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 16 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 16 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 17 Package related soldering information . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 20 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information . . . . . . . . . . . . . . . . . . . . 20
(c) Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 29 June 2004 Document order number: 9397 750 12667
Published in The Netherlands

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