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 PD-97277 Rev A
IRAM336-025SB Series
Integrated Power Hybrid IC for Appliance Motor Drive Applications
Description
International Rectifier's IRAM336-025SB is a multi-chip Hybrid IC developed for low power appliance motor control applications such as Fans, Pumps, and refrigerator compressors. The compact Single in line (SIP-S) package minimizes PCB space. Several built-in protection features such as temperature feedback, shoot through prevention, under voltage lockout, and shutdown input makes this a very robust solution. The combination of highly efficient high voltage MOSFETs and the industry benchmark 3-phase HVIC driver (3.3V/5V input compatible) and thermally enhanced package makes this a highly competitive solution. The bootstrapped power supplies for the high side drivers can be generated using internal bootstrap diodes eliminating the need for isolated power supplies. This feature reduces the component count, board space, and cost of the system.
3 Phase Inverter HIC 2A, 500V
Features
* * * * * * * * Motor Power up to 250W / 85~253 Vac. Integrated Gate Drivers and Bootstrap Diodes. Over-current Shut-Down function. Under-voltage lockout for all switches. Matched propagation delay for all channels. Schmitt-triggered input logic. Cross-conduction prevention logic. Lower di/dt gate driver for better noise immunity.
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to VSS. VDSS Vbus Io @ TC=25C Io @ TC=100C Ipk @ TC=25C Pd TJ (MOSFET & IC) TC TSTG T MOSFET Blocking Voltage Positive DC Bus Input Voltage RMS Phase Current RMS Phase Current (Note 1) Maximum Peak Current (tp<100s) Maximum Power dissipation per Fet @ TC =25C Maximum Operating Junction Temperature Operating Case temperature Range Storage Temperature Range Mounting torque (M3 screw)
+
500 400 2.0 1.0 6.0 15 +150 -20 to +100 -40 to +125 0.6
V V A W C Nm
Note 1: Sinusoidal Modulation at V =360V, TJ=150C, FPWM=20kHz, FMOD=50Hz, MI=0.8, PF=0.6, See Figure 5.
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IRAM336-025SB
Internal Electrical Schematic - IRAM336-025SB
Vbus + (3)
M1
M2
M3
M4
M5
M6
GND (2)
R1 VB1 (9) U, VS1 (8) VB2 (7) V, VS2 (6) VB3 (5) W, VS3 (4)
R2
R3
R4
R5
R6
Internal to Driver IC
23 VS1 24 HO1 25 VB1 1 VCC
22 21 20 19 18 17 VB2 HO2 VS2 VB3 HO3 VS3
LO1 16 LO2 15
RB HIN1 (11) HIN2 (12) HIN3 (13) LIN1 (14) LIN2 (15) LIN3 (16) ITRIP (10) Fault/En (17) TH (1)
RTH
Driver IC
2 HIN1 3 HIN2 4 HIN3 5 LIN1 LIN2 LIN3 F TTRIP EN 6 7 8 9 10
LO3 14
RCIN VSS COM 11 12 13
R7
C2 C1 R9
VDD (18) VSS (19)
2
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IRAM336-025SB
Absolute Maximum Ratings (Continued)
Absolute Maximum Ratings indicate substained limits beyond which damage to the device may occur. All voltage paramaters are absolute voltages referenced to VSS. VS1,2,3 VB1,2,3 VDD High side floating supply offset voltage High side floating supply voltage Low Side and logic fixed supply voltage Input voltage LIN, HIN, Fault/EN, ITrip VB1,2,3 - 20 -0.3 -0.3 VB1,2,3 +0.3 500 20 Lower of (VSS+15V) or VDD+0.3V V V V
VIN, VF/EN, VITRIP
-0.3
V
MOSFET Characteristics
VBIAS (VCC, VB) = 15V and TA = 25C unless otherwise specified. The VDD parameter is referenced to VSS. Symbol V(BR)DSS IDSS RDS(ON) VFM Parameter Drain-to-Source Breakdown Voltage Drain-to-Source Leakage Current Drain-to-Source On Resistance Diode Forward Voltage Drop Min 500 ----------Typ --5 2.2 5.5 0.87 0.76 Max --100 2.7 --1.0 --V Units Conditions V A VIN=5V, ID=250A VIN=5V, V+=500V ID=1.0A, VDD=15V ID=1.0A, VDD=15V, TJ=150C IF=1.0A IF=1.0A, TJ=150C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltages are absolute referenced to VSS. The VS offset is tested with all supplies biased at 15V differential. Symbol V
+
Definition Positive Bus Input Voltage High side floating supply voltage Low side and logic fixed supply voltage ITRIP input voltage
Min --VS+10 10 VSS VSS ---
Typ --VS+15 15 -------
Max 360 VS+20 20 VSS+5 VSS+5 20
Units V
VB1,2,3 VDD VITRIP
V V KHz
VIN, VF/EN, VITRIP Logic input voltage LIN, HIN, Fault/EN, ITRIP - Note 2 Fp Maximum PWM Carrier Frequency
Note 2: Logic operational for Vs from COM-5V to VSS+500V. Logic state held for Vs from VSS-5V to VSS-VBS. (please refer to DT97-3 for more details).
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IRAM336-025SB
Static Electrical Characteristics (TJ= 25C Unless Otherwise Specified)
VBIAS (VDD, VBS1,2,3)=15V, unless otherwise specified. The VIN and IIN parameters are referenced to VSS and are applicable to all six channels (Static Electrical Characteristics are Based on Driver IC Data Sheet). Symbol VEN,th+ VEN,thVDDUV+, VBSUV+ VDDUV-, VBSUVIQBS IQDD ILK RB Definition Enable Positive going threshold Enable Negative going threshold VDD and VBS supply undervoltage, Positive going threshold VDD and VBS supply undervoltage, Negative going threshold Quiescent VBS supply current Quiescent VDD supply current Offset Supply Leakage Current Internal BS Diode RON (see Integrated BS Functionality page 10) Min --0.8 8 7.4 --------Typ ----8.9 8.2 70 3 --200 Max 2.5 --9.8 9 120 4 50 --Units V V V V A mA A
Dynamic Electrical Characteristics (TJ= 25C Unless Otherwise Specified)
Symbol TON TOFF Parameter Input to Output propagation turnon delay time (see fig.13a) Input to Output propagation turnoff delay time (see fig. 13b) Min ----Typ 750 920 Max ----Units Conditions ns ID=1.5A, V+=360V ns
Thermal and Mechanical Characteristics
Symbol Rth(J-C) Parameter Thermal resistance, per FET Min --Typ 5.8 Max 8.0 Units Conditions C/W Flat, Insulation Material.
Internal NTC - Thermistor Characteristics
Parameter R25 R125 B Definition Resistance Resistance B-constant (25-50C) Min 97 2.25 4208 -40 --Typ 100 2.52 4250 --1 Max 103 2.8 4293 125 --Units Conditions k k k C mW/C TC = 25C TC = 25C TC = 125C R2 = R1e [B(1/T2 - 1/T1)]
Temperature Range Typ. Dissipation constant
4
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IRAM336-025SB
Figure 1. Input/Output Timing Diagram
Note 3: The shaded area indicates that both high-side and low-side switches are off and therefore the half-
bridge output voltage would be determined by the direction of current flow in the load.
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IRAM336-025SB
HIN1,2,3
LIN1,2,3
50%
50%
ITRIP
U,V,W
50%
50%
TITRIP
TFLT-CLR
Figure 2. ITRIP Timing Waveform
Note 4: The shaded area indicates that both high-side and low-side switches are off and therefore the half-
bridge output voltage would be determined by the direction of current flow in the load.
Input-Output Logic Level Table
FLT- EN 1 1 1 1 0 ITRIP 0 0 0 1 X HIN1,2,3 LIN1,2,3 0 1 1 X X 1 0 1 X X U,V,W V+ 0 Off Off Off
6
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IRAM336-025SB
Typical Application Circuit - IRAM336-025SB
1
IRAM336-025SB
Date Code Lot #
19
Application Circuit Recommendation
1. Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible to reduce ringing and EMI problems. Additional high frequency ceramic capacitor mounted close to the module pins will further improve performance. 2. In order to provide good decoupling between VCC-VSS and Vb-Vs terminals, the capacitors shown connected between these terminals should be located very close to the module pins. Additional high frequency capacitors, typically 0.1F, are strongly recommended. 3. Value of the boot-strap capacitors depends upon the switching frequency. Their selection should be made based on IR design tip DN 98-2a or application note AN-1044 or Figure 12. 4. WARNING! Please note that after approx. 8ms the FAULT is automatically reset (see Dynamic Characteristics Table on page 5). PWM generator must be disabled within automatic reset time (TFLT-CLR) to guarantee shutdown of the system, over-current condition must be cleared before resuming operation. 5. The case of the module is connected to the negative DC Bus and is NOT Isolated. It is recommended to provide isolation material between case and heat sink to avoid electrical shock.
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IRAM336-025SB
Module Pin-Out Description
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Name TH VV W,VS3 VB3 V,VS2 VB2 U,VS1 VB1 ITRIP HIN1 HIN2 HIN3 LIN1 LIN2 LIN3 FAULT/EN VDD VSS
+
Description Temperature Feedback Negative Bus Input Voltage Positive Bus Input Voltage Output 3 - High Side Floating Supply Offset Voltage High Side Floating Supply Voltage 3 Output 2 - High Side Floating Supply Offset Voltage High Side Floating Supply voltage 2 Output 1 - High Side Floating Supply Offset Voltage High Side Floating Supply voltage 1 Current Feedback & Shut-down Function Logic Input High Side Gate Driver - Phase 1 Logic Input High Side Gate Driver - Phase 2 Logic Input High Side Gate Driver - Phase 3 Logic Input Low Side Gate Driver - Phase 1 Logic Input Low Side Gate Driver - Phase 2 Logic Input Low Side Gate Driver - Phase 3 Fault Indicator & Enable Function +15V Main Supply Negative Main Supply
1
19
8
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IRAM336-025SB
Integrated Bootstrap Functionality
The internal Driver IC in the IRAM336-025SB embeds an integrated bootstrap FET that allows an alternative drive of the bootstrap supply for a wide range of applications. There is one bootstrap FET for each channel and it is connected between each of the floating supply (VB1, VB2, VB3) and Vcc as shown in Figure 3.
Figure 3. Simplified BootFet Connection The Bootstrap FET of each channel follows the state of the respective low side output stage (i.e., bootFet is ON when LO is high, it is OFF when LO is low), unless the VB voltage is higher than approximately 1.1(Vcc). In that case the bootstrap FET stays off until the Vs voltage returns below that threshold (see Fig. 4).
Figure 4. State Diagram Bootstrap FET is suitable for most PWM modulation schemes and can be used either in parallel with the external bootstrap network (diode+resistor) or as a replacement of it. The use of the integrated bootstrap as a replacement of the external bootstrap network may have some limitations in the following situations: When used in non-complementary PWM schemes (typically 6-step modulations). At a very high PWM duty cycle due to the bootstrap FET equivalent resistance (RBS, see page 5).
In these cases, better performances can be achieved by using an external bootstrap network.
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IRAM336-025SB
1.6 Maximum Output Phase RMS Current - A 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 2 4 6 8 10 12 14 16 18 20 PWM Sw itching Frequency - kHz TC = 80C TC = 90C TC = 100C
TJ = 150C Sinusoidal Modulation
Figure 5. Maximum Sinusoidal Phase Current vs. PWM Switching Frequency Sinusoidal Modulation, V+=360V, TJ=150C, FMOD=50Hz, MI=0.8, PF=0.6
1.4 Maximum Output Phase RMS Current - A 1.2 1 0.8 0.6 0.4 0.2 0 1 10 Modulation Frequency - Hz 100 FPWM = 12kHz FPWM = 16kHz FPWM = 20kHz
TJ = 150C Sinusoidal Modulation
Figure 6. Maximum Sinusoidal Phase Current vs. Modulation Frequency Sinusoidal Modulation, V+=360V, TJ=150C, MI=0.8, PF=0.6 10
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IRAM336-025SB
35 30 Total Power Loss- W 25 20 15 10 5 0 0 2 4 6 8 10 12 14 16 18 20 PWM Sw itching Frequency - kHz
TJ = 150C Sinusoidal Modulation
IOUT = 1.2A IOUT = 1.0A IOUT = 0.8A
Figure 7. Total Power Losses vs. PWM Switching Frequency Sinusoidal Modulation, V+=360V, TJ=150C, MI=0.8, PF=0.6
50 45 40 Total Power Loss - W 35 30 25 20 15 10 5 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 Output Phase Current - ARMS FPWM = 20kHz FPWM = 16kHz FPWM = 12kHz
TJ = 150C Sinusoidal Modulation
Figure 8. Total Power Losses vs. Output Phase Current Sinusoidal Modulation, V+=360V, TJ=150C, MI=0.8, PF=0.6
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IRAM336-025SB
150 Max Allowable Case Temperature - C
125
TC is limited to 100C
100
75 50 FPWM = 12kHz FPWM = 16kHz FPWM = 20kHz
25
0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 Output Phase Current - ARMS
Figure 9. Maximum Allowable Case Temperature vs. Output RMS Current per Phase Sinusoidal Modulation, V+=360V, TJ=150C, MI=0.8, PF=0.6
160 TJ avg = 1.181 x TT herm + 9.728 MOSFET Junction Temperature - C 150 140 130 120 110 100 90 80 70 70 75 80 85 90 95 100 105 110 115 120 Internal Therm istor Tem perature Equivalent Read Out - C 118.8
Figure 10. Estimated Maximum MOSFET Junction Temperature vs. Thermistor Temperature Sinusoidal Modulation, V+=360V, TJ=150C, FPWM=20KHz, FMOD=50Hz, MI=0.8, PF=0.6
12
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IRAM336-025SB
5.0 4.5 Thermistor Pin Read-Out Voltage - V 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5
TTHERM RTHERM TTHERM RTHERM TTHERM RTHERM C C C -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 4397119 3088599 2197225 1581881 1151037 846579 628988 471632 357012 272500 209710 162651 127080 25 30 35 40 45 50 55 60 65 70 75 80 85 100000 79222 63167 50677 40904 33195 27091 22224 18322 15184 12635 10566 8873 90 95 100 105 110 115 120 125 130 135 140 145 150 7481 6337 5384 4594 3934 3380 2916 2522 2190 1907 1665 1459 1282
Min Avg. Max
0.0 -40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 Therm istor Tem perature - C
Figure 11. Thermistor Readout vs. Temperature (12Kohm pull-up resistor, 5V) and Normal Thermistor Resistance values vs. Temperature Table.
11.0
10F
10.0 Recommended Bootstrap Capacitor - F 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 0 5 10 PWM Frequency - kHz 15 20
4.7F 3.3F 2.2F 1.5F 1F
Figure 12. Recommended Bootstrap Capacitor Value vs. Switching Frequency
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IRAM336-025SB
Figure 13. Switching Parameter Definitions
VDS
50% HIN /LIN
ID
ID
90% ID
VDS
90% ID
50% VDS
50% HIN /LIN
HIN /LIN
HIN /LIN
50% VCE 10% ID
10% ID
tr TON
Figure 13a. Input to Output propagation turn-on delay time.
tf TOFF
Figure 13b. Input to Output propagation turn-off delay time.
Figure 13c. Diode Reverse Recovery.
14
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IRAM336-025SB
Figure CT1. Switching Loss Circuit
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IRAM336-025SB
Package Outline IRAM336-025SB
note3
IRAM136-025SB
note5 note2 note4
note1: Unit Tolerance is +0.4mm, Unless Otherwise Specified. note2: Mirror Surface Mark indicates Pin1 Identification. note3: Characters Font in this drawing differs from Font shown on Module. note4: Lot Code Marking. Characters Font in this drawing differs from Font shown on Module. note5: Non-Isolated Back Side.
Data and Specifications are subject to change without notice. For mounting instruction see AN-1049.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information 7/2007 16
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