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| Preliminary Technical Data FEATURES Low Power, 5-Electrode Electrocardiogram (ECG) Analog Front End ADAS1000 APPLICATIONS ECG: Monitor & Diagnostic Bedside Patient Monitoring, Portable Telemetry, Holter, AED, Cardiac Defibrillators, Ambulatory Monitors, Pace Maker Programmer, Patient Transport, Stress testing, Biopotential signals in; digitized signals out 5 acquisition (ECG) channels + 1 driven lead Parallel ICs for up to 10+ Electrode measurements AC and DC Leads Off Detection Internal Pace Detection Algorithm on 3 leads Support for users own pace Thoracic Impedance Measurement (internal/external path) Selectable Reference Lead Scalable Noise vs. Power Control Low Power Operation from: 11mW (one lead), 14mW (3 leads), 19mW (all electrodes) Power Down Modes Lead or Electrode Data available Supports AAMI EC11:1991/(R)2001/(R)2007, EC13:2002/(R)2007, IEC60601-1 ed. 3.0b, 2005, IEC606012-25 ed. 1.0b, IEC60601-2-27 ed. 2.0, 2005 IEC60601-2-51 ed. 1.0, 2005 Fast Overload Recovery Low or High speed Data Output Rates Serial interface SPI(R)-/QSPITM-/DSP-compatible 56 lead LFCSP package (8mm x8mm) 64 lead LQFP package (10mm x10mm Body size) GENERAL DESCRIPTION The ADAS1000 measures electro cardiac (ECG) signals, thoracic impedance, pacing artifacts, lead on/off status and outputs this information in the form of a data frame supplying either Lead/Vector or Electrode data at programmable data rates. Its low power and small size make it suitable for portable, battery powered applications. The high performance also makes it suitable for higher end diagnostic machines. The ADAS1000 is designed to simplify the task of acquiring and ensuring quality ECG signals. Value-added cardiac postprocessing is executed externally on a DSP, microprocessor or FPGA. Several digital output options ensure flexibility when monitoring and analyzing signals. The ADAS1000 provides a low power, small data acquisition system for biopotential applications. FUNCTIONAL BLOCK DIAGRAM REFIN REFOUT Voltage Reference CALIBRATION DAC CAL_DAC _IO CM_IO SHIELD DRIVE RLD_SJ RLD_FB RLD_OUT DRIVEN LEAD AMP + SHIELD DRIVE AMP VCM (1.5V) - + RESPIRATION DAC AC LEADS OFF DAC COMMON MODE AMP LEADS OFF DETECTION MUXES PACE DETECTION CS SCLK STANDARD SERIAL INTERFACE 5 x ECG PATH ELECTRODES x5 SHIELD DRIVE AMP ADC FILTERS, CONTROL & INTERFACE LOGIC SDI SDO DRDY GPIO0/MCS EXT RESP 1 GPIO1/MSCLK AMP OPTIONAL EXT RESP 2 EXT RESP 3 ADC CLOCK GEN/OSC /EXTERNAL CLK SOURCE XTAL IN XTAL O UT GPIO2/MSDO GPIO3 CLK_IO SECONDARY MASTER INTERFACE FOR PACE RESPIRATION PATH 8.192MHz Cyrstal or Clock Figure 1 Functional Block Diagram Rev. Pr.D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.461.3113 (c)2011 Analog Devices, Inc. All rights reserved. ADAS1000 GENERAL DESCRIPTION - CONTINUED Preliminary Technical Data Auxiliary features that aid in better quality ECG signal acquisition include: multi-channel averaged driven lead, selectable reference drive, fast over load recovery, flexible respiration circuitry returning magnitude and phase information, internal pace detection algorithm operating on 3 leads and option of AC or DC leads off detection. Since ECG systems span different applications, the ADAS1000 features a novel power/noise scaling architecture where the noise can be reduced at the expense of increasing power consumption. Signal acquisition channels may be shutdown to save power. Data rates can be reduced to save power. To ease manufacturing tests, development, as well as offer holistic power-up testing, the ADAS1000 offers a suite of dc and ac test excitation via the CAL DAC, CRC redundancy testing in addition to read-back of all relevant register address space. The ADAS1000 is available in two package options, either a 56 lead LFCSP or a 64 lead LQFP package and is specified over -40C to +85C temperature range. Rev. Pr.D | Page 2 of 3 Preliminary Technical Data OUTLINE DIMENSIONS 8.10 8.00 SQ 7.90 0.60 MAX 0.60 MAX 43 42 ADAS1000 0.30 0.23 0.18 56 1 PIN 1 INDICATOR PIN 1 INDICATOR 7.85 7.75 SQ 7.65 0.50 BSC EXPOSED PAD 5.25 5.10 SQ 4.95 14 29 TOP VIEW 1.00 0.85 0.80 SEATING PLANE 12 MAX 0.80 MAX 0.65 TYP 0.50 0.40 0.30 0.05 MAX 0.02 NOM COPLANARITY 0.20 REF 0.08 28 15 BOTTOM VIEW 6.50 REF 0.25 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 081809-B COMPLIANT TO JEDEC STANDARDS MO-220-VLLD-2 Figure 2. 56 lead, 8mm x 8mm LFCSP 0.75 0.60 0.45 12.20 12.00 SQ 11.80 64 1 PIN 1 49 48 1.60 MAX TOP VIEW (PINS DOWN) 10.20 10.00 SQ 9.80 1.45 1.40 1.35 0.15 0.05 SEATING PLANE 0.20 0.09 7 3.5 0 16 17 32 33 0.08 COPLANARITY VIEW A VIEW A ROTATED 90 CCW 0.50 BSC LEAD PITCH 0.27 0.22 0.17 051706-A COMPLIANT TO JEDEC STANDARDS MS-026-BCD Figure 3. 64 lead, 10mm x 10mm body size LQFP ORDERING GUIDE Model 1 ADAS1000BCPZ ADAS1000BSTZ EVAL-ADAS1000EBZU1 1 Temperature Range -40C to +85C -40C to +85C 1st Silicon Evaluation kit Package Description 56 lead LFCSP 64 lead LQFP Lead Finish TBD TBD Package Option CP-56 ST-64 Z = Pb-free part. (c) 2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR09660-0-1/11(PrD) Rev. Pr.D | Page 3 of 3 |
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