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| Agilent HMMC-5617 6-18 GHz Medium Power Amplifier 1GG6-8002 Data Sheet Features * High efficiency: 11% @ P-1 dB typical * Output power, P-1 dB: 18 dBm typical * High gain: 14 dB typical * Flat gain response: 0.5 dB typical * Low input/output VSWR: < 1.7:1 typical * Single supply bias: 5 volts (@ 115 mA typical) with optional gate bias Chip size: Chip size tolerance: Chip thickness: Pad dimensions: 920 x 920 m (36.2 x 36.2 mils) 10 m (0.4 mils) 127 15 m (5.0 0.6 mils) 80 x 80 m (3.2 x 3.2 mils) Description The HMMC-5617 6 to 18 GHz MMIC is an efficient two-stage medium-power amplifier that is designed to be used as a cascadable intermediate gain block for EW applications. In communication systems, it can be used as an amplifier for a local oscillator or as a transmit amplifier. It is fabricated using a PHEMT integrated circuit structure that provides exceptional efficiency and flat gain performance. During typical operation, with a single 5-volt DC power supply, each gain stage is biased for Class-A operation for optimal power output with minimal distortion. The RF input and RF output has matching circuitry for use in 50 environments. The backside of the chip is both RF and DC ground. This helps simplify the assembly process and reduces assembly related performance variations and costs. Absolute maximum ratings1 Symbol VD1, VD2 VG1 VG2 ID1 ID2 Pin Tch TA Tst Tmax 1 2 3 Parameters/conditions Drain supply voltage Optional gate supply voltage Optional gate supply voltage Drain supply current Drain supply current RF input power2 Channel temperature3 Backside ambient temperature Storage temperature Maximum assembly temperature Minimum Maximum 5.5 Units Volts Volts Volts mA mA dBm C C C C -5 -10 +1 +1 70 84 20 160 -55 -65 +100 +150 300 Absolute maximum ratings for continuous operation unless otherwise noted. Operating at this power level for extended (continuous) periods is not recommended. Refer to DC specifications/physical properties table for derating information. DC specifications/physical properties1 Symbol VD1, VD2 ID1 ID2 ID1 + ID2 VP1 IG1 VP2 IG2 ch-bs Tch 1 2 3 4 Parameters/conditions Drain supply voltage Stage-one drain supply current (VD1 = 5 V, VG1 = open or ground) Stage-two drain supply current (VD2 = 5 V, VG2 = open or ground) Total drain supply current (VD1 = VD2 = 5 V, VG1 = VG2 = open or ground) Optional input-stage gate supply pinch-off voltage (VD1 = 5 V, ID1 < 3 mA: input stage OFF2) Gate supply current (input stage OFF2) Optional output-stage gate supply pinch-off voltage (VD2 = 5 V, ID2 < 3.6 mA: output stage OFF2) Gate supply current (output stage OFF2) Thermal resistance3 (channel-to-backside at Tch = 50C) Channel temperature4 (TA = 100C, MTTF > 106 hrs, VD1 = VD2 = 5 V, VG1 = VG2 = open) Minimum 3.0 Typical 5.0 50 65 115 Maximum 5.5 Units Volts mA mA 140 mA Volts mA Volts mA C/Watt C -4 -2.8 0.9 -7.5 -5.3 1.7 87 150 Backside ambient operating temperature TA = 25C unless otherwise noted. The specified FET stage is in the OFF state when biased with a gate voltage level that is sufficient to pinch off the drain current. ~ Thermal resistance (in C/Watt) at a channel temperature T(C) can be estimated using the equation: (T) = 87 x [T(C)+273] / [150 C+273]. Derate MTTF by a factor of two for every 8C above Tch. RF specifications (TA = 25C, VD1 = VD2 = 5 V, VG1 = VG2 = open or ground, Z0 = 50 ) 6 to 18 GHz Symbol Gain Gain S21/T (RLin)MIN (RLout)MIN Isolation P-1 dB PSAT NF 2 Parameters/conditions Small signal gain Gain flatness Temperature coefficient of gain Minimum input return loss Minimum output return loss Reverse isolation Output power at 1 dB gain compression Saturated output power (Pin = 10 dBm) Noise figure Typical 14 0.5 -0.025 12 12 40 18 20 5.5 17 18.5 7 10 10 Minimum 12 Maximum Units dB dB dB/C dB dB dB dBm dBm dB Applications The HMMC-5617 is a GaAs MMIC medium-power amplifier designed for optimum Class-A efficiency and flat gain performance from 6 GHz to 18 GHz. It has applications as a cascadable gain stage for EW amplifier, buffer stages, LO-port driver, phased-array radar, and transmitter amplifiers used in commercial communication systems. The MMIC solution is a cost effective alternative to hybrid assemblies. Biasing and operation The MMIC amplifier is normally biased with a single positive drain supply connected to both VD1 and VD2 bond pads as shown in Figures 10 and 11. The recommended drain supply voltage is 3 to 5 volts. If desired, the first stage drain bonding pad can be biased separately to provide a small amount of gain slope control or bandwidth extension as demonstrated in Figure 2. No ground wires are required because all ground connections are made with plated through-holes to the backside of the device. Gate bias pads (VG1 and VG2) are also provided to allow adjustments in gain, RF output power, and DC power dissipation, if necessary. No connection to the gate pads is needed for single drain-bias operation. However, for custom applications, the DC current flowing through the input and/or output gain stage may be adjusted by applying a voltage to the gate bias pad(s) as shown in Figure 11. A negative gate-pad voltage will decrease the drain current. The gate-pad voltage is approximately zero volts during operation with no DC gate supply. Refer to the "Absolute maximum ratings" table for allowed DC and thermal conditions. Assembly techniques It is recommended that the RF input, RF output, and DC supply connections be made using 0.7 mil diameter gold wire. The device has been designed so that optimum performance is realized when the RF input and RF output bond-wire inductance is approximately 0.2 nH (10 mils) as demonstrated in Figures 4, 6, and 7. GaAs MMICs are ESD sensitive. ESD preventive measures must be employed in all aspects of storage, handling, and assembly. MMIC ESD precautions, handling considerations, die attach and bonding methods are critical factors in successful GaAs MMIC performance and reliability. Agilent application note #54, "GaAs MMIC ESD, Die Attach and Bonding Guidelines" provides basic information on these subjects. Additional references AN #49, "HMMC-5618 (6-20 GHz) Amplifier" PN #14, "HMMC-5618 Driven by an HMMC-5020" VD2 VD1 Feedback network Matching Matching Out In Matching 2 K 2 K 2 K 1 K VG2 VG1 Figure 1. Simplified schematic diagram 3 S-Parameters1 (TA = 25C, VD1 = VD2 = 5.0 V, VG1 = VG2 = Open, Z0 = 50 ) Frequency (GHz) 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5 17.0 17.5 18.0 18.5 19.0 19.5 20.0 20.5 21.0 21.5 22.0 1 S11 dB -4.8 -5.6 -6.0 -6.2 -6.7 -8.8 -11.9 -14.4 -15.8 -16.4 -16.3 -16.0 -15.4 -14.9 -14.5 -14.1 -13.7 -13.4 -13.2 -13.0 -13.0 -13.0 -13.1 -13.3 -13.5 -13.9 -14.5 -15.2 -16.2 -17.5 -19.2 -21.1 -22.1 -20.7 -18.2 -15.4 -13.0 -11.1 -9.6 -8.3 -7.3 mag 0.574 0.526 0.501 0.492 0.461 0.363 0.255 0.190 0.163 0.152 0.153 0.159 0.171 0.180 0.189 0.198 0.206 0.214 0.219 0.223 0.224 0.224 0.221 0.217 0.210 0.201 0.188 0.174 0.155 0.133 0.110 0.088 0.079 0.092 0.123 0.169 0.224 0.278 0.332 0.384 0.432 ang -140.8 -166.9 166.4 136.2 99.3 60.6 30.7 10.9 -3.8 -16.2 -27.4 -38.0 -48.2 -58.5 -67.5 -75.8 -83.6 -91.2 -98.3 -105.1 -111.4 -117.5 -123.2 -128.7 -134.1 -138.9 -143.4 -147.2 -150.0 -150.7 -147.8 -138.0 -117.7 -96.6 -83.9 -80.3 -81.8 -85.7 -91.2 -97.7 -284.7 S12 dB -71.2 -74.4 -73.6 -55.9 -49.4 -45.5 -43.8 -43.8 -43.4 -43.4 -43.1 -43.0 -42.8 -42.7 -42.5 -42.3 -42.0 -42.0 -42.0 -41.7 -41.3 -40.9 -40.8 -40.5 -40.2 -40.0 -39.2 -39.1 -38.6 -38.4 -37.8 -37.3 -36.7 -35.9 -35.4 -35.0 -34.8 -34.7 -34.2 -34.3 -34.2 mag 0.000 0.000 0.000 0.002 0.003 0.005 0.006 0.006 0.007 0.007 0.007 0.007 0.007 0.007 0.008 0.008 0.008 0.008 0.008 0.008 0.009 0.009 0.009 0.009 0.010 0.010 0.011 0.011 0.012 0.012 0.013 0.014 0.015 0.016 0.017 0.018 0.018 0.018 0.020 0.019 0.020 ang -73.5 -12.0 -41.3 -51.8 -94.9 -140.6 -179.4 152.8 132.6 116.8 101.8 87.6 79.1 68.9 58.9 50.2 41.0 33.7 27.5 19.8 13.9 6.2 1.0 -6.7 -12.5 -17.5 -25.3 -31.8 -38.9 -45.8 -52.1 -60.7 -69.6 -74.8 -85.0 -95.7 -105.6 -114.9 -126.3 -137.2 -328.3 S21 dB -43.0 -25.3 -8.0 2.9 10.4 14.2 15.4 15.6 15.6 15.6 15.5 15.5 15.4 15.4 15.3 15.2 15.2 15.1 15.1 15.0 14.9 14.9 14.9 14.8 14.8 14.8 14.8 14.8 14.8 14.8 14.8 14.7 14.7 14.5 14.3 14.0 13.7 13.2 12.5 11.7 10.8 mag 0.0070 0.0544 0.3981 1.4008 3.3208 5.1331 5.9052 6.0539 6.0319 6.0062 5.9669 5.9318 5.8635 5.8567 5.8232 5.7757 5.7385 5.7043 5.6618 5.6180 5.5801 5.5525 5.5276 5.5138 5.5069 5.4997 5.5050 5.5089 5.5103 5.5013 5.4892 5.4475 5.4016 5.3231 5.2168 5.0371 4.8240 4.5580 4.2135 3.8489 3.4671 ang 117.3 -113.7 -124.1 -159.1 154.4 104.5 62.9 31.6 6.8 -14.1 -32.7 -49.7 -65.4 -80.0 -94.2 -107.8 -121.0 -133.8 -146.2 -158.4 -170.4 177.7 166.0 154.2 142.3 130.5 118.6 106.3 93.8 80.9 67.9 54.4 40.5 26.1 11.2 -4.3 -19.9 -36.4 -52.5 -68.9 -85.5 S22 dB -0.9 -1.6 -3.3 -6.1 -10.3 -16.7 -23.2 -22.0 -18.9 -16.8 -15.4 -14.3 -13.5 -12.9 -12.5 -12.2 -12.0 -11.9 -11.9 -12.0 -12.2 -12.5 -12.8 -13.1 -13.5 -13.9 -14.4 -14.7 -14.9 -14.9 -14.6 -14.3 -13.7 -13.3 -13.0 -12.9 -13.0 -13.3 -13.8 -14.0 -13.4 mag 0.901 0.835 0.687 0.498 0.305 0.147 0.069 0.079 0.114 0.144 0.171 0.193 0.212 0.227 0.237 0.246 0.252 0.254 0.253 0.250 0.245 0.238 0.230 0.221 0.211 0.201 0.191 0.184 0.180 0.180 0.186 0.194 0.206 0.217 0.224 0.226 0.225 0.217 0.205 0.199 0.214 ang -75.4 -99.7 -127.0 -156.7 171.1 133.8 76.1 21.3 -5.5 -19.6 -30.5 -39.4 -47.1 -54.4 -61.4 -67.8 -73.9 -79.6 -85.2 -90.0 -94.3 -98.2 -101.6 -104.3 -106.2 -107.1 -106.8 -105.4 -103.4 -100.3 -97.4 -95.6 -95.1 -96.0 -98.0 -99.4 -100.9 -99.8 -97.5 -90.2 -80.1 Data obtained from on-wafer measurements. 4 To VDD power supply Chip capacitor (100 pF) Locate near MMIC Gold plated shim (optional) To VDD power supply Chip capacitor (100 pF) Locate near MMIC Gold plated shim (optional) 800 pF Short bond wires 800 pF * RF input * RF out RF input * * RF out Bonding island or small chip-capacitor To VG1 power supply * 0.2 nH bond wire inductance (10 mils) * 0.2 nH bond wire inductance (10 mils) Bonding island or small chip-capacitor To VG2 power supply Figure 10. Assembly for single drain-bias operation Figure 11. Assembly with gate bias connections 0 920 145 VD1 355 573 VD2 IN 530 OUT 0 0 79 VG1 593 VG2 920 Note: All dimensions in micrometers. Figure 12. Bonding pad positions This data sheet contains a variety of typical and guaranteed performance data. The information supplied should not be interpreted as a complete list of circuit specifications. Customers considering the use of this, or other Agilent TCA GaAs ICs, for their design should obtain the current production specifications from Agilent TCA Marketing. In this data sheet the term typical refers to the 50th percentile performance. For additional information contact Agilent TSO Marketing at mmic_helpline@agilent.com. 5 Agilent Email Updates www.agilent.com/find/emailupdates Get the latest information on the products and applications you select. www.agilent.com For more information on Agilent Technologies' products, applications or services, please contact your local Agilent office. The complete list is available at: www.agilent.com/find/contactus Phone or Fax United States: (tel) 800 829 4444 (fax) 800 829 4433 Agilent Direct www.agilent.com/find/agilentdirect Quickly choose and use your test equipment solutions with confidence. www.agilent.com/find/open Agilent Open simplifies the process of connecting and programming test systems to help engineers design, validate and manufacture electronic products. Agilent offers open connectivity for a broad range of system-ready instruments, open industry software, PC-standard I/O and global support, which are combined to more easily integrate test system development. Canada: (tel) 877 894 4414 (fax) 800 746 4866 China: (tel) 800 810 0189 (fax) 800 820 2816 Europe: (tel) 31 20 547 2111 Japan: (tel) (81) 426 56 7832 (fax) (81) 426 56 7840 Korea: (tel) (080) 769 0800 (fax) (080) 769 0900 Latin America: (tel) (305) 269 7500 Taiwan: (tel) 0800 047 866 (fax) 0800 286 331 Other Asia Pacific Countries: (tel) (65) 6375 8100 (fax) (65) 6755 0042 Email: tm_ap@agilent.com Revised: February 5, 2007 Product specifications and descriptions in this document subject to change without notice. (c) Agilent Technologies, Inc. 2008 Printed in USA, August 8, 2008 5989-9479EN |
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