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IX6Q11 1 MHz, 300 Volt, 6 Ampere High & Low-side Driver for N-Channel MOSFETs and IGBTs Features * Floating High Side Driver with boot-strap Power supply along with a Low Side Driver. * Fully operational to 300V* * 50V/ns dV/dt immunity * Gate drive power supply range: 10 - 35V * Undervoltage lockout for both output drivers * Separate Logic power supply range: 3.3V to VCL * Built using the advantages and compatibility of CMOS and IXYS HDMOSTM processes * Latch-Up protected over entire operating range * High peak output current: 6A * Matched propagation delay for both outputs * Low output impedance * Low power supply current * Immune to negative voltage transients General Description The IX6Q11 Bridge Driver for N-channel MOSFETs and IGBTs with a high side and low side output, whose input signals reference the low side. The High Side driver can control a MOSFET or IGBT connected to a positive bus voltage up to 300V in dynamic conditions. The logic input stages are compatible with TTL or CMOS, have built-in hysteresis and are fully immune to latch up over the entire operating range. The IX6Q11 can withstand dV/dt on the output side up to 50V/ns. Ordering Information The IX6Q11 is available in the 14-Pin DIP, the 16-Pin SOIC, and the heat-sinkable 18-Pin SOIC CooltabTM packages. Part Number Package Type Applications * * * * * * Driving MOSFETs and IGBTs in half-bridge circuits High voltage, high side and low side drivers Motor Controls Switch Mode Power Supplies (SMPS) DC to DC Converters Class D Switching Amplifiers IX6Q11P7 IX6Q11S3 IX6Q11S6 14-Pin DIP 16-Pin SOIC 18-Pin SOIC Warning: The IX6Q11 is ESD Sensitive Precaution: when performing the High-Voltage tests, adequate safety precautions should be taken! * Operational voltage rating of 300V determined in a typical half-bridge circuit configuration (refer to Figure 9). Operational voltage in other circuit configurations may vary Figure 1. Typical Circuit Connection Up to 300V www..com (c) 2007 IXYS CORPORATION, All rights reserved IX6R11S6 IX6Q11S3 DS99910(10/07) IX6Q11 Figure 2 - IX6Q11 Functional Block Diagram VDD VCH VCH HIN 800K DG Low to HIN HIN High OUT RST IN UVCC Detect HS Isolated High Side VCL Gate Current Output HGO HS VDD VCL LIN 800K Low to High Side Delay Equalizer and Shutdown Shutdown Logic Gate Current Output LGO ENB 800K DG DG UVCC Detect LS 1 Ohm LS SYMBOL VDD HIN LIN ENB DG VCH HGO HS VCL LGO LS FUNCTION Logic Supply HS Input LS Input Enable Ground Supply Voltage Output Return Supply Voltage Output Ground Pin Description and Configuration DESCRIPTION Positive power supply for chip CMOS functions High side input signal, TTL or CMOS compatible; HGO in phase Low side input signal, TTL or CMOS compatible; LGO in phase Chip enable, active low. When driven high, both outputs go low Logic reference ground High side power supply, referenced to HS High side driver output High side voltage return pin Low side power supply, referenced to LS Low side driver output Low side voltage return pin 16-PIN SOIC 18-PIN SOIC w/CooltabTM 14-PIN DIP 8 N/C VDD HIN HGO VCH 7 9 6 IX6Q11P7 IX6Q11S3 10 HS N/C VCL LS LGO 5 www..com 11 ENB 12 4 LIN DG NC 3 13 2 14 1 Cooltab is a trademark of IXYS Corporation IXYS reserves the right to change limits, test conditions, and dimensions. IX6Q11S6 IX6Q11 Absolute Maximum Ratings Symbol Definition VCH VHS VHGO VCL VLGO VDD VDG VIN dVS/dt PD PD RTHJA RTHJc TJ TS TL High side floating supply voltage High side floating supply offset voltage High side floating output voltage Low side fixed supply voltage Low side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage(HIN & LIN) Allowable offset supply voltage transient Package power dissipation @ TA 25C (IX6Q11S3/P7) (IX6Q11S6) Package power dissipation @ TC 25C (IX6Q11S3/P7) (IX6Q11S6) Thermal resistance, junction-to-ambient (IX6Q11S3/P7) (IX6Q11S6) Thermal resistance, junction-to-case Junction Temperature Storage temperature Lead temperature (soldering, 10 s) -55 (IX6Q11S3/P7) (IX6Q11S6) Min -0.3 -200 VHS-0.3 -0.3 -0.3 -0.3 VLS-3.8 VLS-0.3 Max +35 +300 VCH+0.3 35 VCL+0.3 VCL+0.3 VLS+3.8 VCL+0.3 50 1.25 1.4 2.5 43 100 90 50 3 150 150 300 Units V V V V V V V V V/ns W W W W K/W K/W K/W K/W o o o C C C Recommended Operating Conditions Symbol Definition VCH VHS VHGO VCL VDD VDG VIN TA High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side fixed supply voltage side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage(HIN, LIN, ENbar) Ambient Temperature Min VHS+10 -20 VHS 10 0 VDG+3 VLS-0.5 VDG -40 Max VHS+20 +300 VCH+20 20 VCC VDG+VCL VLS+0.5 VDD 125 Units V V V V V V V V o VLGO Low www..com C (c) 2007 IXYS CORPORATION, All rights reserved IX6Q11 Dynamic Electrical Characteristics* VCL = VCH = VDD = +15V, Cload = 5nF, and VDG = VLS unless otherwise specified. The dynamic electrical characteristics are measured using Figure 7. Symbol ton toff tenb tr tf tdm Definition Turn-on propagation delay Turn-off propagation delay Device not enable delay Turn-on rise time Turn-off fall time Delay matching, HS & LS turn-on/off Test Conditions VHS= 0V VHS= 300V Min Typ Max Units 110 130 94 125 ns ns ns ns ns ns 110 140 25 17 10 35 25 30 Static Electrical Characteristics Symbol Definition Test Conditions VINH Logic "1" input voltage, HIN, LIN, ENB VDD= VCL= 15V VINL Logic "0" input voltage, HIN, LIN, ENB VDD= VCL= 15V IO= 0A IO= 0A VHS= VCH= 300V VIN= 0V or VDD = 15V VIN= 0V or VDD = 15V VIN= 0V or VDD = 15V VIN= VDD VIN= 0V VHLGO // VHHGO High level output voltage, VCH-VHGO or VCL-VLGO VLLGO // VLHGO Low level output voltage, VHGO or VLGO IHL IQHS IQLS IQDD IIN+ IINVCHUV+ VCHUVV + HS to LS bias current. Quiescent VCH supply current Quiescent VCL supply current Quiescent VDD supply current Logic "1" input bias current Logic "0" input voltage Min Typ Max Units 9.5 V 0 6 0.1 0.1 170 1 1 15 20 3 3 30 40 1 7.5 8.6 7 7.4 8.2 8.5 9.7 9.4 9.6 9.4 V V V A mA mA A A A V V V V A -5 A VCH supply undervoltage positive going threshold. VCH supply undervoltage negative going threshold. V supply undervoltage positive going threshold CLUV CL www..com VCLUVIGO+ IGO- VCL supply undervoltage negative going threshold. HS or LS Output high short circuit current; V HS or LS Output low short circuit current; V GO 7 8.2 4 6 -7 = 15V, VIN= 15V, PW<10us GO = 0V, VIN=0V, PW<10us * These characteristics are guaranteed by design only. Tested on a sample basis. IXYS reserves the right to change limits, test conditions, and dimensions. IX6Q11 ENB 50% HIN/LIN ENB LGO/HGO Figure 3. INPUT/OUPUT Timing Diagram LGO/HGO tenb 10% Figure 4. ENABLE Waveform Definitions 50% HIN/LIN tdon tr 50% 50% HIN LIN 50% Input Signal tdoff 90% 10% 90% 10% tdm tf LGO HGO 10% 90% tdm LGO HGO HGO/LGO Outgoing Signal Figure 5. Definitions of Switching Time Waveforms Figure 6. Definitions of Delay Matching Waveforms VCL=15V VCH + VHS 10 uF (0 to 300V) 10 uF 0.1 uF 9 10 11 12 13 2 3 6 5 7 0.1 uF 10 uF HGO CL HIN ENB LIN www..com IX6Q11 1 CL LGO Figure 7. Switching Time Test Circuit (c) 2007 IXYS CORPORATION, All rights reserved IX6Q11 U1 + C2 10uF IX6Q11 HS VDD HIN ENB LIN DG LS U2 1 V1 BATTERY 18V Vin 15V Vout 3 VCH HGO HS LS VCL LGO LS C5 0.1uF HGO HS OUTPUT MONITOR HV SCOPE PROBE GND2 L1 200uH C6 0.1uF + C3 10uF GND2 DSEI 12-10A D1 + C1 100uF/250V 78L15 2 GND GND1 dVs/dt > 50V/ns HV 300V GND1 15V V3 C8 PULSE BNC 2 3 GND2 0.1uF U3 VCC 16 OUT 15 10K GND3 2 U2 1,8 6,7 IXDD414 C9 10uF Q1 D2 DSEI12-10A IXFP4N100Q GND3 Measure dV/dt (HV Scope Probe) HCPL-314J 1/2 14 VEE 4,5 -600V Figure 8. Test circuit for allowable offset supply voltage transient. VCH 10uF/35V 1 VIN+ NDY1215C Up to 300V 3 1 IXCP 10M90S 2 10 11 12 1uF/35V MLCC VOUTVOUT+ GND VOUT- 15 14 VOUT+ 1k 30 5.1 10 1uF/35V MLCC 11 12 10uF/35V 1k 1k 1k 1N5817 15 IXTH14N60P VDD HIN ENB LIN 13 14 15 16 17 18 HS NC NC VDD HIN ENB LIN DG LS VCH HGO HS NC NC LS VCL LGO LS 9 8 7 6 5 4 3 2 1 20/5W 20/5W IX6Q11S6 18uH 5.1 15 0.1uF/1kV 1N5817 0.47uF IXTH14N60P 0.47uF www..com VCL 10uF/35V 1uF/35V MLCC Figure 9. Test circuit for high frequency, 750kHz, operation. VDD, VCH, VCL = 15V IXYS reserves the right to change limits, test conditions, and dimensions. IX6Q11 120 Low side 100 90 High side Time - nanoseconds Time - nanoseconds 100 80 70 60 50 40 30 20 10 Low side 80 High side 60 40 20 0 -100 -50 0 50 100 150 0 -100 -50 0 50 100 150 Temperature - Degrees C Fig. 10a. High and Low side turn-on delay times 160 140 Temperature - Degrees C Fig. 10b. High and Low side turn-off delay times 100 90 Time - Nanoseconds 120 100 80 60 40 20 0 0 5 Time - nanoseconds Low Side 80 70 60 50 High Side High Side Low Side 40 30 20 10 0 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40 VCL, VCH Supply Voltage - Volts VCL, VCH Supply Voltage Fig. 11a. High and Low side turn-on delay vs. VCL, VCH 180 160 Fig. 11b. High and Low side turn-off delay vs. VCL, VCH 140 120 Time - nanoseconds Time - nanoseconds 140 120 Low side 100 80 60 40 20 0 0 5 10 15 20 25 High side 100 80 High side 60 Low side 40 20 0 0 5 10 15 20 25 www..com VDD Supply Voltage - Volts VDD Supply Voltage - Volts Fig. 12a. High and Low side turn-on delay vs VDD (c) 2007 IXYS CORPORATION, All rights reserved Fig. 12b. High and Low side turn-off delay vs. VDD IX6Q11 Fig. 13a. High and Low side ENABLE (Shutdown) times vs. temperature. Fig.13b. High and Low side ENABLE (Shutdown) times vs. supply voltage. Fig. 13c. High and Low side ENABLE (Shutdown) times versus supply voltage. Fig. 14a. Turn-on and turn-off rise times vs. temperature. www..com Fig. 14b. Turn-on rise times vs. bias supply voltages IXYS reserves the right to change limits, test conditions, and dimensions. Fig. 14c. Turn-off delay times vs. bias supply voltages. IX6Q11 Offset Supply Leakage Current - 12 300 275 Maximum Logic Input Threshold - Volts 10 8 Max Logic '1' 250 225 200 Typical 6 4 Min Logic '0' 2 0 175 150 -50 0 4 8 12 16 20 -25 0 25 50 75 100 125 VDD Logic Supply Voltage - Volts Temperature - Degrees C Fig. 15. Logic input threshold voltage vs bias supply voltage. 60 Fig. 16. Offset supply leakage current vs. temperature. 50 Load: IXTU01N100 Logic Input Bias Current - 50 Case Temperature - C o 45 V = 300V 40 Maximum 40 V = 140V 30 20 Typical 35 30 10 0 0 2 4 6 8 10 12 14 16 18 20 25 100 200 300 400 500 600 700 800 900 1000 VDD Logic Supply Voltage (V) Fig. 17. Logic input current vs. bias voltage. 10 Frequency - kHz Fig. 18. IX6Q11S3 Case temperature rise vs. operating frequency 18 Output Source Current (A) Output Source Current (A) 9 8 7 6 Maximum 16 14 Maximum 12 10 8 6 4 2 0 10 15 20 25 30 35 Typical 5 www..com 4 3 2 Typical -50 -25 0 25 50 75 100 125 Temperature - Degrees C VBIAS Supply Voltage (V) Fig. 19a. Output source current vs. temperature (c) 2007 IXYS CORPORATION, All rights reserved Fig. 19b. Output source current vs supply voltage IX6Q11 - 12 - 20 Output Current - Amperes Output Current - Amperes - 11 - 10 -9 -8 -7 -6 -5 -4 -3 -2 -50 -25 0 25 50 75 100 125 Minimum Typical - 18 - 16 - 14 - 12 - 10 -8 -6 -4 -2 0 10 15 20 25 30 35 Minimum Typical Temperature - oC Bias Voltage - Volts Fig. 20a. Output sink current vs. temperature 15 14 13 12 11 10 9 8 7 6 5 -50 -25 0 25 50 75 100 125 Min Max Typ Fig. 20b. Output sink current vs. bias voltage 16 15 14 13 12 Max 11 10 Typ 9 8 7 Min 6 5 4 -50 -25 Undervoltage Lockout (+) - Volts Undervoltage Lockout (-) - Volts 0 25 50 75 100 125 Temperature - oC Temperature - oC Fig. 21a. VCH Undervoltage positive trip vs. temperature. Undervoltage Lockout (+) - Volts 15 14 13 12 11 10 9 7 6 5 Typ Max Fig. 21b. VCH Undervoltage negative trip vs. temperature Undervoltage Lockout (-) - Volts 15 14 13 12 11 10 9 8 7 6 5 -50 -25 0 25 50 75 100 125 Min Typ Max 8 www..com Min -50 -25 0 25 50 o 75 100 125 Temperature - C Temperature - oC Fig. 22a. VCL Undervoltage positive trip vs. temperature IXYS reserves the right to change limits, test conditions, and dimensions. Fig. 22b. VCL Undervoltage negative trip vs. temperature IX6Q11 1100 Maximum 1100 1000 VCH Current - A 1000 VCH Current - A Maximum 900 800 Typical 900 800 700 600 10 Typical 700 600 -50 -25 0 25 50 75 100 125 15 20 25 30 35 Temperature - oC VCH Voltage - Volts Fig. 23a. Quiescent current vs. temperature for the high side power supply. 1000 Fig. 23b. Quiescent current vs. voltage for the high side power supply. 75 950 Case Temperature - C Maximum Load Conditions: A: IXFK21N100F @ VCH= 300V B: IXFK21N100F @ VCH= 200V C: IXFH14N100Q @ VCH=300V D: IXFH14N100Q @ VCH=200V E: IXTU01N100 @ VCH= 300V F: IXTU01N100 @ VCH= 200V 70 65 60 55 50 45 40 35 30 25 o 900 VCL Current - A B 850 800 Typical A C D 750 700 650 600 -50 -25 0 25 50 75 100 125 E F 100 200 300 400 500 600 700 800 900 Temperature - oC Frequency - kHz Fig. 24. Quiescent current vs. temperature for the low side power supply 75 70 A B C D Load Conditions: A: IXFK21N100F @ VCH= 300V B: IXFK21N100F @ VCH= 200V C: IXFH14N100Q @ VCH=300V D: IXFH14N100Q @ VCH=200V E: IXTU01N100 @ VCH= 300V F: IXTU01N100 @ VCH= 200V Fig. 25. Case temperature rise vs. switching frequency for IX6Q11S6 Case Temperature - oC 65 60 55 50 45 40 www..com 35 30 E F 25 100 200 300 400 500 600 700 800 900 1000 Frequency - kHz Fig. 26. Case temperature rise vs. switching frequency for IX6Q11S3 (c) 2007 IXYS CORPORATION, All rights reserved IX6Q11 A2 b b2 c D D1 E E1 e eA eB L E H B C D E e H h L M N h x 45%%d D A e B A1 N L c M E H D A e h www..com e B D1 A1 h x 45 E1 L c IXYS reserves the right to change limits, test conditions, and dimensions. |
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