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www..com NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LDG TO-252 (DPAK) Lead-Free D PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 50m ID 12A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Energy Repetitive Avalanche Energy Power Dissipation 2 1 SYMBOL VGS LIMITS 20 12 8 45 60 3 48 20 -55 to 150 275 UNITS V TC = 25 C TC = 100 C ID IDM A L = 0.1mH L = 0.05mH TC = 25 C TC = 100 C EAS EAR PD Tj, Tstg TL mJ W Operating Junction & Storage Temperature Range Lead Temperature ( /16" from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient Case-to-Heatsink 1 2 1 C SYMBOL RJC RJA RCS TYPICAL MAXIMUM 3 75 UNITS C / W 1 Pulse width limited by maximum junction temperature. Duty cycle 1% ELECTRICAL CHARACTERISTICS (TC = 25 C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current V(BR)DSS VGS(th) IGSS IDSS VGS = 0V, ID = 250A VDS = VGS, ID = 250A VDS = 0V, VGS = 20V VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TJ = 125 C 25 0.8 1.2 2.5 250 nA 25 250 A V LIMITS UNIT MIN TYP MAX 1 AUG-17-2004 www..com NIKO-SEM On-State Drain Current1 Drain-Source On-State Resistance1 N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LDG TO-252 (DPAK) Lead-Free 12 70 50 16 120 90 A m S ID(ON) RDS(ON) gfs VDS = 10V, VGS = 10V VGS = 5V, ID = 12A VGS = 10V, ID = 12A VDS = 15V, ID = 12A DYNAMIC Forward Transconductance1 Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge2 Gate-Source Charge Gate-Drain Charge2 Turn-On Delay Time Rise Time 2 2 2 Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDS = 15V, RL = 1 ID 12A, VGS = 10V, RGS = 2.5 VDS = 0.5V(BR)DSS, VGS = 10V, ID = 6A VGS = 0V, VDS = 15V, f = 1MHz 450 200 60 15 2.0 7.0 6.0 6.0 20 5.0 nS nC pF Turn-Off Delay Time2 Fall Time2 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 C) Continuous Current Pulsed Current 3 IS ISM VSD trr IRM(REC) Qrr IF = IS, dlF/dt = 100A / S IF = IS, VGS = 0V 30 15 0.043 12 20 1.5 A V nS A C Forward Voltage1 Reverse Recovery Time Peak Reverse Recovery Current Reverse Recovery Charge 1 2 Pulse test : Pulse Width 300 sec, Duty Cycle 2%. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH "P3055LDG", DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name. 2 AUG-17-2004 www..com NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LDG TO-252 (DPAK) Lead-Free 3 AUG-17-2004 www..com NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LDG TO-252 (DPAK) Lead-Free TO-252 (DPAK) MECHANICAL DATA mm Dimension Min. A B C D E F G 9.35 2.2 0.45 0.89 0.45 0.03 5.2 Typ. Max. 10.4 2.4 0.6 1.5 0.69 0.23 6.2 H I J K L M N Dimension Min. 0.89 6.35 5.2 0.6 0.5 3.96 4.57 Typ. Max. 2.03 6.80 5.5 1 0.9 5.18 mm A B F C H G L 3 1 K M 2 J I D E 4 AUG-17-2004 |
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