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PD -97364
IRLS3034PBF IRLSL3034PbF
Applications www..com l DC Motor Drive l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Optimized for Logic Level Drive l Very Low RDS(ON) at 4.5V VGS l Superior R*Q at 4.5V VGS l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free
G
HEXFET(R) Power MOSFET
D
G S
VDSS 40V RDS(on) typ. 1.4m: max. 1.7m: ID (Silicon Limited) 343Ac ID (Package Limited) 195A
D
D
S G G
D
S
D2Pak IRLS3034PBF
TO-262 IRLSL3034PbF
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25C ID @ TC = 100C ID @ TC = 25C IDM PD @TC = 25C VGS dv/dt TJ TSTG
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw
Max.
343c 243 195 1372 375 2.5 20 4.6
Units
A
c
d
W W/C V V/ns
f
-55 to + 175 C 300 10lbfxin (1.1Nxm) 255 See Fig. 14, 15, 22a, 22b, mJ A mJ
Avalanche Characteristics
EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
d
e
d j
Thermal Resistance
Symbol
RJC RJA Junction-to-Case Junction-to-Ambient (PCB Mount)
kl
Parameter
Typ.
--- ---
Max.
0.4 40
Units
C/W
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1
01/14/09
IRLS/SL3034PbF
Static @ TJ = 25C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
40 --- --- --- 1.0 --- --- --- ---
---
Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static www..com Drain-to-Source On-Resistance VGS(th) IDSS IGSS RG(int) Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance
--- 0.04 1.4 1.6 --- --- --- --- --- 2.1
--- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 5mAd 1.7 VGS = 10V, ID = 195A m 2.0 VGS = 4.5V, ID = 172A 2.5 V VDS = VGS, ID = 250A VDS = 40V, VGS = 0V 20 A 250 VDS = 40V, VGS = 0V, TJ = 125C VGS = 20V 100 nA -100 VGS = -20V
g g
---
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol
gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR)
Parameter
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. Typ. Max. Units
S
Conditions
286 --- --- --- 108 162 --- 29 --- --- 54 --- --- 54 --- --- 65 --- --- 827 --- --- 97 --- --- 355 --- --- 10315 --- --- 1980 --- --- 935 --- Effective Output Capacitance (Energy Related)iA--- 2378 --- --- 2986 --- Effective Output Capacitance (Time Related)
h
VDS = 10V, ID = 195A ID = 185A VDS = 20V nC VGS = 4.5V ID = 185A, VDS =0V, VGS = 4.5V VDD = 26V ID = 195A ns RG = 2.1 VGS = 4.5V VGS = 0V VDS = 25V pF = 1.0MHz VGS = 0V, VDS = 0V to 32V VGS = 0V, VDS = 0V to 32V
g
g
i h
Diode Characteristics
Symbol
IS ISM VSD trr Qrr IRRM ton
Notes:
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)Ad Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- 343 A 1372
Conditions
MOSFET symbol showing the integral reverse
G S D
--- --- 1.3 V --- 39 --- ns --- 41 --- --- 39 --- nC TJ = 125C --- 46 --- --- 1.7 --- A TJ = 25C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode. TJ = 25C, IS = 195A, VGS = 0V TJ = 25C VR = 34V, TJ = 125C IF = 195A di/dt = 100A/s TJ = 25C
g
g
Calcuted continuous current based on maximum allowable junction
temperature Bond wire current limit is 195A. Note that current limitation arising from heating of the device leds may occur with some lead mounting arrangements. Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.013mH RG = 25, IAS = 195A, VGS =10V. Part not recommended for use above this value . ISD 195A, di/dt 841A/s, VDD V(BR)DSS, TJ 175C.
Pulse width 400s; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff. (ER) is a fixed capacitance that gives the same energy as When mounted on 1" square PCB (FR-4 or G-10 Material). For
Coss while VDS is rising from 0 to 80% VDSS. recommended footprint and soldering techniquea refer to applocation note # AN- 994 echniques refer to application note #AN-994. R is measured at TJ approximately 90C RJC value shown is at time zero
2
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IRLS/SL3034PbF
100000
TOP VGS 15V 10V 8.0V 4.5V 3.5V 3.0V 2.7V 2.5V
100000
ID, Drain-to-Source Current (A)
10000
ID, Drain-to-Source Current (A)
60s PULSE WIDTH Tj = 25C
TOP
10000
BOTTOM
1000 www..com 100
BOTTOM
VGS 15V 10V 8.0V 4.5V 3.5V 3.0V 2.7V 2.5V
60s PULSE WIDTH Tj = 175C
1000
100 2.5V 10
10 2.5V 1 0.1 1 10 100 V DS, Drain-to-Source Voltage (V)
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
10000
Fig 2. Typical Output Characteristics
2.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID, Drain-to-Source Current (A)
1000 T J = 175C T J = 25C
ID = 195A VGS = 10V 1.5
100
10
1.0
1 VDS = 25V 60s PULSE WIDTH 0.1 1 2 3 4 5
0.5 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (C)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
100000
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd
Fig 4. Normalized On-Resistance vs. Temperature
5.0 4.5
VGS, Gate-to-Source Voltage (V)
ID= 185A
C, Capacitance (pF)
10000
Ciss
C oss = C ds + C gd
4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5
VDS= 32V VDS= 20V
Coss Crss 1000
100 1 10 VDS, Drain-to-Source Voltage (V) 100
0.0 0 20 40 60 80 100 120 140 QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRLS/SL3034PbF
10000 10000 OPERATION IN THIS AREA LIMITED BY R DS(on) 1000
100sec
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
TJ www..com = 175C 100 TJ = 25C 10 VGS = 0V 1.0 0.0 0.5 1.0 1.5 2.0 2.5 VSD, Source-to-Drain Voltage (V)
100
LIMITED BY PACKAGE
1msec
10
10msec
DC
1
Tc = 25C Tj = 175C Single Pulse 0.1 1 10 100
0.1 VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
350 300
ID, Drain Current (A)
Fig 8. Maximum Safe Operating Area
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
50 Id = 5mA 48
Limited By Package
250 200 150 100 50 0 25 50 75 100 125 150 175 T C , Case Temperature (C)
46
44
42
40 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Temperature ( C )
Fig 9. Maximum Drain Current vs. Case Temperature
2.5
EAS , Single Pulse Avalanche Energy (mJ)
Fig 10. Drain-to-Source Breakdown Voltage
1200 1000 800 600 400 200 0 ID 38.9A 65.3A BOTTOM 195A TOP
2.0
Energy (J)
1.5
1.0
0.5
0.0 0 5 10 15 20 25 30 35 40 45
25
50
75
100
125
150
175
Fig 11. Typical COSS Stored Energy
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (C)
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
4
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IRLS/SL3034PbF
1
Thermal Response ( Z thJC ) C/W
D = 0.50 0.1 0.20 0.10 0.05 0.01 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE )
J J 1 1 R1 R1 2 R2 R2 R3 R3 3 R4 R4 C 2 3 4 4
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Ri (C/W)
0.02477 0.08004 0.19057 0.10481
0.000025 0.000077 0.001656 0.008408
i (sec)
Ci= i/Ri Ci i/Ri
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001 0.01 0.1
0.001 1E-006
1E-005
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse)
Avalanche Current (A)
100
0.01 0.05 0.10
10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 1 1.0E-06 1.0E-05 1.0E-04 tav (sec) 1.0E-03 1.0E-02 1.0E-01
Fig 14. Typical Avalanche Current vs.Pulsewidth
300 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 195A
Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 15. Maximum Avalanche Energy vs. Temperature
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EAR , Avalanche Energy (mJ)
5
IRLS/SL3034PbF
3.0
VGS(th) , Gate threshold Voltage (V)
14 12 10
IRRM (A)
2.5 2.0
IF = 78A V R = 34V TJ = 25C TJ = 125C
www..com 1.5
1.0 0.5 0.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( C ) ID = 250A ID = 1.0mA ID = 1.0A
8 6 4 2 0 0 100 200 300 400 500 diF /dt (A/s)
Fig 16. Threshold Voltage vs. Temperature
14 12 10
IRRM (A)
Fig. 17 - Typical Recovery Current vs. dif/dt
400
IF = 117A V R = 34V TJ = 25C TJ = 125C
QRR (A)
IF = 78A V R = 34V 300 TJ = 25C TJ = 125C
8 6 4 2 0 0 100 200 300 400 500 diF /dt (A/s)
200
100
0 0 100 200 300 400 500 diF /dt (A/s)
Fig. 18 - Typical Recovery Current vs. dif/dt
400 IF = 117A V R = 34V 300 TJ = 25C TJ = 125C
Fig. 19 - Typical Stored Charge vs. dif/dt
QRR (A)
200
100
0 0 100 200 300 400 500 diF /dt (A/s)
6
Fig. 20 - Typical Stored Charge vs. dif/dt
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IRLS/SL3034PbF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
-
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+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Curent Inductor Current
Ripple 5% ISD
* VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
V(BR)DSS
15V
tp
DRIVER
VDS
L
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01
I AS
Fig 22a. Unclamped Inductive Test Circuit
VDS VGS RG RD
Fig 22b. Unclamped Inductive Waveforms
VDS 90%
D.U.T.
+
- VDD
V10V GS
Pulse Width 1 s Duty Factor 0.1 %
10% VGS
td(on) tr t d(off) tf
Fig 23a. Switching Time Test Circuit
Current Regulator Same Type as D.U.T.
Fig 23b. Switching Time Waveforms
Id Vds Vgs
50K 12V .2F .3F
D.U.T. VGS
3mA
+ V - DS
Vgs(th)
IG
ID
Current Sampling Resistors
Qgs1 Qgs2
Qgd
Qgodr
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Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
7
IRLS/SL3034PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
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D2Pak (TO-263AB) Part Marking Information
UCDTADTA6IADSA$"TAXDUC GPUA8P9@A'!# 6TT@H7G@9APIAXXA!A! DIAUC@A6TT@H7GAGDI@AAGA DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S A$"T 96U@A8P9@ @6SAA2A! X@@FA! GDI@AG
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ A$"T
Q6SUAIVH7@S 96U@A8P9@ QA2A9@TDBI6U@TAG@69AAAS@@ QSP9V8UAPQUDPI6G @6SAA2A! X@@FA! 6A2A6TT@H7GATDU@A8P9@
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
IRLS/SL3034PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
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TO-262 Part Marking Information
@Y6HQG@) UCDTADTA6IADSG" "G GPUA8P9@A &'( 6TT@H7G@9APIAXXA (A ((& DIAUC@A6TT@H7GAGDI@AA8A
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@
Q6SUAIVH7@S
96U@A8P9@ @6SA&A2A ((& X@@FA ( GDI@A8
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S
96U@A8P9@ QA2A9@TDBI6U@TAG@69AS@@ QSP9V8UAPQUDPI6G @6SA&A2A ((& X@@FA ( 6A2A6TT@H7GATDU@A8P9@
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
IRLS/SL3034PbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
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TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 01/09
10
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