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First Edition
O PTREX
LCD Module Technical Specification Final Revision
******
Jan 1, 2001
T-51378L025J-FW-P-AA
Checked by (Quality Assurance Div.)
Checked Div.)
by
(Design
Engineering
Prepared by (Production Div.)
Table of Contents
1. Applications....................................................................................................................................... 2 2. Features ............................................................................................................................................. 2 3. Mechanical Specifications.......................................................................................................... 2 4. Mechanical Drawing of panel................................................................................................... 3 5. Input / Output Terminals............................................................................................................. 4 6. Pixel arrangement and input connector pin No.........................................................6 7. Absolute Maximum Ratings.......................................................................................................7 8. Electrical Characteristics.............................................................................................................7 9. Power Sequence.......................................................................................................................... 18 10. Optical Characteristics............................................................................................................ 18 11. Handing Cautions...................................................................................................................... 21 12. Reliability........................................................................................................................................ 22 13. Indication of Lot Number Label............................................................................................ 22 14. Block Diagram ............................................................................................................................. 23
Revision History
Rev. Date Page Comment
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1. Application
This technical specification applies to 2.5" color TFT-LCD panel. The 2.5 color TFT LCD " panel is designed for camcorder, digital camera application and other electronic products which require high quality flat panel displays.
2. Features
. Compatible with NTSC or PAL system . High Resolution : 112,320 Dots . Optimum Viewing Direction : 6 o'clock . Up/Down and Left/Right Image Reversion
3. Mechanical Specifications
Parameter Screen Size Surface Treatment Display Format Active Area Dot Pitch Pixel Configuration Outline Dimension Weight Specifications 2.5 (diagonal) Anti-Glare 480*~ 234 50.21*~ 37.67 0.105(W)*~ 0.161(H) Delta 61.6 (W)*~ 49.3 (H)*~ (D) 5.9 TBD3 Unit inch
dot mm mm mm g
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4. Mechanical Drawing of panel:
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5.Input / Output Terminals
Pin No
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
Symbol
STH1 AVSS AVDD VB VG VR VSS VDD CPH1 CPH2 CPH3 STH2 Q2H INH R/L VCOM VCOM XOE CPV U/D DIO2 DIO1 VGL VEE VSS VCC VGH NC
I/O
I/O I I I I I I I I I I I/O I I I I I I I I I/O I/O I I I I I -
Description
Start pulse for source driver Analog GND for source driver Analog power input for source driver Video Input B Video Input G Video Input R Digital GND Digital power input Sampling and shift clock for source driver Sampling and shift clock for source driver Sampling and shift clock for source driver Start pulse for source driver Video input rotation control Output enable for source driver Left/Right Control for source driver Common electrode voltage Common electrode voltage Output enable for gate driver Clock input for gate driver Up/Down Control for gate driver Vertical start pulse Vertical start pulse Gate off voltage(alternative every 1-H) Gate driver negative voltage GND Logic power for gate driver Gate on voltage No connection
Remark
Note 5-1 Note 5-2 Note 5-4
Note 5-3
Note 5-1
Note 5-1 Note 5-4
Note 5-5 Note 5-4 Note 5-6 Note 5-3 Note 5-7 -
Note 5-1 : STH1, STH2 and R/L mode R/L High(VDD) Low(0 Volt.) Note 5-2 : AVDD = +5V (Typ.) Note 5-3 : VDD, VCC = +5Vor+3.3V (Typ.) Note 5-4 : VCOM = 6VPP. STH1 Input Output STH2 Output Input Remark Left to Right Right to Left
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Phase of the video signal input and VCOM The relation between these values could refer to 8-1 Operating condition. 100% white Composite Video Signal pedestal
R,G,B Video Signal V i DC (VR G B ,V ,V )
Vi AC
VCOM COM DC V
VCOM AC
VGL VGL DC
VGL AC 1H Fig.1 1H
Liquid crystal transmission of the video signal input, VCOM and timing VCOM H Level Video Signal Input Maximum Video Signal Input Minimum Black White L Level White Black
White : maximum transmission / Black : minimum transmission
Note 5-5*F DIO1, DIO2 and U/D mode U/D High (VDD) Low (0 Volt.) Note 5-6 : VEE = -15V (Typ.). Note 5-7 : VGH =+15V (Typ.). DIO1 Input Output DIO2 Output Input Remark Down to Up Up to Down
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6. Pixel Arrangement and input connector pin NO.
1 1 2 3 4 R R B G B G
2 R B R B
3 G R G R
4 B G B G
5 R B R B
6 G R G R
478 479 480 B G B G R B R B G G
233 234 R
B G
R B
G R
B G
R B
G R
B G
R B
G
1
28
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7. Absolute Maximum Ratings: The followings are maximum values , which if exceeded, may cause faulty operation or damage to the unit. GND = 0 V*C = 25 C Ta Parameter Supply Voltage for Source Driver Analog Digital Supply Voltage for Gate Driver Positive Negative Symbol MIN. MAX. Unit AVDD VDD VGH VGL -0.3 -0.3 -0.3 -23 +7 +7 +45 +0.3 +40 +7.3 +70 +60 V V V V C C Notes:7-2 Notes:7-1 V Remark
VGH VGL +15 Analog input voltage Storage Temperature Operation Temperature Notes 7-1 : Analog Input Voltage means VR,VG,VB. VVideo -0.3 -20 0
Notes 7-2 : Operating Temperature define that contrast, response time, other display optical character are Ta=+25.
8. Electrical Characteristics
8-1) Operating Condition Item Symbol VCC VDD AVDD Power Supply VGH VEE VGL AC VGL DC Video Signal (VR, VG, VB) VCOM VCOM DC H Level L Level VIH VIL +0.9 +0.7 VDD +1.0 +1.1 +0.3 VDD V V V Vi AC Vi DC VCOM AC Min. +3.0 +4.5 +4.5 +14.5 -14.5 -11.5 Typ. +3.3 +5.0 +5.0 +15.0 -15.0 +6.0 -12.0 +4.0 +2.5 +6.0 Max. +3.6 +5.5 +5.5 +15.5 -15.5 -12.5 +4.6 Unit V V V V V VP-P V AC Component of VGL DC Component of VGL DC Component AC Component of VCOM DC Component of VCOM Note 8-1 Remark 3.3V Operating 5.0V Operating
VP-P AC Component V VP-P
Note 8-1 : STH1,STH2,CPH1,CPH2,CPH3,Q2H,INH,CPV,XOE,DIO1,DIO2
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8-2)Current Consumption (GND=AVSS=0V) Parameter Current for Driver Symbol IGH IGL ICC,IDD IADD Condition VGH=+15V VGL=-12V VCC,VDD=+5V AVDD=+5V Min. TBD TBD TBD TBD Typ. TBD TBD TBD TBD Max. TBD TBD TBD TBD Unit mA mA mA mA
Ta= 25C Remark VGL center voltage
8-3) Backlight driving & Power Consumption
Pin No 1 3
Symbol VL1 VL2
Description Input terminal (Hi voltage side) Input terminal (Low voltage side)
Remark
Note 8-2
Note 8-2 : Low voltage side of backlight inverter connects with Ground of inverter circuits. Ta= 25C Remark IL=3mA Note 8-3
Parameter Lamp voltage Lamp current Lamp frequency ) Kick-off voltage(25*Z ) Kick-off voltage(0*Z
Symbol VL IL PL Vs Vs
Min. TBD TBD TBD TBD TBD
Typ. TBD TBD TBD TBD TBD
Max. TBD TBD TBD TBD TBD
Unit Vrms mA KHz Vrms Vrms
Note 8-3 : The wave form of lamp driving voltage should be as closed to a perfect SIN wave as possible. Power Consumption Ta= 25 C Symbol Conditions TYP. MAX Unit Remark TBD W Note 8-4 TBD W Note 8-5 TBD W
Parameter LCD Panel Power Consumption Backlight Lamp Power Consumption Total Power Consumption
Note 8-4*F power consumption for backlight is not included. The Note 8-5*F Backlight lamp power consumption is calculated by IL*~ VL. 8-4) Input / Output Connector A) LCD Module Connector FFC Down Connector, 28 Pins Pitch : 0.5 mm B) Backlight Connector JST BHR-03VS-1 Pin No. : 3 Pitch : 4 mm
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8-5) Timing Characteristics Of Input Signals Characteristics Symbo l t1V 1Field Scanning Period 1Line Scanning Period t1H Source Driver Operating Frequency fhc Signal Sampling Pulse Width tchw Signal Sampling Pulse Delay tchd Signal Sampling Pulse Width(H) tchwh Signal Sampling Pulse Delay(L) tchwl Source Start Signal Pulse Width tshw Source Start Signal Setup Time tshset Source Start Signal Hold Time tshhld Source Output Enable Pulse Width tohw Source Start Signal Rising Time tss Video Input Signal Start Point tvs Phase Difference Between toc OEH&CPV Period Gate Clock tcvw Gate Clock Pulse Width(H) tcvwh Gate Clock Pulse Width(L) tcvwl Gate Start Signal Pulse Width tsvw Gate Start Signal Setup Time tsvset Gate Start Signal Hold Time tsvhld Phase Difference Between tosp OEH&STH Difference Phase Between tohs SYNC&OEH Enable Pulse Width Gate Output toev VCOM Delay Time tDCOM RGB Delay Time tDRGB Vertical Display Start tsv Min. 1.0 200 95.3 142.9 142.9 90 20 20 1.0 1.5 10 10 10 5 5 5 Typ. 262.5 63.5 3.14 317.7 105.9 158.8 158.8 317.7 158.8 158.8 2.0 8 9.8 10.0 2.3 63.5 31.7 31.7 63.5 53.2 10.3 4 1.4 2.5 3 Max. Unit Remark H s 5.0 MHz 1000 ns 116.5 ns tchd 12,23 174.7 ns 174.7 ns 630* ns *tshset=tshhld ns ns s s s s s 48 s 48 s 126** s **tsvset=tsvhld s s s s s 3 s 2 s tH
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HD
8-6) Signal Timing Waveforms
VD (22H~256H) 5 6 7 19 20 21 22 23
1st display period
2nd display period
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265 266 267 268 269 t1V=262.5H tsvw Fig. 8-1 Vertical Start Line for NTSC
(285H~519H) 282 283 284 285 286
Xout
2
3
4
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DIO
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e v e n f i e l d : S c a n l i n e s 1 4 n + 1 21 4 n + 2 0 ( n = 2 , 3 , 4 . . ) a r e n o t d i s * * o d d f i e l d : S c a n l i n e s 1 4 n + 61 4 n + 1 2 ( n = 2 , 3 , 4 . . ) a r e n o t d 624 625 1
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VD HD Xout 2 3 4 25 26 27 28 29 t1V=312.5H 1st display period (28H~299H) 312 313 314 315 316 2nd display period 336 337 338 339 340 (339H~611H)
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DIO
tsvw
t1H=199 CPHclk=63.5u sec
STH1,2
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Tshw 198 199 1 2 3 160 161 1 Invalidity data Validity data Invalidity data Fig. 8-2 Horizontal Start Pixel
CPH1
OPTREX CORPORATION
R,G,B
197
2
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HD tss tshw
STH1,2 tosp
tohs tohw
INH tcvw tcvwh toc tcvwl
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tDCOM tDRGB tvs Fig. 8-3 Detail Horizontal Timing
CPV
toev
XOE
Q2H
V COM
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V R,G,B
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tchw tchwh tchwl
CPH 1 tchd12
CPH 2 tchd23
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tshset tshhld tshw R1 (B1) R2 (B2) G1 (R1) B1 (G1) G2 (R2) Fig. 8-4 Sampling Clock Timing
CPH 3
STH 1,2
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R3 (B3)
B2 (G2)
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tcvw tcvwh tcvwl
CPV
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tsvset tsvhld tsvw Fig. 8-5 Vertical Shift Clock Timing
DIO 1,2
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Display on panel first line
V(R,G,B) ODD FIELD
V(R,G,B) EVEN FIELD
Vertical timing (From up to down)
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tsv BRG RGB Fig. 8-6(a) Vertical Timing (From Up to Down)
HD
VD
DIO2
Q2H
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VCOM (Odd field)
VCOM (Even field)
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Display on panel first line
V(R,G,B) EVEN FIELD
V(R,G,B) ODD FIELD
Vertical timing (From down to up)
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tsv BRG RGB Fig. 8-6(b) Vertical Timing (From Down to Up)
HD
VD
DIO1
Q2H
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VCOM (Odd field)
VCOM (Even field)
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9. Power on Sequence(Voltage source) The Power on Sequence only effect by VCC,VSS,VDD,VEE and VGH, the others do not care. V GH
V ,V DD CC
V (0V) SS
V EE
OFF T1
ON T3 Logic signal V ,V COM GL RGB-Video signal
OFF
T2
T4
1) 10ms*... T110. Optical Characteristics 10-1) Specification
Symbol Condition MIN. TYP. MAX. AE *}45 *}50 10 15 AE (to 12 CR* 10 o'clock) 30 35 AE (to 6 o'clock) Contrast Ratio CR 110 150 Response time Rise Tr 30 ms AE =0* Fall Tf 50 ms O =0* Reflectance Ratio R TBD % Brightness 170 220 cd/m2 White X AE =0* 0.250 0.300 0.350 Chromaticity y 0.260 0.310 0.360 Lamp Life Time 10,000 hr +25*Z Luminance when LCD is White Note 10-1*F ** CR Luminance when LCD is Black Contrast Ratio is measured in optimum common electrode voltage. The test configurations of contrast ratio see section 10-2. Horizontal Vertical Parameter Viewing Angle Ta = 25C Unit Remarks deg deg Note 10-3 deg Note 10-1 Note 10-4
Note 10-2 Note 10-2
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Note 10-2 : 1.Topcon BM-7(fast) luminance meter 1*field of view is used in the testing (after 20~30 minutes operation). 2.Lamp current : 3 mA 3.Inverter model : TDK-347. Note 10-3 : The definition of viewing angle diagrams :
normal (q = 0) q
observer
3
AB
C
12
6 f
LCD panel 9 f : Viewing direction q : Viewing angle
Note 10-4 : The definitions of response time:
White 100% 90% Brightness 10% 0% Tr Tf Black White
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10-2) Test Configuration
BM-7(fast)
Caution: 1. Environmental illumination *... lux 1 Caution: 1. Environmental illumination O 1must be 2. Before test CR, Vcom voltage lux adjusted carefully toCR, the best CR. must 2. Before test get Vcom voltage be adjusted carefully to get the best 500mm CR.
R,G,B signal input
LCD Backlight
Pattern generator
Y
LCD Display
Testing Point
Testing Point
Pattern A
Y
Pattern B
RGB waveform Vcom
R, G, B Waveform of Pattern A at Testing Point
16ms
16ms
Vw=TBDV +/- 0.2V
Y
R, G, B Waveform of Pattern B at Testing Point
16ms 16ms
RGB waveform
Vcom
Vb=TBDV +/- 0.2V
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11. Handling Cautions 11-1) Mounting of module a) Please power off the module when you connect the input/output connector. b) Please connect the ground pattern of the inverter circuit surely. If the connection is not perfect, some following problems may happen possibly. 1.The noise from the backlight unit will increase. 2.The output from inverter circuit will be unstable. 3.In some cases a part of module will heat. c) Polarizer which is made of soft material and susceptible to flaw must be handled carefully. d) Protective film (Laminator) is applied on surface to protect it against scratches and dirt. It is recommended to peel off the laminator before use and taking care of static electricity. 11-2) Precautions in mounting a) When metal part of the TFT-LCD module (shielding lid and rear case) is soiled, wipe it with soft dry cloth. b) Wipe off water drops or finger grease immediately. Long contact with water may cause discoloration or spots. c) TFT-LCD module uses glass which breaks or cracks easily if dropped or bumped on hard surface. Please handle with care. d) Since CMOS LSI is used in the module. So take care of static electricity and earth yourself when handling. 11-3) Adjusting module a) Adjusting volumes on the rear face of the module have been set optimally before shipment. b) Therefore, do not change any adjusted values. If adjusted values are changed, the specifications described may not be satisfied. 11-4) Others a) Do not expose the module to direct sunlight or intensive ultraviolet rays for many Hours. b) Store the module at a room temperature place. c) The voltage of beginning electric discharge may over the normal voltage because of leakage current from approach conductor by to draw lump read lead line around. d) If LCD panel breaks, it is possibly that the liquid crystal escapes from the panel. Avoid putting it into eyes or mouth. When liquid crystal sticks on hands, clothes or feet. Wash it out immediately with soap. e) Observe all other precautionary requirements in handling general electronic components. f) Please adjust the voltage of common electrode as material of attachment by 1 module.
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12. Reliability
No. 1 2 3 4 5 Test Item High Temperature Storage Test Low Temperature Storage Test Low Temperature Operation Test High Temperature & High Humidity Operation Test Thermal Cycling Test (non-operating) Vibration Test (non-operating) Shock Test (non-operating) Electrostatic Discharge Test (non-operating) Ta: ambient temperature [Criteria] Under the display quality test conditions with normal operation state there should be no , change which may affect practical display function. 13. Indication of Lot Number Label a) Indicated contents of the label Test Condition Ta = +70C, 240 hrs Ta = -20C, 240 hrs Ta = 0 C, 240 hrs Ta = +60C, 95%RH, 240 hrs -25C *+25C* +70C, 200 Cycles 30 min 5min 30 min Frequency*F ~ 55 HZ 10 Amplitude*F mm 1.0 Sweep time: 11 mins Test Period: 6 Cycles for each direction of X, Y, Z 100G, 6ms Direction: *}X, *}Y, *}Z Cycle: 3 times 150pF, 330 Air:*}15KV; Contact: *}8KV 10 times/point, 4 points/panel face
6
7
8
Lot number
OOO-OOOOOO
XXXXXXXXX
Internal number
Contents of lot number : SB9--STC OEM product 5th --Production year : 19999, 2000A, 20011........ 6th --Production month : 1, 2, 3,....9, A, B, C 7th~10th --Serial numbers : 0001~9999
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14. Block Diagram
LCD Panel
V Driver (Gate)
H Driver (Source)
28 PIN Input
Inverter
Back-light
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