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| AP2304AN Advanced Power Electronics Corp. Simple Drive Requirement Small Package Outline Surface Mount Device S SOT-23 G D N-CHANNEL ENHANCEMENT MODE POWER MOSFET BVDSS RDS(ON) ID 30V 117m 2.5A Description Advanced Power MOSFETs utilized advanced processing techniques to achieve the lowest possible on-resistance, extremely efficient and cost-effectiveness device. The SOT-23 package is universally used for all commercial-industrial applications. D G S Absolute Maximum Ratings Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current3, VGS @ 10V Continuous Drain Current3, VGS @ 10V Pulsed Drain Current 1 www..com Rating 30 20 2.5 2 10 1.38 0.01 -55 to 150 -55 to 150 Units V V A A A W W/ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 90 Unit /W Data and specifications subject to change without notice 200318041 AP2304AN Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol BVDSS BVDSS/Tj Parameter Drain-Source Breakdown Voltage 2 Test Conditions VGS=0V, ID=250uA Min. 30 1 - Typ. 0.1 2 3 0.8 1.8 5 9 11 2 120 62 24 1.67 Max. Units 117 190 3 1 10 100 5 190 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Rg Static Drain-Source On-Resistance VGS=10V, ID=2.5A VGS=4.5V, ID=2A VDS=VGS, ID=250uA VDS=10V, ID=2.5A Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VDS=30V, VGS=0V VDS=24V ,VGS=0V VGS=20V ID=2.5A VDS=24V VGS=4.5V VDS=15V ID=1A RG=3.3,VGS=10V RD=15 VGS=0V VDS=25V f=1.0MHz f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance 2 Source-Drain Diode Symbol VSD trr Qrr Parameter Forward On Voltage 2 2 Test Conditions IS=1.2A, VGS=0V IS=2A, VGS=0V, dI/dt=100A/s Min. - Typ. 24 23 Max. Units 1.2 V ns nC Reverse Recovery Time Reverse Recovery Charge Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 270/W when mounted on min. copper pad. AP2304AN 12 12 T A =25 o C 10 10 T A =150 C 10V 6.0V 5.0V 10V 6.0V 5.0V o ID , Drain Current (A) 8 ID , Drain Current (A) 8 6 6 4.0V 4 4.0V 4 2 V G =3.0V 2 V G =3.0V 0 0 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 140 1.8 130 I D =2 A T A =25 Normalized RDS(ON) 1.6 V G =10V I D =2.5A 120 1.4 RDS(ON) (m ) 110 1.2 100 1.0 90 0.8 80 70 3 5 7 9 11 0.6 -50 0 50 100 150 VGS , Gate-to-Source Voltage (V) T j , Junction Temperature ( C) o Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance 10.00 2.05 1.85 1.00 VGS(th) (V) IS (A) T j =150 o C T j =25 o C 1.65 0.10 1.45 0.01 0.1 0.5 0.9 1.3 1.25 -50 0 50 100 150 V SD , Source-to-Drain Voltage (V) T j , Junction Temperature ( C) o Fig 5. Forward Characteristic of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature AP2304AN f=1.0MHz 12 1000 I D =2.5A 10 VGS , Gate to Source Voltage (V) 8 C (pF) V DS =24V V DS =20V V DS =15V 6 100 C iss C oss 4 C rss 2 0 0 1 2 3 4 5 6 10 1 5 9 13 17 21 25 29 Q G , Total Gate Charge (nC) V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Duty factor=0.5 Normalized Thermal Response (R thja) 0.2 10 0.1 0.1 ID (A) 1ms 1 0.05 PDM t 0.01 10ms 100ms 0.1 T Duty factor = t/T Peak Tj = PDM x Rthja + T a Rthja = 270 /W 0.01 Single Pulse T A =25 C Single Pulse 0.01 0.1 1 10 o 1s DC 100 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG 4.5V QGS QGD 10% VGS td(on) tr td(off)tf Charge Q Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform |
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