|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
a FEATURES Excellent Speed: 8 V/ s Typ Low Noise: 11 nV//Hz @ 1 kHz Max Unity-Gain Stable High Gain Bandwidth: 6.5 MHz Typ Low Input Offset Voltage: 0.8 mV Max Low Offset Voltage Drift: 4 V/ C Max High Gain: 500 V/mV Min Outstanding CMR: 105 dB Min Industry Standard Quad Pinouts GENERAL DESCRIPTION High Speed, Low Noise Quad Operational Amplifier OP471 PIN CONFIGURATIONS 14-Lead Hermetic Dip (Y-Suffix) OUT D -IN D +IN D V- +IN C -IN C OUT C 14-Lead Plastic Dip (P-Suffix) OUT D -IN D +IN D V- +IN C -IN C OUT C OUT A -IN A +IN A V+ +IN B -IN B OUT B 1 2 3 4 5 6 7 14 13 12 OUT A -IN A +IN A V+ +IN B -IN B OUT B 1 2 3 4 5 6 7 14 13 12 OP471 11 10 9 8 OP471 11 10 9 8 The OP471 is a monolithic quad op amp featuring low noise, 11 nV//Hz Max @ 1 kHz, excellent speed, 8 V/ms typical, a gain bandwidth of 6.5 MHz, and unity-gain stability. The OP471 has an input offset voltage under 0.8 mV and an input offset voltage drift below 4 mV/C, guaranteed over the full military temperature range. Open-loop gain of the OP471 is over 500,000 into a 10 kW load ensuring outstanding gain accuracy and linearity. The input bias current is under 25 nA limiting errors due to signal source resistance. The OP471's CMR of over 105 dB and PSRR of under 5.6 mV/V significantly reduce errors caused by ground noise and power supply fluctuations. The OP471 offers excellent amplifier matching which is important for applications such as multiple gain blocks, low-noise instrumentation amplifiers, quad buffers and low-noise active filters. The OP471 conforms to the industry standard 14-lead DIP pinout. It is pin-compatible with the LM148/LM149, HA4741, RM4156, MC33074, TL084 and TL074 quad op amps and can be used to upgrade systems using these devices. For applications requiring even lower voltage noise the OP470 with a voltage density of 5 nV//Hz Max @ 1 kHz is recommended. 16-Lead SOIC (S-Suffix) OUT A 1 -IN A 2 16 15 14 OUT D -IN D +IN D V- +IN C -IN C OUT C NC +IN A 3 V+ 4 +IN B 5 -IN B 6 OUT B 7 NC 8 OP471 13 12 11 10 9 NC = NO CONNECT V+ BIAS OUT -IN +IN V- Figure 1. Simplified Schematic REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2002 OP471-SPECIFICATIONS ELECTRICAL CHARACTERISTICS (@ V = S 15 V, TA = 25 C, unless otherwise noted.) Min OP471E Typ Max 0.25 0.8 OP471F Min Typ Max 0.5 7 15 1.5 20 50 OP471G Min Typ Max 1.0 12 25 1.8 30 60 Unit mV nA nA nV p-p nV//Hz nV//Hz nV//Hz pA/Hz pA/Hz pA/Hz V/mV V/mV V V dB 17.8 mV/V V/ms 11 mA MHz dB pF MW GW Parameter Input Offset Voltage Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density2 Input Noise Current Density Large-Signal Voltage Gain Input Voltage Range3 Output Voltage Swing Common-Mode Rejection Power Supply Rejection Ratio Slew Rate Supply Current (All Amplifiers) Gain Bandwidth Product Channel Separation1 Input Capacitance Input Resistance Differential-Mode Input Resistance Common-Mode Settling Time 1 Symbol VOS IOS IB en p-p en Conditions VCM = 0 V VCM = 0 V 0.1 Hz to 10 Hz fO = 10 Hz fO = 100 Hz fO = 1 kHz fO = 10 Hz fO = 100 Hz fO = 1 kHz V = 10 V RL = 10 kW RL = 2 kW RL 2 kW VCM = 11 V VS = 4.5 V to 18 V 6.5 No Load Av = 10 VO = 20 V p-p fO = 10 Hz 125 500 350 11 12 105 4 7 10 25 250 500 9 7 6.5 1.7 0.7 0.4 700 550 12 13 120 1 8 9.2 6.5 150 2.6 1.1 11 11 5.6 6.5 16 12 11 250 500 9 7 6.5 1.7 0.7 0.4 300 500 175 275 11 12 12 13 95 115 5.6 8 9.2 6.5 125 150 2.6 1.1 11 11 17.8 6.5 16 12 11 250 500 9 7 6.5 1.7 07 0.4 300 500 175 275 11 12 12 13 95 115 5.6 8 9.2 6.5 125 150 2.6 1.1 11 16 12 11 in AVO IVR VO CMR PSRR SR ISY GBW CS CIN RIN RINCM tS AV = 1 To 0.1% To 0.01 % 4.5 7.5 4.5 7.5 4.5 7.5 ms ms NOTES 1 Guaranteed but not 100% tested. 2 Sample tested. 3 Guaranteed by CMR test. -2- REV. A OP471 ELECTRICAL CHARACTERISTICS unless otherwise noted.) Parameter Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Current Large-Signal Voltage Gain Input Voltage Range* Output Voltage Swing Common-Mode Rejection Power Supply Rejection Ratio Supply Current (All Amplifiers) *Guaranteed by CMR test. (Vs = 15 V, -25 C TA 85 C for OP471E/F, -40 C TA 85 for OP471G, OP471E Typ Max 0.3 1 1.1 4 20 50 OP471F Min Typ Max 0.6 2 8 25 200 400 125 200 11 12 12 13 90 10 110 18 31.6 2.0 7 40 70 OP471G Min Typ Max 1.2 4 20 40 200 400 125 200 11 12 12 13 90 110 18 31.6 50 75 2.5 Symbol VOS TCVOS los IB Avo IVR VO CMR PSRR Conditions Min Unit mV mV/C nA nA V/mV V V dB mV/V VCM = 0 V VCM = 0 V VO = 10 V RL = 10 kW RL = 2 kW RL 2 kW VCM = 11 V VS = 4.5 V to 18 V 375 250 11 12 100 5 13 600 400 12 13 115 3.2 ISY No Load 9.3 11 9.3 11 9.3 11 mA Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . 1.0 V Differential Input Current2 . . . . . . . . . . . . . . . . . . . . 25 mW Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage Output Short-Circuit Duration . . . . . . . . . . . . . . . Continuous Storage Temperature Range P, Y-Package . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300C Junction Temperature (Ti) . . . . . . . . . . . . . -65C to +150C Operating Temperature Range OP471E, OP471F . . . . . . . . . . . . . . . . . . . -25C to +85C OP471G . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C NOTES 1 Absolute Maximum Ratings apply to packaged parts, unless otherwise noted. 2 The OP471's inputs are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise performance. If differential voltage exceeds 1.0 V, the input current should be limited to 25 mA. ABSOLUTE MAXIMUM RATINGS 1 Package Type 14-Lead Hermetic DIP(Y) 14-Lead Plastic DIP(P) 16-Lead SOIC (S) * JA* JC Unit C/W C/W C/W 94 76 88 10 33 23 JA is specified for worst-case mounting conditions, i.e., JA is specified for device in socket for TO, CERDIP, PDIP packages; JA is specified for device soldered to printed circuit board for SO packages. ORDERING GUIDE TA = 25C VOS MAX (mV) 800 1,500 1,800 1,800 Package Options 14-Lead CERDIP Plastic OP471EY OP471FY* OP471GP OP471GS Operating Temperature Range IND IND XIND XIND *Not for new design. Obsolete April 2002. For military processed devices, please refer to the standard microcircuit drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp 5962-88565022A - OP471ARCMDA 5962-88565023A - OP471ATCMDA 5962-8856502CA - OP471AYMDA CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP471 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. A -3- OP471-Typical Performance Characteristics 100 TA = 25 C VS = 15V 10 TA = 25 C VOLTAGE NOISE - nV/ Hz AT 10Hz NOISE VOLTAGE - 100nV/DIV 100 90 5mV 1s VOLTAGE NOISE - nV/ Hz 40 30 20 10 5 4 3 2 8 AT 1kHz 6 10 0% I/F CORNER = 5Hz 4 TA = 25 C VS = 15V 2 4 6 TIME - Seconds 8 10 0 1 1 10 100 FREQUENCY - Hz 1k 2 0 5 10 15 20 SUPPLY VOLTAGE - V TPC 1. Voltage Noise Density vs. Frequency 100 TA = 25 C VS = 15V 400 TPC 2. Voltage Noise Density vs. Supply Voltage VS = 15V TPC 3. 0.1 Hz to 10 Hz Noise 20 CHANGE IN OFFSET VOLTAGE - V 18 16 14 12 10 8 6 4 2 0 0 VOLTAGE NOISE - nV/ Hz 40 30 20 10 5 4 3 2 1 1 10 100 FREQUENCY - Hz 1k INPUT OFFSET VOLTAGE - V TA = 25 C VS = 15V 300 200 I/F CORNER = 5Hz 100 0 -75 -50 -25 0 25 50 75 TEMPERATURE - C 100 125 1 2 3 TIME - Minutes 4 5 TPC 4. Current Noise Density vs. Frequency 20 INPUT OFFSET CURRENT - nA VS = 15V VCM = 0V TPC 5. Input Offset Voltage vs. Temperature 10 9 8 7 6 5 4 3 2 1 VS = 15V VCM = 0V INPUT BIAS CURRENT - nA 9 10 TPC 6. Warm-Up Offset Voltage Drift TA = 25 C VS = 15V INPUT BIAS CURRENT - nA 15 8 10 7 5 6 0 -75 -50 -25 0 25 50 75 TEMPERATURE - C 100 125 0 -75 -50 -25 0 25 50 75 TEMPERATURE - C 100 125 5 -12.5 -7.5 -2.5 2.5 7.5 12.5 COMMON-MODE VOLTAGE - V TPC 7. Input Bias Current vs. Temperature TPC 8. Input Offset Current vs. Temperature TPC 9. Input Bias Current vs. Common-Mode Voltage -4- REV. A OP471 130 120 110 100 90 CMR - dB 10 TOTAL SUPPLY CURRENT - mA TOTAL SUPPLY CURRENT - mA TA = 25 C VS = 15V 10 TA = +25 C 8 TA = +125 C 9 8 7 6 5 4 3 VS = 15V 80 70 60 50 40 30 20 10 1 10 100 1k 10k FREQUENCY - Hz 100k 1M TA = -55 C 6 4 2 0 5 10 15 20 2 -75 -50 -25 0 25 50 75 100 125 SUPPLY VOLTAGE - V TEMPERATURE - C TPC 10. CMR vs. Frequency 140 130 120 110 100 PSR - dB TPC 11. Total Supply Current vs. Supply Voltage 140 130 120 OPEN-LOOP GAIN - dB TPC 12. Total Supply Current vs. Temperature 80 TA = 25 C VS = 15V TA = 25 C VS = 15V TA = 25 C VS = 15V CLOSED-LOOP GAIN - dB 1 10 100 1k 10k 100k 1M 10M 100M 110 100 90 80 70 60 50 40 30 20 10 0 FREQUENCY - Hz 60 90 80 70 60 50 40 30 20 10 0 1 10 100 +PSR 40 -PSR 20 0 1k 10k 100k 1M 10M 100M FREQUENCY - Hz -20 1k 10k 100k 1M FREQUENCY - Hz 10M TPC 13. PSR vs. Frequency TPC 14. Open-Loop Gain vs. Frequency 80 TPC 15. Closed-Loop Gain vs. Frequency 80 8 GBW PHASE MARGIN - Degrees GAIN-BANDWIDTH PRODUCT - MHz 25 20 OPEN-LOOP GAIN - dB 2000 TA = 25 C RL = 10k TA = 25 C VS = 15V PHASE VS = 15V 100 OPEN-LOOP GAIN - V/mV PHASE SHIFT - Degrees 15 10 120 140 1500 70 6 GAIN 5 0 -5 PHASE MARGIN = 57 1000 60 4 160 180 200 500 50 2 -10 1 220 2 3 4 5 6 7 8 9 10 FREQUENCY - MHz 0 0 5 10 15 SUPPLY VOLTAGE - V 20 40 -75 -50 -25 0 0 25 50 75 100 125 150 TEMPERATURE - C TPC 16. Open-Loop Gain, Phase Shift vs. Frequency TPC 17. Open-Loop Gain vs. Supply Voltage TPC 18. Gain-Bandwidth Product, Phase Margin vs. Temperature REV. A -5- OP471 28 PEAK-TO-PEAK AMPLITUDE - V 20 360 TA = 25 C VS = 15V POSITIVE SWING NEGATIVE SWING 24 20 16 12 8 4 0 1k TA = 25 C VS = 15V THD = 1% MAXIMUM OUTPUT - V 18 16 14 12 10 8 6 4 2 300 TA = 25 C VS = 15V OUTPUT IMPEDANCE - 240 180 120 AV = 100 60 AV = 1 0 100 10k 100k 1M FREQUENCY - Hz 10M 0 100 1k LOAD RESISTANCE - 10k 1k 10k 100k 1M FREQUENCY - Hz 10M 100M TPC 19. Maximum Output Swing vs. Frequency 9.0 8.5 SLEW RATE - V/ s TPC 20. Maximum Output Voltage vs. Load Resistance 170 160 150 140 130 120 110 100 90 80 70 60 50 10 TA = 25 C VS = 15V VO = 20V p-p TO 100kHz 1 TPC 21. Closed-Loop Output Impedance vs. Frequency TA = 25 C VS = 15V VO = 10V p-p RL = 2k 0.1 -SR 8.0 +SR 7.5 7.0 TOTAL HARMONIC DISTORTION - % CHANNEL SEPARATION - dB 0.01 AV = 10 AV = 1 100 1k FREQUENCY - Hz 10k 6.5 6.0 0 25 50 75 -75 -50 -25 TEMPERATURE - C 100 125 100 1k 10k 100k FREQUENCY - Hz 1M 10M 0.001 10 TPC 22. Slew Rate vs. Temperature TPC 23. Channel Separation vs. Frequency TA = 25 C VS = 15V AV = 1 TPC 24. Total Harmonic Distortion vs. Frequency 100 90 TA = 25 C VS = 15V AV = 1 100 90 10 0% 10 0% 5V 5s 50mV 0.2s TPC 25. Large-Signal Transient Response TPC 26. Small-Signal Transient Response -6- REV. A OP471 5k 500 100 TOTAL NOISE - nV/ Hz 1/4 OP471 V1 20V p-p OP11 10 OP400 OP471 50k 50 1/4 OP471 V2 OP470 RESISTOR NOISE ONLY CHANNEL SEPARATION = 20 LOG V1 V2 / 1000 1 100 1k 10k RS - SOURCE RESISTANCE - 100k Figure 2. Channel Separation Test Circuit +18V 2 3 A 11 -18V 4 1 +1V 5 6 B 7 Figure 4. Total Noise vs. Source Resistance (Including Resistor Noise) at 1 kHz 100 +1V TOTAL NOISE - nV/ Hz OP11 OP400 10 OP471 9 10 C 8 -1V 13 12 D 14 -1V OP470 RESISTOR NOISE ONLY 1 100 Figure 3. Burn-In Circuit APPLICATIONS INFORMATION Voltage and Current Noise 1k 10k RS - SOURCE RESISTANCE - 100k The OP471 is a very low-noise quad op amp, exhibiting a typical voltage noise of only 6.5 Hz @ 1 kHz. The low noise characteristic of the OP471 is, in part, achieved by operating the input transistors at high collector currents since the voltage noise is inversely proportional to the square root of the collector current. Current noise, however, is directly proportional to the square root of the collector current. As a result, the outstanding voltage noise performance of the OP471 is gained at the expense of current noise performance which is typical for low noise amplifiers. To obtain the best noise performance in a circuit, it is vital to understand the relationship between voltage noise (en), current noise (in), and resistor noise (et). Total Noise and Source Resistance Figure 5. Total Noise vs. Source Resistance (Including Resistor Noise) at 10 Hz Figure 4 shows the relationship between total noise at 1 kHz and source resistance. For RS < 1 kW the total noise is dominated by the voltage noise of the OP471. As RS rises above 1 kW, total noise increases and is dominated by resistor noise rather than by voltage or current noise of the OP471. When RS exceeds 20 kW, current noise of the OP471 becomes the major contributor to total noise. Figure 5 also shows the relationship between total noise and source resistance, but at 10 Hz. Total noise increases more quickly than shown in Figure 4 because current noise is inversely proportional to the square root of frequency. In Figure 5, current noise of the OP471 dominates the total noise when RS > 5 kW. From Figures 4 and 5, it can be seen that to reduce total noise, source resistance must be kept to a minimum. In applications with a high source resistance, the OP400, with lower current noise than the OP471, will provide lower total noise. The total noise of an op amp can be calculated by: En = (e n ) + (inR S ) + (et ) 2 2 2 where: En = total input referred noise en = op amp voltage noise in = op amp current noise et = source resistance thermal noise RS = source resistance The total noise is referred to the input and at the output would be amplified by the circuit gain. REV. A -7- OP471 1000 OP11 For reference, typical source resistances of some signal sources are listed in Table I. TABLE I. OP400 PEAK-TO-PEAK NOISE - nV OP471 100 OP470 RESISTOR NOISE ONLY Device Strain gauge Magnetic tapehead Source Impedance < 500 W < 1,500 W Comments Typically used in low-frequency applications. Low IB very important to reduce self-magnetization problems when direct coupling is used. OP471 IB can be neglected. Similar need for low IB in direct coupled applications. OP471 will not introduce any self -magnetization problem. Used in rugged servo-feedback applications. Bandwidth of interest is 400 Hz to 5 kHz. 10 100 1k 10k RS - SOURCE RESISTANCE - 100k Figure 6. Peak-to-Peak Noise (0.1 Hz to 10 Hz) vs. Source Resistance (Includes Resistor Noise) Magnetic phonograph cartridges < 1,500 W Figure 6 shows peak-to-peak noise versus source resistance over the 0.1 Hz to 10 Hz range. Once again, at low values of RS, the voltage noise of the OP471 is the major contributor to peak-to-peak noise. Current noise becomes the major contributor as RS increases. The crossover point between the OP471 and the OP400 for peak-to-peak noise is at RS = 17 W. The OP470 is a lower noise version of the OP471, with a typical noise voltage density of 3.2 nV//Hz @ 1 kHz. The OP470 offers lower offset voltage and higher gain than the OP471, but is a slower speed device, with a slew rate of 2 V/ms compared to a slew rate of 8 V/ms for the OP471. Linear variable < 1,500 W differential transformer *For further information regarding noise calculations, see "Minimization of Noise in Op Amp Applications," Application Note AN-15. R3 1.24k R1 5 R2 5 OP471 DUT OP27E R5 909 R4 200 C1 2F C4 0.22 F R10 65.4k R11 65.4k C3 0.22 F R14 4.99k R6 600k D1 1N4148 D2 OP15E 1N4148 R9 306k R8 10k OP15E R13 5.9k eOUT C5 1F C2 0.032 F R12 10k GAIN = 50,000 VS = 15V Figure 7. Peak-to-Peak Voltage Noise Test Circuit (0.1 Hz to 10 Hz) -8- REV. A OP471 Noise Measurements - Peak-to-Peak Voltage Noise 100 The circuit of Figure 7 is a test setup for measuring peak-to-peak voltage noise. To measure the 500 nV peak-to-peak noise specification of the OP471 in the 0.1 Hz to 10 Hz range, the following precautions must be observed: 1. The device must be warmed up for at least five minutes. As shown in the warm-up drift curve, the offset voltage typically changes 13 mV due to increasing chip temperature after power-up. In the 10-second measurement interval, these temperature-induced effects can exceed tens-of-nanovolts. 2. For similar reasons, the device must be well-shielded from air currents. Shielding also minimizes thermocouple effects. 3. Sudden motion in the vicinity of the device can also "feedthrough" to increase the observed noise. 4. The test time to measure 0.1 Hz to 10 Hz noise should not exceed 10 seconds. As shown in the noise-tester frequency-response curve of Figure 8, the 0.1 Hz corner is defined by only one pole. The test time of 10 seconds acts as an additional pole to eliminate noise contribution from the frequency band below 0.1 Hz. 5. A noise voltage density test is recommended when measuring noise on a large number of units. A 10 Hz noise voltage density measurement will correlate well with a 0.1 Hz to 10 Hz peak-to-peak noise reading, since both results are determined by the white noise and the location of the 1/f corner frequency. 6. Power should be supplied to the test circuit by well bypassed, low noise supplies, e.g, batteries. These will minimize output noise introduced through the amplifier supply pins. GAIN - dB 80 60 40 20 0 0.01 0.1 1 FREQUENCY - Hz 10 100 Figure 8. 0.1 Hz to 10 Hz Peak-to-Peak Voltage Noise Test Circuit Frequency Response Noise Measurement - Noise Voltage Density The circuit of Figure 9 shows a quick and reliable method of measuring the noise voltage density of quad op amps. Each individual amplifier is series connected and is in unity-gain, save the final amplifier which is in a noninverting gain of 101. Since the ac noise voltages of each amplifier are uncorrelated, they add in rms fashion to yield: e OUT = 101 E e nA 2 + e nB 2 + e nC 2 + e nD 2 E The OP471 is a monolithic device with four identical amplifiers. The noise voltage density of each individual amplifier will match, giving: e OUT = 101 E 4e n 2 = 101 (2e n ) E R1 100 R2 10k 1/4 OP471 1/4 OP471 1/4 OP471 1/4 OP471 eOUT TO SPECTRUM ANALYZER eOUT (nV Hz) = 101(2en) VS = 15V Figure 9. Noise Voltage Density Test Circuit REV. A -9- OP471 Noise Measurement - Current Noise Density The test circuit shown in Figure 10 can be used to measure current noise density. The formula relating the voltage output to current noise density is: E e nOUT A - 40nV / Hz EG RS 2 in = where: ( ) 2 adds phase shift in the feedback network and reduces stability. A simple circuit to eliminate this effect is shown in Figure 11. The added components, C1 and R3, decouple the amplifier from the load capacitance and provide additional stability. The values of C1 and R3 shown in Figure 11 are for load capacitances of up to 1,000 pF when used with the OP471. In applications where the OP471's inverting or noninverting inputs are driven by a low source impedance (under 100 W) or connected to ground, if V+ is applied before V-, or when V- is disconnected, excessive parasitic currents will flow. Most applications use dual tracking supplies and with the device supply pins properly bypassed, power-up will not present a problem. A source resistance of at least 100 W in series with all inputs (Figure 11) will limit the parasitic currents to a safe level if V- is disconnected. It should be noted that any source resistance, even 100 W, adds noise to the circuit. Where noise is required to be kept at a minimum, a germanium or Schottky diode can be used to clamp the V- pin and eliminate the parasitic current flow instead of using series limiting resistors. For most applications, only one diode clamp is required per board or system. Rf G = gain of 10,000 RS = 100 kW source resistance Capacative Load Driving and Power Supply Considerations The OP471 is unity-gain stable and is capable of driving large capacitive loads without oscillating. Nonetheless, good supply bypassing is highly recommended. Proper supply bypassing reduces problems caused by supply line noise and improves the capacitive load driving capability of the OP471. R3 1.24k R1 5 R2 100k OP471 DUT OP27E R5 8.06k R4 200 en OUT TO SPECTRUM ANALYZER OP471 8V/ s GAIN = 10,000 VS = 15V Figure 12. Pulsed Operation Figure 10. Current Noise Density Test Circuit V+ C2 10 F + C3 0.1 F When Rf 100 W and the input is driven with a fast, large signal pulse (>1 V), the output waveform will look as shown in Figure 12. During the fast feedthrough-like portion of the output, the input protection diodes effectively short the output to the input, and a current, limited only by the output short-circuit protection, will be drawn by the signal generator. With Rf 500 W, the output is capable of handling the current requirements (IL 20 mA at 10 V); the amplifier will stay in its active mode and a smooth transition will occur. Unity-Gain Buffer Applications R2 R1 C1 200pF VIN OP471 100 * R3 50 C4 10 F + VOUT CL 1000pF * C5 0.1 F When Rf > 3 kW, a pole created by Rf and the amplifier's input capacitance (2.6 pF) creates additional phase shift and reduces phase margin. A small capacitor (20 pF to 50 pF) in parallel with Rf helps eliminate this problem. APPLICATIONS Low Noise Amplifier *SEE TEXT V- PLACE SUPPLY DECOUPLING CAPACITORS AT OP471 Figure 11. Driving Large Capacitive Loads In the standard feedback amplifier, the op amp's output resistance combines with the load capacitance to form a lowpass filter that A simple method of reducing amplifier noise by paralleling amplifiers is shown in Figure 13. Amplifier noise, depicted in Figure 14, is around 5 nV//Hz @ 1 kHz (R.T.I.). Gain for each paralleled amplifier and the entire circuit is 100. The 200 W resistors limit circulating currents and provide an effective output resistance of 50 W. The amplifier is stable with a 10 nF capacitive load and can supply up to 30 mA of output drive. -10- REV. A OP471 High-Speed Differential Line Driver NOISE DENSITY - 0.58nV/ Hz/DIV REFERRED TO INPUT The circuit of Figure 15 is a unique line driver widely used in professional audio applications. With 18 V supplies, the line driver can deliver a differential signal of 30 V p-p into a 1.5 kW load. The output of the differential line driver looks exactly like a transformer. Either output can be shorted to ground without changing the circuit gain of 5, so the amplifier can easily be set for inverting, noninverting, or differential operation. The line driver can drive unbalanced loads, like a true transformer. +15V VIN R1 50 R3 200 100 90 10 0% 1/4 OP471E R2 5k Figure 14. Noise Density of Low-Noise Amplifier, G = 100 -15V R4 10k R4 50 1/4 OP471E R5 5k R6 200 1/4 OP471 VOUT = 100VIN R9 200 R2 2k IN R1 10k R7 2k R6 2k R9 10k R8 10k R11 50 -OUT R14 1k R13 10k R12 1k R10 50 R7 50 1/4 OP471E R8 5k 1/4 OP471 R10 50 1/4 OP471E R11 5k R12 200 R3 2k 1/4 OP471 R5 10k +OUT Figure 13. Low-Noise Amplifier High-Output Amplifier Figure 15. High-Speed Differential Line Driver The amplifier shown in Figure 16 is capable of driving 20 V p-p into a floating 400 W load. Design of the amplifier is based on a bridge configuration. A1 amplifies the input signal and drives the load with the help of A2. Amplifier A3 is a unity-gain inverter which drives the load with help from A4. Gain of the high output amplifier with the component values shown is 10, but can easily be changed by varying R1 or R2. +15V R5 5k C2 0.1 F R2 9k R1 1k R6 5k C1 10 F + 1/4 OP471E A1 VIN C3 0.1 F C4 10 F + R3 50 R7 50 1/4 OP471E A3 1/4 OP471E A2 R4 50 RL R8 50 1/4 OP471E A4 -15V Figure 16. High-Output Amplifier REV. A -11- OP471 Quad Programmable Gain Amplifier The combination of the quad OP471 and the DAC8408, a quad 8-bit CMOS DAC, creates a space-saving quad programmable gain amplifier. The digital code present at the DAC, which is easily set by a microprocessor, determines the ratio between the fixed DAC feedback resistor and the impedance the DAC ladder presents to the op amp feedback loop. Gain of each amplifier is: where n equals the decimal equivalent of the 8-bit digital code present at the DAC. If the digital code present at the DAC consists of all zeros, the feedback loop will be open causing the op amp output to saturate. The 20 MW resistors placed in parallel with the DAC feedback loop eliminates this problem with a very small reduction in gain accuracy. VOUT 256 =- VIN n DAC-8408ET VINA RFBA VDD VREF A R1 20M +15V IOUT1A DAC A IOUT2A/2B RFBB VREFB 1/4 OP470E VOUTA -15V VINB DAC B IOUT1B R2 20M 1/4 OP470E RFBC VREF C R3 20M VOUTB VINC IOUT1C DAC C 1/4 OP470E IOUT2C/2D VOUTC VIND RFBD VREF D R4 20M DAC D IOUT1D DAC DATA BUS PINS 9 (LSB) - 16 (MSB) DGND 1/4 OP470E VOUTD Figure 17. Quad Programmable Gain Amplifier -12- REV. A OP471 Low Phase Error Amplifier R2 R2 K1 R2 = R1 The simple amplifier depicted in Figure 18 utilizes monolithic matched operational amplifiers and a few resistors to substantially reduce phase error compared to conventional amplifier designs. At a given gain, the frequency range for a specified phase accuracy is over a decade greater than for a standard single op amp amplifier. The low phase error amplifier performs second-order frequency compensation through the response of op amp A2 in the feedback loop of A1. Both op amps must be extremely well matched in frequency response. At low frequencies, the A1 feedback loop forces V2/(K1 + 1) = VIN. The A2 feedback loop forces Vo/(K1 +1) = V2/(K1 + 1) yielding an overall transfer function of VO/VIN = K1 + 1. The dc gain is determined by the resistor divider at the output, VO, and is not directly affected by the resistor divider around A2. Note that similar to a conventional single op amp amplifier, the dc gain is set by resistor ratios only. Minimum gain for the low phase error amplifier is 10. Figure 19 compares the phase error performance of the low phase error amplifier with a conventional single op amp amplifier and a cascaded two-stage amplifier. The low phase error amplifier shows a much lower phase error, particularly for frequencies where / T < 0.1. For example, phase error of -0.1 occurs at 0.002 / T for the single op amp amplifier, but at 0.11 / T for the low phase error amplifier. For more detailed information on the low phase error amplifier, see Application Note AN-107. 1/4 OP471E A2 V2 VIN 1/4 OP471E A1 R1 R1 K1 VO VO = (K1 + 1) V IN ASSUME: A1 AND A2 ARE MATCHED. AO (s) = sT Figure 18. Low Phase Error Amplifier 0 -1 PHASE SHIFT - Degrees -2 -3 -4 SINGLE OP AMP (CONVENTIONAL DESIGN) CASCADED (TWO STAGES) -5 -6 -7 0.001 LOW-PHASE ERROR AMPLIFIER 0.005 0.01 0.05 0.1 FREQUENCY RATIO - 1/ , / T 0.5 1 Figure 19. Phase Error Comparison REV. A -13- OP471 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 14-Lead PDIP Package (N-14) 0.795 (20.19) 0.725 (18.42) 14 1 8 7 0.280 (7.11) 0.240 (6.10) 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) PIN 1 0.100 (2.54) BSC 0.210 (5.33) MAX 0.130 (3.30) 0.160 (4.06) MIN 0.115 (2.93) 0.022 (0.558) 0.070 (1.77) SEATING PLANE 0.014 (0.356) 0.045 (1.15) 0.060 (1.52) 0.015 (0.38) 14-Lead CERDIP Package (Q-14) 0.005 (0.13) MIN 0.098 (2.49) MAX 14 8 7 PIN 1 1 0.310 (7.87) 0.220 (5.59) 0.320 (8.13) 0.290 (7.37) 0.060 (1.52) 0.015 (0.38) 0.100 (2.54) BSC 0.785 (19.94) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.150 (3.81) MIN 0.070 (1.78) SEATING PLANE 0.030 (0.76) 15 0 0.015 (0.38) 0.008 (0.20) 16-Lead SOIC Package (R-16) 0.4133 (10.50) 0.3977 (10.00) 16 9 0.2992 (7.60) 0.2914 (7.40) 1 8 0.4193 (10.65) 0.3937 (10.00) PIN 1 0.050 (1.27) BSC 0.1043 (2.65) 0.0926 (2.35) 0.0291 (0.74) 0.0098 (0.25) 45 0.0118 (0.30) 0.0040 (0.10) 8 0.0192 (0.49) SEATING 0 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) -14- REV. A OP471 Revision History Location Data Sheet changed from REV. 0 to REV. A. Page Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Deleted DICE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Deleted WAFER TEST CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 REV. A -15- -16- C00307-0-4/02(A) PRINTED IN U.S.A. |
Price & Availability of OP471EY |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |