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JBT6K49-AS
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
JBT6K49-AS
Power supply IC for TFT LCD Panels
The JBT6K49-AS chip is an integrated circuit (IC) for generating the supply voltages necessary for a TFT LCD panel driver. When used in combination with the T6K47 source driver and the T6K48 gate driver for TFT LCD panels, the JBT6K49-AS enables the module set to operate with low power consumption. A high-speed CMOS process is employed to achieve low power consumption and high-speed operation for the JBT6K49-AS.
Features
* Built-in circuits : DC-DC converters and oscillation circuit for DC-DC converters High-precision regulator Binary buffer for -correction Level shifter circuit for Vcom * * * * * * * Supply voltage (VDD) : 2.7 V to 3.3 V Supply voltage (VBAT) : 2.7 V to 4.2 V Low power consumption Operating temperature : -20C to 75C CMOS process Recommended drivers : T6K47 source driver for TFT LCD T6K48 gate driver for TFT LCD Package :
Product Name JBT6K49-AS (PI) Description Gold bump chip
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JBT6K49-AS
Block Diagram
FSEL1 FSEL2 2 CA1+ CA1CA2+ CA2VDD /STB /RST /EXP
VSIN
VBAT
VSOUT1
CKSEL EXTCK
DC-DC Converter 1
Oscillation Circuit
CB1+ CB1CB2+ CB2CB3+ CB3CB4+ CB4CB5+ CB5VTOUT
Test Circuit REF Circuit DC-DC Converter 2
TEST SDA SCK FUSE** VREF VREFIN VSOUT2
22
Vcom
COMOUT
VTIN CC1+ CC1GND (2) VBOUT
DC-DC Converter 3
Gamma Power Supply
VLC /VLC
VEE
GND (1)
TEG**
POL
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PAD Specifications
Characteristics Chip Size (1) (2) Chip End Coordinates (3) (4) Bump Pitch Bump Height Size 4600 3050 -2300, 1525 -2300, -1525 2300, -1525 2300, 1525 140 15 mm mm mm Unit mm
Characteristics TEG pin FUSE pin
Number of Pins 9 22
Note 1: The TEG1 to TEG9 pins and the FUSE** pins are reserved for testing by Toshiba. They are not intended to for use in the operation of the JBT6K49-AS. They must always be left open during normal operation.
Alignment Mark Specifications
Non-designed area X and Y coordinates
90 mm AI
100 mm
90 mm
90 mm
100 mm
90 mm
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JBT6K49-AS
PAD Layout
VBOUT VBOUT POL DUMMY CKSEL EXTCK FSEL1 FSEL2 VEE /STB TEST EXP SDA SCK /RST VDD VDD
CC1GND2 GND2 GND2 CC1+ VTIN VCC VCC VTOUT CB5CB5+ CB4CB4+ CB3CB3+ CB2CB2+ CB1CB1+ DUMMY CA2CA2+ CA1CA1+ VSOUT1 VSIN VBAT
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
JBT6K49-AS Chip size: 4.60 3.05 mm
TEG9 TEG8 TEG7 TEG6 DUMMY GND1 VSOUT2 VREFIN VREF /VLC VLC COMOUT TEG5 TEG4 TEG3 TEG2 TEG1
Input/Output Pins
Unit: mm 140 58 82 58 82 58 82 58
58
140 98 40 58 58 98
58
58
58
FUSE11 FUSE12 FUSE1G FUSE13 FUSE14 FUSE21 FUSE22 FUSE2G FUSE23 FUSE24 FUSE31 FUSE32 FUSE33 FUSE3G FUSE34 FUSE35 FUSE36 FUSE41 FUSE42 FUSE4G FUSE43 FUSE44 DUMMY DUMMY DUMMY DUMMY DUMMY
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Pad Coordinates
No. Pin Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 FUSE11 FUSE12 FUSE1G FUSE13 FUSE14 FUSE21 FUSE22 FUSE2G FUSE23 FUSE24 FUSE31 FUSE32 FUSE33 FUSE3G FUSE34 FUSE35 FUSE36 FUSE41 FUSE42 FUSE4G FUSE43 FUSE44 DUMMY DUMMY DUMMY DUMMY DUMMY TEG1 TEG2 TEG3 TEG4 TEG5 COMOUT COMOUT VLC VLC /VLC /VLC VREF VREF VREFIN VREFIN VSOUT2 XYCoordinate Coordinate -1890 -1750 -1610 -1470 -1330 -1190 -1050 -910 -770 -630 -490 -350 -210 -70 70 210 350 490 630 770 910 1050 1190 1330 1470 1610 1750 2115 2115 2115 2115 2115 2115 2015 2115 2015 2115 2015 2115 2015 2115 2015 2115 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1340 -1240 -1100 -960 -820 -680 -540 -540 -400 -400 -260 -260 -120 -120 20 20 160 No. Pin Name 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 VSOUT2 GND1 GND1 DUMMY TEG6 TEG7 TEG8 TEG9 VBAT VBAT VSIN VSIN VSOUT1 VSOUT1 CA1+ CA1CA2+ CA2DUMMY CB1+ CB1CB2+ CB2CB3+ CB3CB4+ CB4CB5+ CB5VTOUT VTOUT VCC VCC VCC VTIN VTIN CC1+ GND2 GND2 GND2 GND2 CC1VBOUT XYCoordinate Coordinate 2015 2115 2015 2115 2115 2115 2115 2115 1750 1750 1610 1610 1470 1470 1330 1190 1050 910 770 630 490 350 210 70 -70 -210 -350 -490 -630 -770 -770 -910 -910 -1050 -1190 -1190 -1330 -1470 -1610 -1610 -1750 -1890 -2115 160 300 300 440 580 720 860 1000 1340 1240 1340 1240 1340 1240 1340 1340 1340 1340 1340 1340 1340 1340 1340 1340 1340 1340 1340 1340 1340 1340 1240 1340 1240 1340 1340 1240 1340 1340 1340 1240 1340 1340 1000 No. Pin Name 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 VBOUT POL DUMMY CKSEL EXTCK FSEL1 FSEL2 VEE /STB TEST EXP SDA SCK /RST VDD VDD A/M_1 A/M_2
[Unit: mm]
XYCoordinate Coordinate -2115 -2115 -2115 -2115 -2115 -2115 -2115 -2115 -2115 -2115 -2115 -2115 -2115 -2115 -2115 -2115 2110 -2110 860 720 580 440 300 160 20 -120 -260 -400 -540 -680 -820 -960 -1100 -1240 1335 1335
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Pin Function Description (1)
Pin Name CKSEL I/O I Function External clock pulse selection pin CKSEL = "L"the built-in oscillator is used. CKSEL = "H"an external clock pulse is accepted. It must be input on the EXTCK pin. External clock pulse input pin Input an external clock pulse on this pin if External Clock Pulse Supply Mode has been selected. If the built-in oscillator is selected (Self-Oscillation Mode), this pin must be fixed Low. Oscillation frequency switching input pins These pins can be used to select the oscillation frequency for the DC-DC converters.
EXTCK
I/O
FSEL1 FSEL2
I
FSEL2 0 0 1 1
FSEL1 0 1 0 1
DC-DC converter clock frequency (typ.) 3.5 kHz 5.0 kHz 7.5 kHz 10.0 kHz
CA1+CA1CA2+CA2VSOUT1 VSOUT2
I/O
DC-DC converter 1 capacitor connection pins These pins can be connected to voltage booster capacitors. The recommended capacitance for the DC-DC converter capacitors is 1 mF. DC-DC converter 1 output pins These pins output the supply voltage (AVDD) for the T6K47. They are electrically connected via an aluminum wire inside the IC chip. Normally a capacitor with a capacitance of approximately 10 mF is connected across the VSS pins in order to maintain the voltage level. DC-DC converter 1 power supply input pin This is the power supply feedback pin for DC-DC converter 1. It is normally connected to the VSOUT1 pin. Reference voltage input pin An operational-amplifier output feedback voltage is input on this pin to generate the VS voltage. It should normally be connected to the VREF pin. Reference power supply output pin This is an operational-amplifier output pin which generates the VS voltage. It is normally connected to a capacitor with a capacitance of 0.1 mF to 0.47 mF. The capacitance should be adjusted as necessary to suit the conditions in which the device is used.
O
VSIN
I
VREFIN
I
VREF
O
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Pin Function Description (2)
Pin Name CB1+CB1CB2+CB2CB3+CB3CB4+CB4CB5+CB5VTOUT VTIN I/O I/O Function DC-DC converter 2 capacitor connection pins Connect these pins to external voltage booster capacitors in order to generate negative voltages for the T6K48. The recommended capacitance for the capacitors is 1 mF.
O I
DC-DC converter 2 output pin This pin outputs the supply high-level voltage (+13 V) used for the T6K48. DC-DC converter 3 supply voltage input pin The voltage for DC-DC converter 3 used to generate a voltage on the VBOUT pin is input on this pin. It must be connected to the VTOUT pin. DC-DC converter 3 capacitor connection pins Connect these pins to an external voltage booster capacitor in order to generate negative voltages for the T6K48. The recommended capacitance for the DC-DC converter capacitor is 1 mF. DC-DC converter 3 output pin This pin outputs the supply low-level voltage (-13 V) used for the T6K48. Standby signal input pin The chip stays in standby state while /STB = L. Enabling the /STB pin halts all the built-in circuits. Reset signal input pin A reset signal must be input on this pin after the power is turned on. Alternating signal input pin This POL signal inverts the phase of the COMOUT, VLC and /VLC signals. See Fig. 2 for an explanation of how to invert the phase. g-correction power supply voltage pin This pin outputs a voltage whose phase is under the control of the POL signal. The following table lists the output voltages and their phases. POL H L VLC VSO 0V BVLC 0V VSO
CC1+CC1-
I/O
VBOUT /STB
O I
/RST POL
I I
VLC /VLC
3/4
COMOUT
O
Common signal output pin This pin outputs, in phase with the POL signal, a signal whose level has been converted to the board level necessary for the LCD. DC-DC converter ON/OFF switching pin This pin is used to turn the DC-DC converters ON/OFF. Normally it should be connected to GND.
EXP
I
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Pin Function Description (3)
Pin Name VBAT VDD VCC VEE GND1GND2 I/O 3/4 3/4 3/4 3/4 3/4 Analog circuit supply voltage Logic circuit supply voltage DC-DC converter 2 supply voltage DC-DC converter 3 supply voltage Ground pins Note 2: The GND1 and GND2 pins serve different circuit blocks. Connect both pins to ground. Function
Pin Function Description (4)
Pin Name TEST SCK I/O I I Function Test mode switching pin This is an enable pin for Toshiba Test Mode. Normally it should be grounded. Test mode clock pin A clock pulse for serial data transfer used in Toshiba Test Mode is input on this pin. Normally it should be grounded. Test mode data pin Serial data used in Toshiba Test Mode is input on this pin. Normally it should be grounded. Toshiba test pin (1) This pin is a dedicated pin used only in Toshiba Test Mode. Normally it should be left open. Toshiba test pin (2) This pin is a dedicated pin used only in Toshiba Test Mode. Normally it should be left open. Toshiba test pin (3) This pin is a dedicated pin used only in Toshiba Test Mode. Normally it should be left open.
SDA FUSE** FUSE*G TEG**
I I I I
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JBT6K49-AS
Description of Functions and Operation
DC-DC converter
The JBT6K49-AS generates an analog supply voltage for the source driver (T6K47) and an LCD-driving voltage for the gate driver (T6K48). The DC-DC converter consists of three circuit blocks which output +4.8 V, +13.0 V and -13.0 V. The ways in which the DC-DC converter can be used are shown below.
DC-DC converter (1): Generates +4.8 V. CA1 + CA1 DC-DC converter (1): Generates +13.0 V. CB1 + CB1 DC-DC converter (1): Generates -13.0 V.
CC1 + CC1 -
CA2 + CA2 -
CB5 + CB5 -
Note 2: Connect a voltage boosting kick capacitor or capacitors to each circuit block. Normally the capacitance of the kick capacitor should be 1.0 mF. Connect a 10 mF capacitor across the boosted-voltage output pin and the VSS pin of DC-DC converter (1), since the voltage generated in the DC-DC converter is unstable. In addition, connect a 1 mF capacitor across the boosted-voltage output pin and the VSS pin of DC-DC converter (1).
Oscillation Circuit
The JBT6K49-AS generates the clock pulse used by the DC-DC converter. The FSEL1 and FSEL2 pins can be used to select the clock oscillation frequency. The following table lists the correspondence between the pin settings and the selected frequency.
FSEL2 0 0 1 1
FSEL1 0 1 0 1
Oscillation Frequency (initial value) 3.5 kHz 5.0 kHz 7.0 kHz 10.0 kHz
Note 3: The relationship of the oscillation frequency and the oscillation resistance depends on assembly and measuring conditions. Therefore, select the oscillation resistance after enough evaluating.
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g-Correction Reference Voltage
The +4.8 V generated by DC-DC converter (1) is used to generate g-correction reference voltages used by the source driver (T6K47). The voltages generated serve as the maximum and minimum g-correction voltages. These two voltage levels are switched by the signal input on the POL pin, allowing the g-correction voltage circuit to be configured easily. Fig.1 is an example of a g-correction voltage circuit.
/VLC V0 V1 Source driver JBT6K49-AS V2 V3 V4 VLC V5 T6K47
Fig.1 Example of a C-correction voltage circuit
The following table lists the voltages output from the VLC and /VLC pins and the corresponding levels on the POL pin.
POL 0 1
VLC 0 VSO
/VLC VSO 0
COMOUT 0 VSO
Power-on
The JBT6K49-AS incorporates a trimming circuit designed to increase the precision of the LCD-driving output voltage. After the power is turned on, the trimming circuit is reset on the leading edge of the signal input on the reset pin. Use the following /RST pin processing sequence after power-on.
VDD/VBAT /RST 1 ms < t =
t
/STB
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Absolute Maximum Ratings (unless otherwise specified, VSS = 0 V and Ta = 25C)
Characteristics Supply Voltage (1) Supply Voltage (2) Supply Voltage (3) Supply Voltage (4) Input Voltage Output Voltage Operating Temperature Storage Temperature (Note 5) (Note 5) Symbol VDD VBAT VCC VEE VIN VOUT Topr Tstg Rating -0.3 to 6.0 -0.3 to 6.5 -0.3 to 20 -20 to 0.3 -0.3 to VDD + 0.3 0 to 6.0 -20 to 75 -55 to 125 Unit V V V V V V C C
Note 4: The voltages listed in the table are referenced to ground (0 V). Note 5: VBAT < VCC =
Electrical Characteristics
DC Characteristics (1)
(unless otherwise specified, VDD = 2.7 V to 3.3 V, VBAT = 2.7 V to 4.2 V and Ta = -20C to 75C)
Characteristics Operating Supply Voltage (1) Operating Supply Voltage (2) Symbol VDD VBAT VIL Input Voltage VIH 3/4 3/4 3/4 3/4 3/4 CKSEL = "H" 3/4 Vinp = VDD to GND 0.8 VDD -1.0 2 45 3/4 3/4 3/4 3/4 50 3/4 Test Circuit 3/4 3/4 3/4 Test Condition 3/4 3/4 3/4 Min 2.7 2.7 0 Typ. 3/4 3/4 3/4 Max 3.3 4.2 0.2 VDD VDD mA kHz % ns Unit V V Related Pins VDD VBAT CKSEL, POL, /STB, EXTCK, FSEL1/2, /RST CKSEL, POL, /STB, EXTCK, FSEL1/2, /RST EXTCK EXTCK EXTCK
V
Input Leakage Current External Clock Frequency External Clock Pulse Duty Ratio External Clock Pulse Rise/Fall Time
IIL fex fduty tr/tf
1.0 8 55 50
DC Characteristics (2)
(unless otherwise specified, VDD = 2.7 V to 3.3 V, VBAT = 2.7 V to 4.2 V and Ta = -20C to 75C, For typical ratings the conditions are: VDD = 3.0V, VBAT = 3.0V and Ta = 25C)
Characteristics Static Drain Dynamic Drain (1) Dynamic Drain (2) Dynamic Drain (3) Symbol IDDSTB IDD1 IDD2 IBAT Test Circuit 3/4 3/4 3/4 3/4 Test Condition /STB = "L" With no load With typical load Fosc = 3.5 kHz Min 3/4 3/4 3/4 3/4 Typ. 1 0.2 0.2 350 Max 5 2 2 500 Unit mA mA mA mA Related Pins GND VDD VDD VBAT
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DC Characteristics (3)
(unless otherwise specified, VDD = 2.7 V to 3.3 V, VBAT = 2.7 V to 4.2 V and Ta = -20C to 75C)
Characteristics Symbol VSO1 DC-DC Converter Characteristic (1) Test Circuit 3/4 Test Condition Iload = 42 mA Ta = 25C Iload = 42 mA VSO2 3/4 Ta = -20C Ta = 75C VSO3 DC-DC Converter Characteristic (2) DC-DC Converter Characteristic (3) VTO1 VTO2 VBO1 VBO2 3/4 3/4 3/4 3/4 3/4 Iload = 2.5mA Iload = 0 mA Iload = 100 mA Iload = 0 mA Iload = 100 mA 4.70 3/4 12.3 -13.7 3/4 3/4 13.0 3/4 -13.0 3/4 3/4 13.7 3/4 3/4 -12.3 V VTOUT 4.75 4.80 4.90 Min 4.75 Typ. 4.80 Max 4.85 Unit Related Pins
V
VSOUT
V
VBOUT
DC Characteristics (4)
(unless otherwise specified, VDD = 2.7 V to 3.3 V, VBAT = 2.7 V to 4.2 V and Ta = -20C to 75C)
Characteristics g-Output Voltage Characteristic (1) Symbol VLC1H VLC2H g-Output Voltage Characteristic (2) VLC1L VLC2L VcomL VcomH Test Circuit 3/4 3/4 3/4 3/4 3/4 3/4 POL = "L" POL = "L" POL = "H" Test Condition Min VSO1 - 0.05 - 0.05 - 0.05 VSO1 - 0.05 - 0.05 VSO1 - 0.05 Typ. VSO1 0 0 VSO1 0 VSO1 Max VSO1 + 0.05 0.05 0.05 VSO1 + 0.05 0.05 VSO1 + 0.05 Unit V V V V V COMOUT V Related Pins VLC /VLC VLC /VLC
POL = "H"
COM Output Voltage Characteristic
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Application circuit
Internal CR oscillator used (5 kHz) Using DC-DC converter
1SS357 1 mF 1SS357 1 mF 1 mF 1 mF 1 mF 1 mF 1 mF 1 mF 1 mF 1 mF 1 mF VBAT
Connect to T6K48 (13.0 V)
Connect to T (4.8 V) VSIN CA1CA1+ VSOUT1 VBAT
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 VCC VTIN VCC CB5CB5+ CB4CB4+ CB3CB3+ CB2CB2+ CB1CB1+ CA2DUMMY CC1GND2 GND2 GND2 CC1+ VTOUT CA2+
1 mF 45 VBOUT 46 VBOUT 47 POL 48 DUMMY 49 CKSEL 50 EXTCK 51 FSEL1 52 FSEL2 53 VEE 54 /STB 55 TEST 56 EXP 57 SDA 58 SCK 59 /RST 1 mF 60 VDD 61 VDD FUSE11 FUSE12 FUSE1G FUSE13 FUSE14 FUSE21 FUSE22 FUSE2G FUSE23 FUSE24 FUSE31 FUSE32 FUSE33 FUSE3G FUSE34 FUSE35 FUSE36 FUSE41 FUSE42
Connect to T6K48 (-13.0 V)
TEG9 17 TEG8 16 TEG7 15 TEG6 14 DUMMY 13 GND1 12 VSOUT2 11 10 mF GND
POL
T6K49
VREFIN 10 VREF 9 /VLC 8 VLC 7 COMOUT 6 TEG5 5 TEG4 4 TEG3 3 TEG2 2 TEG1 1 FUSE4G FUSE43 FUSE44 DUMMY DUMMY DUMMY DUMMY DUMMY
1 mF
/STB
Connect to T6 LCD 1 mF
/RST
VDD
62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
JBT6K49-AS
RESTRICTIONS ON PRODUCT USE
000707EBE
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * Polyimide base film is hard and thin. Be careful not to injure yourself on the film or to scratch any other parts with the film. Try to design and manufacture products so that there is no chance of users touching the film after assembly, or if they do , that there is no chance of them injuring themselves. When cutting out the film, try to ensure that the film shavings do not cause accidents. After use, treat the leftover film and reel spacers as industrial waste. * Light striking a semiconductor device generates electromotive force due to photoelectric effects. In some cases this can cause the device to malfunction. This is especially true for devices in which the surface (back), or side of the chip is exposed. When designing circuits, make sure that devices are protected against incident light from external sources. Exposure to light both during regular operation and during inspection must be taken into account. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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