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IS93C46A
1,024-BIT SERIAL ELECTRICALLY ERASABLE PROM
FEATURES DESCRIPTION
ISSI
JUNE 2004
(R)
* Industry-standard Microwire Interface The IS93C46A is a low-cost 1kb non-volatile, -- Non-volatile data storage ISSI (R) serial EEPROM. It is fabricated using an -- Low voltage operation: enhanced CMOS design and process. The Vcc = 2.5V to 5.5V IS93C46A contains power-efficient read/write -- Full TTL compatible inputs and outputs memory, and organization of 128 bytes of 8 bits -- Auto increment for efficient data dump or 64 words of 16 bits. When the ORG pin is * User Configured Memory Organization connected to Vcc or left unconnected, x16 is -- By 16-bit or by 8-bit selected; when it is connected to ground, x8 is selected. The IS93C46A is fully backward * Hardware and software write protection compatible with IS93C46. -- Defaults to write-disabled state at power-up -- Software instructions for write-enable/disable An instruction set defines the operation of the * Enhanced low voltage CMOS E2PROM devices, including read, write, and mode-enable technology functions. To protect against inadvertent data * Versatile, easy-to-use Interface modification, all erase and write instructions are -- Self-timed programming cycle accepted only while the device is write-enabled. A -- Automatic erase-before-write selected x8 byte or x16 word can be modified with DataShee -- Programming status indicator a single WRITE or ERASE instruction. -- Word and chip erasable Additionally, the two instructions WRITE ALL or .com -- Chip select enables power savings ERASE ALL can program the entire array. Once a device begins its self-timed program procedure, * Durable and reliable the data out pin (Dout) can indicate the READY/ -- 40-year data retention after 1M write cycles -- 1 million write cycles BUSY status by raising chip select (CS). The self-- Unlimited read cycles timed write cycle includes an automatic erase-- Schmitt-trigger inputs before-write capability. The device can output any number of consecutive bytes/words using a single READ instruction.
FUNCTIONAL BLOCK DIAGRAM
DUMMY BIT R/W AMPS INSTRUCTION DECODE, CONTROL, AND CLOCK GENERATION ADDRESS REGISTER ADDRESS DECODER EEPROM ARRAY 128x8 64x16
DATA REGISTER DIN INSTRUCTION REGISTER
DOUT
CS
SK
WRITE ENABLE
HIGH VOLTAGE GENERATOR
Copyright (c) 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to .com latest version of this device specification before relying on any published information and before placing orders for products. obtain the
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IS93C46A
ISSI
8-Pin JEDEC SOIC "G"
VCC NC ORG GND
(R)
PIN CONFIGURATIONS
8-Pin DIP, 8-Pin TSSOP
CS SK DIN DOUT 1 2 3 4 8 7 6 5
8-Pin JEDEC SOIC "GR"
ORG GND DOUT DIN
NC VCC CS SK
1 2 3 4
8 7 6 5
CS SK DIN DOUT
1 2 3 4
8 7 6 5
VCC NC ORG GND
(Rotated)
PIN DESCRIPTIONS
CS SK DIN DOUT Chip Select Serial Data Clock Serial Data Input Serial Data Output Organization Select Not Connected Power Ground
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NC Vcc GND
instruction begins with a start bit of the logical "1" or HIGH. Following this are the opcode (2 bits), address field (6 or 7 bits), and data, if appropriate. The clock signal may be held stable at any moment to suspend the device at its last state, allowing clockspeed flexibility. Upon completion of bus communication, CS would be pulled LOW. The device then would enter Standby mode if no internal programming is underway. .com(READ) Read The READ instruction is the only instruction that outputs serial data on the DOUT pin. After the read instruction and address have been decoded, data is transferred from the selected memory register into a serial shift register. (Please note that one logical "0" bit precedes the actual 8 or 16-bit output data string.) The output on DOUT changes during the low-to-high transitions of SK (see Figure 3).
DataShee
Applications
The IS93C46A is very popular in many high-volume applications which require low-power, low-density storage. Applications using this device include industrial controls, networking, and numerous other consumer electronics.
Low Voltage Read
The IS93C46A has been designed to ensure that data read operations are reliable in low voltage environments. They provide accurate operation with Vcc as low as 2.5V.
Endurance and Data Retention
The IS93C46A is designed for applications requiring up to 1M programming cycles (WRITE, WRALL, ERASE and ERAL). It provides 40 years of secure data retention without power after the execution of 1M programming cycles.
Auto Increment Read Operations
In the interest of memory transfer operation applications, the IS93C46A has been designed to output a continuous stream of memory content in response to a single read operation instruction. To utilize this function, the system asserts a read instruction specifying a start location address. Once the 8 or16 bits of the addressed register have been clocked out, the data in consecutively higher address locations is output. The address will wrap around continuously with CS HIGH until the chip select (CS) control pin is brought LOW. This allows for single instruction data dumps to be executed with a minimum of firmware overhead.
Device Operations
The IS93C46A is controlled by a set of instructions which are clocked-in serially on the Din pin. Before each low-to-high transition of the clock (SK), the CS pin must have already been raised to HIGH, and the Din value must be stable at either LOW or HIGH. Each
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IS93C46A
Write Enable (WEN)
The write enable (WEN) instruction must be executed before any device programming (WRITE, WRALL, ERASE, and ERAL) can be done. When Vcc is applied, this device powers up in the write disabled state. The device then remains in a write disabled state until a WEN instruction is executed. Thereafter, the device remains enabled until a WDS instruction is executed or until Vcc is removed. (See Figure 4.) (Note: Chip select must remain LOW until Vcc reaches its operational value.)
ISSI
Write All (WRALL)
(R)
The write all (WRALL) instruction programs all registers with the data pattern specified in the instruction. As with the WRITE instruction, the falling edge of CS must occur to initiate the self-timed programming cycle. If CS is then brought HIGH after a minimum wait of 250 ns (tCS), the DOUT pin indicates the READY/BUSY status of the chip (see Figure 6).
Write Disable (WDS)
The write disable (WDS) instruction disables all programming capabilities. This protects the entire device against accidental modification of data until a WEN instruction is executed. (When Vcc is applied, this part powers up in the write disabled state.) To protect data, a WDS instruction should be executed upon completion of each programming operation.
Write (WRITE)
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The WRITE instruction includes 8 or 16 bits of data to be written into the specified register. After the last data bit has been applied to DIN, and before the next rising edge of SK, CS must be brought LOW. If the device is writeenabled, then the falling edge of CS initiates the selftimed programming cycle (see WEN). Erase Register (ERASE) If CS is brought HIGH, after a minimum wait of 250 ns (5V After the erase instruction is entered, CS must be brought operation) after the falling edge of CS (tCS) DOUT will LOW. The falling edge of CS initiates the self-timed internal indicate the READY/BUSY status of the chip. Logical "0" programming cycle. Bringing CS HIGH after a minimum of means programming is still in progress; logical "1" means tCS, will cause DOUT to indicate the READ/BUSY status of the the selected register has been written, and the part is chip: a logical "0" indicates programming is still in progress; ready for another instruction (see Figure 5). The READY/ DataShee a logical "1" indicates the erase cycle is complete and the BUSY status will not be available if: a) The CS input goes part .comis ready for another instruction (see Figure 8). HIGH after the end of the self-timed programming cycle, tWP; or b) Simultaneously CS is HIGH, Din is HIGH, and Erase All (ERAL) SK goes HIGH, which clears the status flag. Full chip erase is provided for ease of programming. Erasing the entire chip involves setting all bits in the entire memory array to a logical "1" (see Figure 9).
INSTRUCTION SET - IS93C46A
8-bit Organization (ORG = GND) Address (1) Input Data (A6-A0) 11xxxxx (A6-A0) 01xxxxx 00xxxxx (A6-A0) 10xxxxx -- -- (D7-D0) (D7-D0) -- -- --
(3) (3)
Instruction READ WEN (Write Enable) WRITE
Start Bit 1 1 1 1 1 1 1
OP Code 10 00 01 00 00 11 00
16-bit Organization (ORG = Vcc) Address (1) Input Data (A5-A0) 11xxxx (A5-A0) 01xxxx 00xxxx (A5-A0) 10xxxx -- -- (D15-D0) (D15-D0) -- -- --
(2) (2)
WRALL (Write All Registers) WDS (Write Disable) ERASE ERAL (Erase All Registers)
Notes: 1. x = Don't care bit. 2. If input data is not 16 bits exactly, the last 16 bits will be taken as input data. 3. If input data is not 8 bits exactly, the last 8 bits will be taken as input data.
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IS93C46A
ISSI
Value -0.3 to +6.5 -40 to +85 -40 to +125 -65 to +150 Unit V C C C
(R)
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter VGND Voltage with Respect to GND TBIAS Temperature Under Bias (Commercial or Industrial) TBIAS Temperature Under Bias (Automotive) TSTG Storage Temperature
Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
OPERATING RANGE
Range Commercial Ambient Temperature 0C to +70C -40C to +85C -40C to +125C VCC 2.5V to 5.5V 2.5V to 5.5V 2.7V to 5.5V or 4.5V to 5.5V
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Industrial Automotive
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CAPACITANCE
Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 5 5 Unit pF pF
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IS93C46A
ISSI
Test Conditions IOL = 100 A IOL = 2.1 mA IOH = -100 A IOH = -400 A Vcc 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V VIN = 0V to VCC (CS, SK,DIN,ORG) VOUT = 0V to VCC, CS = 0V Min. -- -- VCC - 0.2 2.4 0.7XVCC 0.7XVCC -0.3 -0.3 0 0 Max. 0.2 0.4 -- -- VCC+1 VCC+1 0.2XVCC 0.8 2.5 2.5
(R)
DC ELECTRICAL CHARACTERISTICS
TA = 0C to +70C for Commercial, -40C to +85C for Industrial, and -40C to +125C for Automotive. Symbol Parameter VOL VOL1 VOH VOH1 VIH VIL ILI ILO
Notes: Automotive grade devices in this table are tested with Vcc = 2.7V to 5.5V and 4.5V to 5.5V.
Unit V V V V V V A A
Output LOW Voltage Output LOW Voltage Output HIGH Voltage Output HIGH Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Output Leakage
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IS93C46A
ISSI
Test Conditions CS = VIH, SK = 1 MHz CMOS input levels CS = VIH, SK = 1 MHz CMOS input levels CS = VIH, SK = 0V Vcc 2.7V 5.0V 2.7V 5.0V 2.7V 5.0V Min. -- -- -- -- -- -- Max. 100 500 1 3 10 30 Unit A A mA mA A A
(R)
POWER SUPPLY CHARACTERISTICS
TA = 0C to +70C for Commercial Symbol Parameter ICC1 ICC2 ISB Vcc Read Supply Current Vcc Write Supply Current Standby Current
POWER SUPPLY CHARACTERISTICS
TA = -40C to +85C for Industrial Symbol Parameter Test Conditions Vcc Min. -- -- -- -- -- -- Max. 100 500 1 3 2 4 Unit A A mA mA A A
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ICC2 ISB
Vcc Read Supply Current Vcc Write Supply Current Standby Current
CS = VIH, SK = 1 MHz 2.7V CMOS input levels 5.0V .com CS = VIH, SK = 1 MHz 2.7V CMOS input levels 5.0V CS = VIH, SK = 0V 2.7V 5.0V
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POWER SUPPLY CHARACTERISTICS
TA = -40C to +125C for Automotive Symbol Parameter ICC1 ICC2 ISB Vcc Read Supply Current Vcc Write Supply Current Standby Current Test Conditions CS = VIH, SK = 1 MHz CMOS input levels CS = VIH, SK = 1 MHz CMOS input levels CS = VIH, SK = 0V Vcc 2.7V 5.0V 2.7V 5.0V 2.7V 5.0V Min. -- -- -- -- -- -- Max. 100 500 1 3 3 8 Unit A A mA mA A A
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IS93C46A
ISSI
Min. 0 0 0 500 350 250 500 350 250 500 250 250 100 50 50 100 100 100 0 0 0 100 100 100 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max. 1 1 2 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 400 350 250 400 350 250 400 250 250 200 200 100 10 10 5 Unit Mhz Mhz Mhz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms ms
(R)
AC ELECTRICAL CHARACTERISTICS
TA = TA = 0C to +70C for Commercial, -40C to +85C for Industrial Symbol Parameter Test Conditions Vcc
fSK tSKH tSKL tCS tCSS tDIS
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SK Clock Frequency
2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V Relative to SK 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V
SK HIGH Time
SK LOW Time
Minimum CS LOW Time
CS Setup Time
Din Setup Time
Relative to SK
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tCSH tDIH tPD1 tPD0 tSV tDF tWP
CS Hold Time
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Relative to SK 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V
Din Hold Time
Output Delay to "1"
AC Test
Output Delay to "0"
AC Test
CS to Status Valid
AC Test
CS to Dout in 3-state
AC Test, CS=VIL
Write Cycle Time
Notes:
1. C L = 100pF
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IS93C46A
ISSI
Test Conditions Vcc 2.7V to 5.5V 4.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V Relative to SK Relative to SK Relative to SK 2.7V to 5.5V 4.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V Min. 0 0 500 250 500 250 250 250 100 50 100 100 0 0 100 100 -- -- -- -- -- -- -- -- -- -- Max. 1 2 -- -- -- -- -- -- -- -- -- -- -- -- -- -- 400 250 400 250 250 250 200 100 10 5 Unit Mhz Mhz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms
(R)
AC ELECTRICAL CHARACTERISTICS
TA = -40C to +125C for Automotive Symbol Parameter
fSK tSKH tSKL tCS tCSS tDIS
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SK Clock Frequency SK HIGH Time SK LOW Time Minimum CS LOW Time CS Setup Time Din Setup Time CS Hold Time Din Hold Time Output Delay to "1" Output Delay to "0" CS to Status Valid CS to Dout in 3-state Write Cycle Time
tCSH tDIH tPD1 tPD0 tSV tDF tWP
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Relative .com to 5.5V to SK 2.7V 4.5V to 5.5V AC Test AC Test AC Test AC Test, CS=VIL 2.7V to 5.5V 4.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V
Notes: 1. C L = 100pF
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IS93C46A
ISSI
(R)
AC WAVEFORMS FIGURE 2. SYNCHRONOUS DATA TIMING
CS tCSS SK tDIS DIN tPD0 DOUT (READ) tSV DOUT (WRITE) (WRALL) (ERASE) (ERAL) STATUS VALID tDF tPD1 tDF tDIH tSKH
T tSKL tCSH
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FIGURE 3. READ CYCLE TIMING
tCS CS
1 1 0 An A0
DIN
DOUT
0
Dm
D0
*
*Address Pointer Cycles to the Next Register
Notes: To determine address bits An-A0 and data bits Dm-Do, see Instruction Set.
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IS93C46A
ISSI
WRITE ENABLE (WEN) TIMING
(R)
AC WAVEFORMS FIGURE 4.
tCS CS
DIN
1
0
0
1
1
DOUT = 3-state
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FIGURE 5. WRITE (WRITE) CYCLE TIMING
tCS CS
DIN
1
0
1
An
A0
Dm
D0
tSV
tDF
READY
DOUT
BUSY
tWP
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Notes: 1. After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status (DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction. 2. To determine address bits An-A0 and data bits Dm-D0, see Instruction Set.
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IS93C46A
ISSI
(R)
AC WAVEFORMS FIGURE 6. WRITE ALL (WRALL) TIMING
tCS CS
1 0 0 0 1 Dm D0
DIN
tSV
DOUT
BUSY
READY
tWP
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DataShee
Notes: .com 1. After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status (DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction. 2. To determine data bits Dm-D0, see Instruction Set.
FIGURE 7. WRITE DISABLE (WDS) CYCLE TIMING
tCS CS
DIN
1
0
0
0
0
DOUT = 3-STATE
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IS93C46A
ISSI
(R)
AC WAVEFORMS FIGURE 8. ERASE (REGISTER ERASE) CYCLE TIMING
tCS CS
DIN
1
1
1
An
An-1
A0
tSV DOUT
BUSY READY
tDF
tWP
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Notes: To determine data bits An - A0, see Instruction Set.
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FIGURE 9. ERASE ALL (ERAL) CYCLE TIMING
tCS
CS
DIN
1
0
0
1
0
tSV
tDF
READY
DOUT
BUSY
tWP
Note for Figures 8 and 9: After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status (DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction. .com
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IS93C46A
ISSI
Voltage Range 2.5V to 5.5V Order Part No. IS93C46A-3P IS93C46A-3G IS93C46A-3GR IS93C46A-3Z IS93C46A-3PL IS93C46A-3GL IS93C46A-3GRL IS93C46A-3ZL Package 300-mil Plastic DIP SOIC (rotated) JEDEC SOIC JEDEC 169-mil TSSOP 300-mil Plastic DIP, Lead-free SOIC (rotated) JEDEC, Lead-free SOIC JEDEC, Lead-free 169-mil TSSOP, Lead-free
(R)
ORDERING INFORMATION
Commercial: 0C to +70C Speed 1Mhz *
1Mhz *
2.5V to 5.5V
ORDERING INFORMATION
Industrial Range: -40C to +85C Speed 1Mhz * Voltage Range 2.5V to 5.5V Order Part No. IS93C46A-3PI IS93C46A-3GI IS93C46A-3GRI IS93C46A-3ZI IS93C46A-3PLI .com IS93C46A-3GLI IS93C46A-3GRLI IS93C46A-3ZLI Package 300-mil Plastic DIP SOIC (rotated) JEDEC SOIC JEDEC 169-mil TSSOP 300-mil Plastic DIP, Lead-free SOIC (rotated) JEDEC, Lead-free SOIC JEDEC, Lead-free 169-mil TSSOP, Lead-free
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1Mhz * 2.5V to 5.5V
ORDERING INFORMATION
Automotive Range: -40C to +125C Speed 1Mhz * Voltage Range 2.7V to 5.5V Order Part No. IS93C46A-3PA IS93C46A-3GRA Package 300-mil Plastic DIP SOIC JEDEC
* The specification allows higher speed. Please see the AC Characteristics for more information.
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