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 APT41M80B2 APT41M80L
800V, 43A, 0.21 Max
N-Channel MOSFET
Power MOS 8TM is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
T-MaxTM
TO-264
APT41M80B2
APT41M80L
D
Single die MOSFET
G S
FEATURES
* Fast switching with low EMI/RFI * Low RDS(on) * Ultra low Crss for improved noise immunity * Low gate charge * Avalanche energy rated * RoHS compliant
TYPICAL APPLICATIONS
* PFC and other boost converter * Buck converter * Two switch forward (asymmetrical bridge) * Single switch forward * Flyback * Inverters
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25C Continuous Drain Current @ TC = 100C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 43 27 150 30 1710 20
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RJC RCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) 0.22 Package Weight 6.2 10 Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw 1.1 MicrosemiWebsite-http://www.microsemi.com N*m -55 0.11 150 C 300 oz g in*lbf
04-2009 050-8106 Rev B
Min
Typ
Max 1040 0.12
Unit W C/W
Static Characteristics
Symbol
VBR(DSS) VBR(DSS)/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS
TJ = 25C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 250A VGS = 10V, ID = 20A VGS = VDS, ID = 2.5mA VDS = 800V VGS = 0V TJ = 25C TJ = 125C
APT41M80B2_L
Typ 0.87 0.17 4 -10 Max Unit V V/C V mV/C A nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 800
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
3
0.21 5 100 500 100
VGS = 30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25C unless otherwise specified
Test Conditions
VDS = 50V, ID = 20A VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 38 8070 140 805 380
Max
Unit S
pF
VGS = 0V, VDS = 0V to 533V
5
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 20A, VDS = 400V Resistive Switching VDD = 533V, ID = 20A RG = 2.2 6 , VGG = 15V
190 260 44 135 46 65 200 60
nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 43
Unit
G S
A 150 1.0 1000 14.7 10 V ns C V/ns
ISD = 20A, TJ = 25C, VGS = 0V ISD = 20A, VDD = 100V 3 diSD/dt = 100A/s, TJ = 25C ISD 20A, di/dt 1000A/s, VDD = 533V, TJ = 125C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25C, L = 8.55mH, RG = 2.2, IAS = 20A. 3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -2.17E-7/VDS^2 + 2.63E-8/VDS + 3.74E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein. Rev B 050-8106
04-2009
APT41M80B2_L
100
V
GS
50
= 10V T = 125C
J
90 80 ID, DRAIN CURRENT (A) 70
TJ = 25C TJ = -55C
V V
GS
= 10, & 15V
40 ID, DRIAN CURRENT (A)
GS
= 6, & 6.5V 5.5V
60 50 40 30 20 10 0
TJ = 125C TJ = 150C
30
20
5V
10
4.5V 4V
0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
0
0
5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
3.0
NORMALIZED TO VGS = 10V @ 20A
150
VDS> ID(ON) x RDS(ON) MAX. 250SEC. PULSE TEST @ <0.5 % DUTY CYCLE
2.5 ID, DRAIN CURRENT (A)
125
2.0
100
TJ = -55C
1.5
75
TJ = 25C
1.0
50
TJ = 125C
0.5 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C) Figure 3, RDS(ON) vs Junction Temperature 60
TJ = -55C TJ = 25C
25 0
0
1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics Ciss
20,000 10,000
50 gfs, TRANSCONDUCTANCE
40
TJ = 125C
C, CAPACITANCE (pF)
1,000
30
Coss 100 Crss
20
10 0 10
0
5
10 15 20 25 30 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current
35
200 400 600 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage
0
16 VGS, GATE-TO-SOURCE VOLTAGE (V) 14 12
ID = 20A
150 ISD, REVERSE DRAIN CURRENT (A)
125
VDS = 160V
10
VDS = 400V
100
TJ = 25C TJ = 150C
8 6
VDS = 640V
75
50
4 2 50 100 150 200 250 300 350 400 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0 0
25 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 0 Rev B 050-8106
04-2009
APT41M80B2_L
200 100
IDM
200 100
IDM
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
Rds(on)
10
10
13s 100s Rds(on) 1ms 10ms 100ms TJ = 125C TC = 75C DC line
13s 100s 1ms 10ms 100ms DC line
1
1
TJ = 150C TC = 25C
Scaling for Different Case & Junction Temperatures: ID = ID(T = 25C)*(TJ - TC)/125
0.1
1
10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area
0.1
C
10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area
1
0.14 0.12 D = 0.9 0.10 0.7 0.08 0.06 0.04 0.02 0 0.5
Note:
ZJC, THERMAL IMPEDANCE (C/W)
PDM
t1 t2
0.3 SINGLE PULSE 0.1 0.05 10-5 10-4
t1 = Pulse Duration Duty Factor D = 1/t2 Peak TJ = PDM x ZJC + TC
t
10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
1.0
T-MAX(R) (B2) Package Outline
4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 15.49 (.610) 16.26 (.640) 5.38 (.212) 6.20 (.244)
TO-264 (L) Package Outline
4.60 (.181) 5.21 (.205) 1.80 (.071) 2.01 (.079) 19.51 (.768) 20.50 (.807) 3.10 (.122) 3.48 (.137) 5.79 (.228) 6.20 (.244)
e3 100% Sn Plated
Drain
20.80 (.819) 21.46 (.845)
Drain
25.48 (1.003) 26.49 (1.043)
4.50 (.177) Max.
2.87 (.113) 3.12 (.123) 1.65 (.065) 2.13 (.084) 2.29 (.090) 2.69 (.106) 19.81 (.780) 21.39 (.842)
04-2009
2.29 (.090) 2.69 (.106)
0.40 (.016) 0.79 (.031)
19.81 (.780) 20.32 (.800) 1.01 (.040) 1.40 (.055)
Gate Drain Source
0.48 (.019) 0.84 (.033) 2.59 (.102) 3.00 (.118)
Gate Drain Source
Rev B
2.21 (.087) 2.59 (.102)
5.45 (.215) BSC 2-Plcs.
0.76 (.030) 1.30 (.051) 2.79 (.110) 3.18 (.125) 5.45 (.215) BSC 2-Plcs.
050-8106
These dimensions are equal to the TO-247 without the mounting hole. Dimensions in Millimeters and (Inches)
Dimensions in Millimeters and (Inches)
Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.


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