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| 2- 26.5 GHz GaAs MMIC Traveling Wave Amplifier Technical Data HMMC-5021 (2-22 GHz) HMMC-5022 (2-22 GHZ) HMMC-5026 (2-26.5 GHz) Features * Wide-Frequency Range: 2 - 26.5 GHz * High Gain: 9.5 dB * Gain Flatness: 0.75 dB * Return Loss: Input: -14 dB Output: -13 dB * Low-Frequency Operation Capability: < 2 GHz * Gain Control: 35 dB Dynamic Range * Moderate Power: 20 GHz: P-1dB: 18 dBm Psat: 20 dBm 26.5 GHz: P-1dB: 15 dBm Psat: 17 dBm Chip Size: Chip Size Tolerance: Chip Thickness: Pad Dimensions: 2980 x 770 m (117.3 x 30.3 mils) 10 m (0.4 mils) 127 15 m (5.0 0.6 mils) 75 x 75 m (2.95 x 2.95 mils), or larger Absolute Maximum Ratings Symbol VDD IDD VG1 IG1 VG2[2] IG2 PDC Pin Tch Tcase TSTG Tmax Parameters/Conditions Positive Drain Voltage Total Drain Current First Gate Voltage First Gate Current Second Gate Voltage Second Gate Current DC Power Dissipation CW Input Power Operating Channel Temp. Operating Case Temp. Storage Temperature Maximum Assembly Temp. (for 60 seconds maximum) Units V mA V mA V mA watts dBm C C C C -55 -65 +165 +300 -5 -9 -2.5 -7 2.0 23 +150 Min. Max.[1] 8.0 250 0 +5 +3.5 Description The HMMC-5021/22/26 is a broadband GaAs MMIC Traveling Wave Amplifier designed for high gain and moderate output power over the full 2 to 26.5 GHz frequency range. Seven MESFET cascode stages provide a flat gain response, making the HMMC-5021/22/26 an ideal wideband gain block. Optical lithography is used to produce gate lengths of 0.4 m. The HMMC-5021/22/26 incorporates advanced MBE technology, Ti-Pt-Au gate metallization, silicon nitride passivation, and polyimide for scratch protection. Notes: 1. Operation in excess of any one of these conditions may result in permanent damage to this device. TA = 25C except for Tch, TSTG, and Tmax. 2. Minimum voltage on VG2 must not violate the following: VG2 (min) > VDD - 9 volts. 2 HMMC-5021/22/26 DC Specifications/Physical Properties,[1] applies to all part numbers Symbol IDSS Vp VG2 IDSOFF (VG1) IDSOFF (VG2) ch-bs Parameters and Test Conditions Saturated Drain Current (VDD = 7.0 V, VG1 = 0 V, VG2 = open circuit) First Gate Pinch-off Voltage (VDD = 7.0 V, IDD = 16 mA, VG2 = open circuit) Second Gate Self-Bias Voltage (VDD = 7.0 V, VG1 = 0 V) First Gate Pinch-off Current (VDD = 7.0 V, VG1 = -3.5 V, VG2 = open circuit) Second Gate Pinch-Off Current (VDD = 5.0 V, VG1 = 0 V, VG2 = -3.5 V) Thermal Resistance (Tbackside = 25C) Units mA V V mA mA C/W Min. 115 -3.5 Typ. 180 -1.5 2.1 4 8 36 Max. 250 -0.5 Note: 1. Measured in wafer form with Tchuck = 25C. (Except ch-bs.) HMMC-5021/22/26 RF Specifications, VDD = 7.0 V, IDD(Q) = 150 mA, Zin = Zo = 50 [1] Symbol BW S21 S21 RLin(min) RLout(min) Isolation P-1dB Psat H2(max) Parameters/Conditions Guaranteed Bandwidth Small Signal Gain Small Signal Gain Flatness Minimum Input Return Loss Minimum Output Return Loss Minimum Reverse Isolation Output Power at 1 dB Gain Comp. Saturated Output Power Max. Second Harm. (2 GHz dB dB dB dB dB dBm dBm dBc 2-22 10 0.5 16 13 32 18 20 -25 2 8.0 10 10 20 15 17 10 0.5 16 13 32 18 20 -25 22 12 1.0 2 7.5 10 10 20 12 14 9.5 0.75 14 13 30 15 17 -25 26.5 12 1.0 -20 -20 H3(max) NF dBc dB -34 8 -34 8 -20 -34 10 -20 Notes: 1. Small-signal data measured in wafer form with Tchuck = 25C. Large-signal data measured on individual devices mounted in an HP83040 Series Modular Microcircuit Package @ TA = 25C. 2. Performance may be extended to lower frequencies through the use of appropriate off-chip circuitry. Upper -3 dB corner frequency 29.5 GHz. 3 Applications The HMMC-5021/22/26 series of traveling wave amplifiers are designed for use as general purpose wideband gain blocks in communication systems and microwave instrumentation. They are ideally suited for broadband applications requiring a flat gain response and excellent port matches over a 2 to 26.5 GHz frequency range. Dynamic gain control and low-frequency extension capabilities are designed into these devices. cally biased between -0.2V and -0.5V. No other bias supplies or connections to the device are required for 2 to 26.5 GHz operation. See Figure 3 for assembly information. The auxiliary gate and drain contacts are used only for lowfrequency performance extension below 1.0 GHz. When used, these contacts must be AC coupled only. (Do not attempt to apply bias to these pads.) The second gate (VG2) can be used to obtain 35 dB (typical) dynamic gain control. For normal operation, no external bias is required on this contact and its self-bias voltage is +2.1 V. Applying an external bias between its open-circuit voltage and -2.5 volts will adjust the gain while maintaining a good input/output port match. Assembly Techniques Solder die-attach using a fluxless AuSu solder preform is the recommended assembly method. Gold thermosonic wedge bonding with 0.7 mil diameter Au wire is recommended for all bonds. Tool force should be 22 1 gram, stage temperature should be 150 2C, and ultrasonic power and duration should be 64 1 dB and 76 8 msec, respectively. The bonding pad and chip backside metallization is gold. For more detailed information see Agilent application note #999, "GaAs MMIC Assembly and Handling Guidelines." GaAs MMICs are ESD sensitive. Proper precautions should be used when handling these devices. Biasing and Operation These amplifiers are biased with a single positive drain supply (VDD) and a single negative gate supply (VG1). The recommended bias conditions for the HMMC-5021/22/26 are VDD = 7.0V, IDD = 150 mA for best overall performance. To achieve this drain current level, VG1 is typiDrain Bias (VDD) Seven Identical Stages Aux. Drain RF Output 124 RF Input 124 Second Gate Bias (VG2) Temp Diode Sense Single Stage Shown Figure 1. HMMC-5021/22/26 Schematic. Temp Diode Force First Gate Bias (VG1) Aux. Gate Note: FET gate periphery in microns. 4 VDD Aux. Drain RF Output RF Input VG2 Chip ID No. Temp. Diode Sense Temp. Diode Force VG1 Aux. Gate 80 (VDD and Aux Drain Pads) 85 225 (RF Output Pad) 75 770 (10 m) 560 225 80 75 270 1695 2980 ( 10 m) 200 200 (VG2 Pad) 80 490 695 300 (RF Input Pad) Figure 2. HMMC-5021/22/26 Bonding Pad Locations. Notes: All dimensions in microns. Rectangular Pad Dim: 75 x 75 m. Octagonal Pad Dim: 90 m dia. All other dimensions 5 m (unless otherwise noted). Chip thickness: 127 15 m. 1.5 mil dia.Gold Wire Bond to 15 nF DC Feedthru 68 pF Capacitor Input and Output Thin Film Circuit with 8 pF DC Blocking Capacitor Gold Plated Shim 4 nH Inductor (0.7 mil Gold Wire Bond with length 150 mils) Trace Offset 168 m (6.6 mils) VDD IN 2.0 mil nom. gap OUT VG1 2.0 mil nom. gap Bonding Island 0.7 mil dia. Gold Bond Wire (Length NOT important) Trace Offset 168 m (6.6 mils) Note: Total offset between RF input and RF output pad is 335 m (13.2 mils). 1.5 mil dia.Gold Wire Bond to 15 nF DC Feedthru Figure 3. HMMC-5021/22/26 Assembly Diagram. 5 HMMC-5021/22/26 Typical Performance 12 11 SMALL-SIGNAL GAIN (dB) VDD = 7.0 V, IDD = 150 mA S21 10 REVERSE ISOLATION (dB) INPUT RETURN LOSS (dB) 10 15 20 VDD = 7.0 V, IDD = 150 mA S22 10 15 20 OUTPUT RETURN LOSS (dB) 10 9 8 7 6 5 4 3 2 2 6 10 14 18 22 26 FREQUENCY (GHz) S12 20 30 S11 25 30 35 40 2 6 10 14 18 22 26 FREQUENCY (GHz) 25 30 35 40 30 40 50 60 30 Figure 4. Typical Gain and Reverse Isolation vs. Frequency. Figure 5. Typical Input and Output Return Loss vs. Frequency. Typical Scattering Parameters[1], (Tchuck = 25C, VDD = 7.0 V, IDD = 150 mA, Zin = Zout = 50 Freq. GHz 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 16.0 17.0 18.0 19.0 20.0 21.0 22.0 23.0 24.0 25.0 26.0 26.5 27.0 28.0 29.0 30.0 dB -22.6 -30.6 -37.8 -29.4 -26.6 -26.6 -27.7 -29.0 -29.0 -27.3 -26.2 -25.8 -26.4 -24.6 -21.6 -19.4 -18.3 -18.7 -20.3 -21.8 -19.9 -17.3 -16.3 -17.1 -17.0 -15.7 -14.3 -13.2 -14.1 -11.5 S11 Mag 0.074 0.030 0.013 0.034 0.047 0.047 0.041 0.035 0.036 0.043 0.049 0.052 0.048 0.059 0.083 0.107 0.121 0.116 0.097 0.082 0.101 0.137 0.153 0.139 0.141 0.163 0.192 0.220 0.197 0.266 Ang -174.1 130.4 -19.8 -79.9 -113.8 -137.0 -152.6 -149.8 -140.8 -138.1 -141.9 -148.5 -143.0 -131.7 -133.7 -143.5 -158.7 -172.6 -179.5 -168.3 -155.3 -158.8 -169.9 -175.4 -165.0 -161.1 -162.7 -175.7 -176.9 -171.6 dB -53.1 -51.0 -48.0 -46.8 -44.4 -44.1 -43.4 -44.3 -43.0 -41.6 -40.0 -38.9 -38.1 -36.6 -35.3 -35.0 -34.7 -33.9 -33.3 -32.7 -31.7 -31.4 -30.7 -30.0 -29.2 -29.0 -28.9 -28.8 -28.6 -30.8 S21 Mag 0.0022 0.0028 0.0040 0.0046 0.0060 0.0062 0.0067 0.0061 0.0071 0.0083 0.0100 0.0113 0.0125 0.0148 0.0172 0.0177 0.0184 0.0201 0.0217 0.0233 0.0259 0.0268 0.0291 0.0317 0.0345 0.0356 0.0357 0.0362 0.0371 0.0287 Ang 167.3 120.1 95.0 67.1 36.0 1.0 -27.5 -31.8 -53.6 -74.8 -96.9 -120.9 -145.6 -169.9 160.9 130.6 105.0 80.2 50.7 22.5 -8.4 -39.5 -71.5 -106.2 -145.5 -166.7 171.7 126.3 73.0 4.8 dB 10.1 10.0 10.2 10.3 10.4 10.4 10.5 10.4 10.3 10.2 10.2 10.2 10.1 10.1 10.0 10.0 9.9 9.9 10.0 10.0 9.9 9.8 9.7 9.7 9.6 9.5 9.2 8.5 7.7 4.6 S12 Mag 3.183 3.173 3.225 3.275 3.303 3.330 3.331 3.312 3.282 3.253 3.227 3.218 3.204 3.197 3.177 3.149 3.138 3.140 3.151 3.150 3.126 3.076 3.045 3.045 3.027 2.970 2.876 2.648 2.433 1.689 Ang 123.6 102.1 78.2 53.5 28.1 2.3 -23.8 -50.2 -76.4 -102.5 -128.8 -155.4 177.8 150.4 122.5 94.4 65.9 36.8 6.6 -24.9 -57.5 -91.0 -125.5 -162.2 157.2 135.4 112.9 65.8 10.3 -61.1 dB -28.9 -21.6 -18.2 -16.3 -15.4 -15.7 -17.0 -19.2 -24.3 -35.1 -24.6 -19.7 -17.6 -17.0 -17.1 -18.5 -21.8 -28.9 -28.5 -21.7 -18.6 -17.3 -17.3 -18.5 -19.4 -17.6 -15.3 -12.6 -15.4 -8.7 S22 Mag 0.036 0.083 0.124 0.153 0.170 0.165 0.141 0.110 0.061 0.018 0.059 0.103 0.132 0.141 0.140 0.119 0.081 0.036 0.038 0.082 0.117 0.137 0.137 0.118 0.107 0.132 0.173 0.233 0.170 0.369 Ang 77.3 64.1 45.4 23.4 2.5 -19.5 -40.7 -59.7 -76.8 -32.6 21.0 2.8 -21.2 -44.8 -67.4 -91.8 -116.0 -121.7 -57.0 -59.1 -81.5 -103.3 -123.8 -135.3 -122.5 -114.2 -116.0 -138.1 -144.7 -123.6 Note: 1. Data obtained from on-wafer measurements. HMMC-5021/22/26 Typical Temperature Performance 15 SMALL-SIGNAL GAIN, S21 (dB) VDD = 7.0 V, IDD (@ TA = 25C) = 150 mA SMALL-SIGNAL GAIN, S21 (dB) 14 13 .015 dB/C 12 11 10 9 8 7 6 .022 dB/C .03 dB/C TCASE: -55C -25C 0 C +25C +55C +85C +115C 20 10 0 -10 -20 -30 -40 VDD = 7.0 V, VGI -0.3 V VG2 = +2.1 V, IDD = 150 mA VG2 = +0.5 V, IDD = 140 mA VG2 = 0.0 V, IDD = 128 mA VG2 = -0.5 V, IDD = 104 mA VG2 = -1.0 V, IDD = 70 mA VG2 = -1.5 V, IDD = 36 mA VG2 = -3.0 V/-2.5 V, IDD = 11 mA VG2 = -2.0 V, IDD = 14 mA 5 2 4 6 8 10 12 14 16 18 20 22 24 26.5 FREQUENCY (GHz) -50 2 4 6 8 10 12 14 16 18 20 22 24 26.5 FREQUENCY (GHz) Figure 6. Typical Small-Signal Gain vs. Temperature. VDD = 7.0 V, IDD(Q) = 150 mA Figure 7. Typical Gain vs. Second Gate Control Voltage. ASSOCIATED GAIN (dB) 24 22 OUTPUT POWER (dBm) -10 -15 VDD = 7.0 V, IDD(Q) = 150 mA 12 10 P(sat) HARMONICS (dBc) -20 -25 -30 2nd Harmonics 12 NOISE FIGURE (dB) 8 6 4 20 18 16 14 12 P(-1 dB) -35 -40 -45 -50 -55 -60 2 4 6 8 10 12 14 16 18 20 22 24 26.5 FUNDAMENTAL FREQUENCY, o (GHz) 3rd Harmonics 10 8 6 4 2 0 24 6 8 10 12 14 16 18 20 22 24 26.5 FREQUENCY (GHz) 10 2 4 6 8 10 12 14 16 18 20 22 24 26.5 FREQUENCY (GHz) Figure 8. Typical 1 dB Gain Compression and Saturated Output Power. Figure 9. Typical Second and Third Harmonics vs. Fundamental Frequency at POUT = +17 dBm. Figure 10. Typical Noise Figure Performance. Standard Bias: VDD = 7.0 V, IDD = 150 mA Optimal NF Bias: VDD = 6.0 V, IDD = 66 mA Note: 1. All data measured on individual devices mounted in an HP83040 Series Modular Microcircuit Package @ TA = 25C (except where noted). This data sheet contains a variety of typical and guaranteed performance data. The information supplied should not be interpreted as a complete list of circuit specifications. In this data sheet the term typical refers to the 50th percentile performance. For additional information contact your local Agilent sales representative. www.semiconductor.agilent.com Data subject to change. Copyright (c) 1999 Agilent Technologies Obsoletes 5952-1838, 5091-0681E 5965-5449E (11/99) |
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