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| White Electronic Designs 32MB- 4Mx64 SDRAM, UNBUFFERED FEATURES n n n n n n n n Burst Mode Operation Auto and Self Refresh capability LVTTL compatible inputs and outputs Serial Presence Detect with EEPROM Fully synchronous: All signals are registered on the positive edge of the system clock Programmable Burst Lengths: 1, 2, 4, 8 or Full Page 3.3 volt 0.3v Power Supply 144 Pin SO-DIMM JEDEC WED3DG644V-D1 DESCRIPTION The WED3DG644V is a 4Mx64 synchronous DRAM module which consists of four 4Mx16 SDRAM components in TSOP- 11 package, and one 2K EEPROM in an 8- pin TSSOP package for Serial Presence Detect which are mounted on a 144 Pin SO-DIMM multilayer FR4 Substrate. * This product is subject to change without notice. Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 Front VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS DQM0 DQM1 VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 DQ13 PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE) Pin 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 Back VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 VSS DQM4 DQM5 VCC A3 A4 A5 VSS DQ40 DQ41 DQ42 DQ43 VCC DQ44 DQ45 Pin 51 53 55 57 59 Front DQ14 DQ15 VSS NC NC Pin 52 54 56 58 60 Back DQ46 DQ47 VSSv NC NC Pin 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 Back DQ21 DQ22 DQ23 VCC A6 A8 VSS A9 A10/AP VCC DQM2 DQM3 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS **SDA VCC VOLTAGE KEY 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 CLK0 VCC RAS# WE# CS0# *CS1# DNU VSS NC NC VCC DQ16 DQ17 DQ18 DQ19 VSS DQ20 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 CKE0 VCC CAS# *CKE1 *A12 *A13 *CLK1 VSS NC NC VCC DQ48 DQ49 DQ50 DQ51 VSS DQ52 Pin 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 Back DQ53 DQ54 DQ55 VCC A7 BA0 VSS BA1 A11 VCC DQM6 DQM7 VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 VSS **SCL VCC A0 - A11 BA0-1 DQ0-63 CLK0 CKE0 CS0# RAS# CAS# WE# DQM0-7 VDD VSS *VREF SDA SCL DNU NC PIN NAMES Address input (Multiplexed) Select Bank Data Input/Output Clock input Clock Enable input Chip select Input Row Address Strobe Column Address Strobe Write Enable DQM Power Supply (3.3V) Ground Power supply for reference Serial data I/O Serial clock Do not use No Connect * These pins are not used in this module. ** These pins should be NC in the system which does not support SPD. Sept. 2002 Rev. 0 1 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com White Electronic Designs FUNCTIONAL BLOCK DIAGRAM WED3DG644V-D1 Sept. 2002 Rev. 0 2 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com White Electronic Designs ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to VSS Voltage on VDD supply relative to VSS Storage Temperature Power Dissipation Short Circuit Current Symbol VIN, VOUT VDD, VDDQ TSTG PD IOS WED3DG644V-D1 Value -1.0 ~ 4.6 -1.0 ~ 4.6 -55 ~ +150 4 50 Units V V C W mA Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. RECOMMENDED DC OPERATING CONDITIONS (Voltage Referenced to: VSS = 0V, TA = 0C to +70C) Parameter Supply Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Symbol VCC VIH VIL VOH VOL ILI Min 3.0 2.0 -0.3 2.4 -- -10 Typ 3.3 3.0 -- -- -- -- Max 3.6 VDDQ+0.3 0.8 -- 0.4 10 Unit V V V V V A Note 1 2 IOH= -2mA IOL= -2mA 3 Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is 3ns. 2. VIL (min)= -2.0V AC. The undershoot voltage duration is 3ns. 3. Any input 0V VIN VDDQ Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. CAPACITANCE (TA = 23C, f = 1MHz, VDD = 3.3V, VREF=1.4V 6200mV) Parameter Input Capacitance (A0-A12) Input Capacitance (RAS#,CAS#,WE#) Input Capacitance (CKE0) Input Capacitance (CLK0) Input Capacitance (CS0#) Input Capacitance (DQM0-DQM7) Input Capacitance (BA0-BA1) Data input/output capacitance (DQ0-DQ63) Symbol CIN1 CIN2 CIN3 CIN4 CIN5 CIN6 CIN7 COUT Min Max 25 25 25 21 25 12 25 12 Unit pF pF pF pF pF pF pF pF Sept. 2002 Rev. 0 3 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com White Electronic Designs OPERATING CURRENT CHARACTERISTICS (VCC = 3.3V, TA = 0C +70C) Parameter Operating Current (One bank active) Precharge Standby Current in Power Down Mode Precharge Standby Current in Non-Power Down Mode Active standby current in power-down mode Active standby current in non power-down mode Operating current (Burst mode) Refresh current Self refresh current Symbol ICC1 ICC2P ICC2PS Icc2N Icc2NS ICC3P ICC3PS ICC3N ICC3NS ICC4 ICC5 ICC6 Conditions Burst Length = 1 tRC tRC(min) IOL = 0mA CKE VIL(max), tCC = 10ns CKE & CLK VIL(max), tCC = CKE VIH(min), CS VIH(min), tcc = 10ns Input signals are charged one time during 20 CKE VIH(min), CLK VIL(max), tcc = Input signals are stable CKE VIL(max), tCC = 10ns CKE & CLK VIL(max), tcc = CKE VIH(min), CS VIH(min), tcc = 10ns Input signals are changed one time during 20ns CKE VIH(min), CLK VIL(max), tcc = input signals are stable Io = mA Page burst 4 Banks activated tCCD = 2CLK tRC tRC(min) CKE 0.2V WED3DG644V-D1 Version 133 100 460 400 5 5 60 30 15 15 110 80 560hh 560 440 500 Units mA1 mA Note mA mA mA mA mA mA mA 1 2 10 Notes: 1. Measured with outputs open. 2. Refresh period is 64ms. 3. Unless otherwise noticed, input swing level is CMOS (VIH/VIL = VDDQ/VssQ) Sept. 2002 Rev. 0 4 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com White Electronic Designs WED3DG644V-D1 Ordering Information WED3DG644V10D1 WED3DG644V7D1 WED3DG644V75D1 Speed 100MHz 133MHz 133MHz CAS Latency CL=2 CL=2 CL=3 PACKAGE DIMENSIONS 2.667 MAX .079 MIN. .157 WEDC .787 1.100 MAX .157 MIN .913 1.112 1.291 .181 .059 .126 MIN .039 .004 ALL DIMENSIONS ARE IN INCHES Sept. 2002 Rev. 0 5 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com White Electronic Designs REV. A 0 DATE REQUESTED BY DETAILS CREATED WED3DG644V-D1 11-15-01 PAUL MARIEN 9-6-02 PAUL MARIEN CHANGE FROM ADVANCED TO FINAL Sept. 2002 Rev. 0 6 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com |
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