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| Agilent HMMC-5034 37-43 GHz Amplifier Data Sheet TC926 Features *23 dBm Output P(-1dB) *8 dB Gain @ 40 GHz *Integrated Output Power Detector Network *50 Input/Output Matching *Bias: 4.5 Volts, 300 mA Chip Size: Chip Size Tolerance: Chip Thickness: Pad Dimensions: 1.56 x 1.02 mm (61.4 x 40.1 mils) 10 m ( 0.4 mils) 127 15 m (5.0 0.6 mils) 80 x 80 m (3.2 x 3.2 mils) Description The HMMC-5034 is a MMIC power amplifier designed for use in wireless transmitters that operate within the 37 GHz to 42.5 GHz range. At 40 GHz it provides 23 dBm of output power [P(-1dB)] and 8 dB of smallsignal gain from a small easy-touse device. The HMMC-5034 was designed to be driven by the HMMC-5040 MMIC amplifier for linear transmit applications. This device has input and output matching circuitry for use in 50 ohm environments. Absolute Maximum Ratings[1] Symbol VD1,2 VG1,2 ID1 ID2 Pin Tch Tbs Tst Tmax Notes: 1. Absolute maximum ratings for continuous operation unless otherwise noted. 2. Refer to DC Specifications / Physical Properties table for derating information. Parameters/Conditions Drain Supply Voltages Gate Supply Voltages Input-Stage Drain Current Output-Stage Drain Current RF Input Power Channel Temperature[2] Backside Temperature Storage Temperature Max. Assembly Temperature Min. -3.0 Max. 5 0.5 165 285 23 175 Units Volts Volts mA mA dBm C C C C -55 -65 +95 +170 300 1 DC Specifications/Physical Properties[1] Symbol VD1,2 ID1 ID2 VG1,2 VP Vdet g Parameters/Conditions Drain Supply Operating Voltages Suggested First Stage Operating Drain Supply Current (VD1 = 4.5V) Suggested Second Stage Operating Drain Supply Current (VD2 = 4.5V) Gate Supply Operating Voltages (ID1 100 mA, ID2 200 mA) Pinch-off Voltage (VD1 =VD2 = 4.5 V, ID1 + D2 10 mA) Reference and Output Detector DC Voltage (VD2 = 4.5 V, No RF Output) Detector Voltage Sensitivity (VDD = 4.5 V, Pout = 20 dBm) Thermal (Channel-to-Backside at Tch = 150C) Channel Temperature[3] (Tbs 90C, MTTF > 106 hrs, VD1 = VD2 = 4.5 V, ID1 = 100 mA, ID2 = 200 mA) Resistance[2] -2.5 Min. 2 Typ. 4.5 100 200 -0.8 -1.2 1.4 0.12 44 Max. 5 165 285 Units Volts mA mA Volts Volts Volts mV/mW C/Watt ch-bs Tch Notes: 150 C 1. Backside operating temperature Tbs = 25C unless otherwise noted. 2. Thermal resistance (C/Watt) at a channel temperature T(C) can be estimated using the equation: (T) ch-bs x [T(C)+273] / [150C+273]. 3. Derate MTTF by a factor of two for every 8C above T ch. RF Specifications Symbol BW Gain Gain/T P(-1dB) PSAT P/T (RLin)MIN (RLout)MIN Isolation Notes: (TA = 25C, Z0 = 50, VD1 = VD2 = 4.5 V, ID1 = 100 mA, ID2 = 200 mA) Parameters/Conditions Operating Bandwidth Small Signal Gain Temperature Coefficient of Gain Output Power at 1dB Gain Compression[1] Saturated Output Power[1] Temperature Coefficient of P(-1dB) and Psat Minimum Input Return Loss Minimum Output Return Loss Minimum Reverse Isolation 9 10 21 22 37-40 GHz Min. 37 7 8 0.019 23 24 0.015 10 12 30 8 9 20 21 Typ. Max. 40 11 Min. 40 6 7 0.019 22 23 0.015 10 12 27 40-2.5 GHz Typ. Max. 42.5 11 Units GHz dB dB/C dBm dBm dB/C dB dB dB 1. Devices operating continuously at or beyond 1 dB gain compression may experience power degradation. 2 Applications The HMMC-5034 MMIC is a broadband power amplifier designed for use in communications transmitters that operate in various frequency bands within 37 GHz and 42.5 GHz. It can be attached to the output of the HMMC-5040 increasing the power handling capability of transmitters requiring linear operation. Biasing and Operation The recommended DC bias condition is with both drains (VD1 and VD2) connected to single 4.5 volt supply (VDD) and both gates (VG1 and VG2) connected to an adjustable negative voltage supply (VGG) as shown in Figures 12 or 13. The gate voltage is adjusted for a total drain supply current of commonly 300 mA or less. The RF input and output ports are AC-coupled. An output power detector network is also supplied. The Det.Out port provides a DC voltage that is generated by the RF power at the RF-Output port. The Det.Ref pad provides a DC reference voltage that can be (Optional) used to nullify the effects of temperature variations on the detected RF voltage. The differential voltage between the Det.Ref and Det.Out bonding pads can be correlated to the RF power emerging from the RFOutput port. A bond wire attaching both VD2 bond pads to the supply will assure symmetric operation and minimize any DC offset voltage between Det.Ref and Det.Out (at no RF output power). No ground wires are needed because ground connections are made with plated through-holes to the backside of the device. crowave/millimeter-wave connections should be kept as short as possible to minimize inductance. For assemblies requiring long bond wires, multiple wires can be attached to the RF bonding pads. Thermosonic wedge is the preferred method for wire bonding to the gold bond pads. A guidedwedge at an ultrasonic power level of 64 dB can be used for the 0.7 mil wire. The recommended wire bond stage temperature is 150 2C. GaAs MMICs are ESD sensitive. ESD preventive measures must be employed in all aspects of storage, handling, and assembly. MMIC ESD precautions, handling considerations, die attach and bonding methods are critical factors in successful GaAs MMIC performance and reliability. Agilent application note #54, "GaAs MMIC ESD, Die Attach and Bonding Guidelines" provides basic information on these subjects. Assembly Techniques Electrically and thermally conductive epoxy die attach is the preferred assembly method. Solder die attach using a fluxless gold-tin (AuSn) solder preform can also be used. The device should be attached to an electrically conductive surface to complete the DC and RF ground paths. The backside metallization on the device is gold. It is recommended that the electrical connections to the bonding pads be made using 0.7-1.0 mil diameter gold wire. The mi- VG1 VD1 VG2 (Optional) VD2 Det.Ref D2 R1 RF Input Stage 1 Stage 2 D1 R1 C RF Output VG1 (Optional) VD1 VG2 (Optional) VD2 Det.Out Figure 1. Simplified Schematic Diagram 3 8 Small-Signal Gain (dB) 6 4 2 0 -2 -4 -6 -8 -10 30 Gain Reverse Isolation (dB) Spec Range 10 20 30 Isolation 40 50 Input and Output Return Loss (dB) 10 VDD = 4.5V, IDD = 300mA 0 0 VDD = 4.5V, IDD = 300mA 5 37-42.5 GHz Input 37-42.5 GHz Output Spec Range 10 15 35 40 Frequency (GHz) 45 50 20 30 35 40 Frequency (GHz) 45 50 Figure 2. Typical Gain and Isolation vs. Frequency* VDD = 4.5V 37 GHz 40 GHz Figure 3. Typical Input and Output Return Loss vs. Frequency* VDD = 4.5V, f = 38 GHz 40 20 0 -20 -40 IM3 2 4 6 8 Pin (dBm) 10 150 mA 300 mA 12 10 Gain (dB) 8 6 4 2 TOI Pout Single-tone 42.5 GHz 43.5 GHz 0 150 Power (dBm) 200 Figure 4. Gain vs. Total Drain Current as a Function of Frequency* 250 IDD (mA) 300 350 12 14 Figure 5. Intermodulation Distortion for 150 mA and 300 mA Total Drain Current (10 MHz Spacing) VDD = 4.5V 26 26 24 P-1dB (dBm) 22 20 18 VDD = 4.5V 37 GHz 40 GHz 24 Psat (dBm) 22 20 18 16 150 37 GHz 40 GHz 42.5 GHz 43.5 GHz 42.5 GHz 43.5 GHz 16 150 200 Figure 6. P-1dB vs. Total Drain Current as a Function of Frequency* *Wafe--probed 4 250 IDD (mA) 300 350 200 Figure 7. Psat vs. Total Drain Current as a Function of Frequency* 250 IDD (mA) 300 350 measurements. VDD = 4.5V, IDD = 300 mA 26 24 P-1dB (dBm) 22 20 18 16 37 10C 26 24 VDD = 4.5V, IDD = 300 mA 10C 90C 90C 50C Psat (dBm) 22 20 18 16 37 50C 38 39 Figure 8. P-1dB vs. Frequency as a Function of Temperature* VDD = 4.5V, IDD = 300 mA 10C 40 41 42 Frequency (GHz) 43 44 38 39 Figure 9. Psat vs. Frequency as a Function of Temperature* 40 41 Frequency (GHz) 42 43 44 12 10 8 Gain (dB) 6 4 2 90C 50C 0 37 38 39 Figure 10. Gain vs. Frequency as a Function of Temperature* 40 41 42 Frequency (GHz) 43 44 VD1 Opt.VG1 VD2 Opt.VG2 370 970 1560 1020 TC926 950 RF Input 510 RF Output 70 0,0 70 VG1 Opt.VD1 670 VG2 Opt.VD2 1490 Figure 11. Bonding Pad Positions (Dimensions are in micrometers) *Wafer-probed measurements. 5 (with low f bypassing) To VDD Supply >= 100 pF Chip Capacitor VD1 RF Input VG1 >= 100 pF Chip Capacitor VG2 VD2 TC926 RF Output (with low f bypassing) To VGG Supply Figure 12. Common Assembly Diagram (Shown with/out optional output detector connections) (with low f bypassing) To VDD Supply >= 100 pF Chip Capacitor VD1 RF Input VG1 >= 100 pF Chip Capacitor VG2 VD2 VD2 TC926 (Independent of RF Power Level) Optional Det.Ref RF Output Det.Out >= 100 pF Chip Capacitor (with low f bypassing) To VGG Supply Figure 13. Common Assembly Diagram with Detector (Shown with output detector connections and optional VD2 "balancing" connection) 6 This data sheet contains a variety of typical and guaranteed performance data. The information supplied should not be interpreted as a complete list of circuit specifications. In this data sheet the term typical refers to the 50th percentile performance. For additional information contact your local Agilent Technologies' sales representative. www.agilent.com/semiconductors For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (408) 654-8675 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6271 2451 India, Australia, New Zealand: (+65) 6271 2394 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6271 2194 Malaysia, Singapore: (+65) 6271 2054 Taiwan: (+65) 6271 2654 Data subject to change. Copyright (c)2002 Agilent Technologies, Inc. August 30, 2002 5988-3203EN 8 |
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