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| AN1465 APPLICATION NOTE A LNA OPTIMIZED FOR HIGH IP3out AT 1.9GHz USING THE NPN Si START540 TRANSISTOR F. Caramagno - N. Micalizzi - G. Privitera Data at 1.9GHz (3V, 5mA) Gain = 15dB, IP3out = 24dBm, NF = 1.25dB, RL in > 7dB, RL out >20dB 1. INTRODUCTION. START540 is a product of the START Family (ST Advanced Radio frequency Transistor). It is a high performance silicon bipolar transistor housed in the ultra miniature 4-lead SOT-343 (SC-70) surface mount plastic package. The amplifier is designed for use with 30mils thickness FR-4 printed circuit board material. The amplifier application circuit has been optimized to achieve high IP3out and a good compromise among Noise Figure, Gain and return loss at 1.9GHz, with Vce=2V and Ic=5mA. The amplifier has 1.25dB of Noise Figure, 15dB of Gain, an Input Return Loss>7dB, an output Return Loss>20dB, -0.5dBm P1dBout and an IP3 of +24dBm (1.9GHz, 3V, 5mA). 2. LNA DESIGN. Figure 1: Schematic Design V1 D 2 1 C1 1 F D R1 160 Tp1 R4 0 C C C5 100pF R3 15 C6 47nF R2 39 B C3 100pF L2 5.6nH C4 47nF L3 3.3nH C7 22pF TR1 J2 RF_out B J1 RF_in C2 Start 540 10pF Title Start - Applicazione con alimentazione unica A Size A4 Date: File: 1 2 Number Revision A 10-May-2002 Sheet of C:\PROGETTI\START\START 540\new board start 540\new board Start 540.ddb Drawn By: 3 4 May 2002 1/10 AN1465 - APPLICATION NOTE A single pin (Vcc=3V) for voltage supply is used. A 1F bypass capacitor to filter the supply at the common Vcc node is also used. The transistor's base is connected to the power supply through a choke inductor (L2) and the transistor's collector is connected to the power supply through a choke inductor (L3). The collector's voltage is 2V. The input matching is realized with a 50ohm series transmission line.The L2 inductor is used to reduce the Noise Figure value The output matching is realized with a 50ohm series transmission line and inductor (L3). Resistor (R3) is used to improve RF circuit stability.Low frequency decoupling capacitors C4 (47nF) for the base and C6 (47nF) for the collector improve the IP3 considerably. It's possible, removing R4, to supply separately the collector and the base using a different voltage supply. In this way, it's possible to set a different value of current in the collector (Icc). 3. DEMOBOARD Specification. Figure 2 is the PC board cross section. The board material is standard FR4. Note that spacing from the top layer RF traces to the internal ground plane is 0.010 inch (0.254 mm). The width of 50ohm microstrip is 0.45 mm. Figure 2: Cross-section of pcb board Figure 3: Image of the START540 DEMOBOARD (Size 22x30 mm) 2/10 AN1465 - APPLICATION NOTE Figure 4: DEMOBOARD Layout View Of Components Position Top Layer Mid Layer Bottom Layer 3/10 AN1465 - APPLICATION NOTE Table 1: Bill of Materials Com ponent C1 C2 C3 C4 C5 C6 C7 L2 L3 R1 R2 R3 R4 TR1 J1 J2 J3 S ub stra te V a lu e 1 F 10 p F 1 00 p F 47 n F 1 00 p F 47 n F 22 p F 5 .6 n H 3 .3 n H 1 6 0 oh m 1 6 0 oh m 1 5 o hm 0 o hm FR4 S ize C a se _A 603 603 603 603 603 603 603 603 603 603 603 603 S O T -3 4 3 M a n u fa c tu re r V a rio u s (e le ctro lytic) M u ra ta (G R M 3 9 ) M u ra ta (G R M 3 9 ) M u ra ta (G R M 3 9 ) M u ra ta (G R M 3 9 ) M u ra ta (G R M 3 9 ) M u ra ta (G R M 3 9 ) M u ra ta (L Q P 1 1 ) M u ra ta (L Q P 1 1 ) V a riou s V a riou s V a riou s V a riou s S T M icro e le ctro n ics Joh n so n 14 2 -0 7 0 1 -8 81 Joh n so n 14 2 -0 7 0 1 -8 81 V a riou s V a riou s C o m m en t S u pp ly filter In pu t d c b lo ck R F B yp a ss, B lo ck IP 3 Im p ro ve m e n t R F B yp a ss, B lo ck IP 3 Im p ro ve m e n t O u tpu t d c b lo ck R F C h o ke , Inp u t M a tch in g R F C h o ke , S ta b ility Im p ro ve m e n t D c b ia s D c b ia s S ta b ility Im p ro ve m e n t Ju m p er S ta rt5 4 0 R F inp u t co n ne cto r R F o u tp ut co n n ec to r D C con n e cto r L a yer = 3 ;h =0 .0 3 in ch ; E r= 4 .5 4. LNA PERFORMANCE. The high intercept point START540 amplifier is biased at Vce=2V and Ic=5ma. Table 2 shows the measured parameter values at 1900MHz, 25C,Icc=5mA,Vcc=3V Table 2: Measured data Parameter Power Gain Noise Figure Input Return Loss Output Return Loss Isolation Output Power at 1dBcp Third-Order Intercept Point Typical 15 1.25 7.5 20 22 -0.5 24 Unit dB dB dB dB dB dBm dBm Reference Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 13 4/10 AN1465 - APPLICATION NOTE The measured gain and noise figure is shown in figures 5 and 6. Optimum amplifier noise figure is 1.25 dB and occurs at 1900 MHz. This value included the losses of the input SMA connector and microstrip lines of the FR4 board. If the input transmission line and connector losses were subtracted, the noise figure result would improve by 0.2 dB. Measured input/output return loss and isolation are shown in figures 7, 8 and 9. In figure 10 is shown the power gain vs. power output at 1.9 GHz ( the output P1dB is -0.5 dBm). Figure 5: Power Gain vs. Frequency 20 18 Gp (dB) 16 14 12 10 1700 1800 f (MHZ) 1900 2000 Figure 6: Noise Figure vs. Frequency 1.5 1.4 1.3 NF (dB) 1.2 1.1 1 1700 1750 1800 1850 f (MHz) 1900 1950 2000 5/10 AN1465 - APPLICATION NOTE Figure 7: Input Return Loss vs. Frequency 0 -2 -4 -6 RLin (dB) -8 -10 -12 -14 -16 -18 -20 1700 1800 f (Mhz) 1900 2000 Figure 8: Output Return Loss vs. Frequency -20 -25 -30 RLout (dB) -35 -40 -45 -50 1700 1800 f (Mhz) 1900 2000 Figure 9: Isolation vs. Frequency -10 -12 -14 -16 ISOL (dB) -18 -20 -22 -24 -26 -28 -30 1700 1800 f (MHZ) 1900 2000 6/10 AN1465 - APPLICATION NOTE Figure 10: Power Gain vs. Power Output (at 1.9GHz) 16 15 P1dB -0.5 dBm 14 Gp (dB) 13 12 11 10 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 Pout (dBm) The stability analysis of the amplifier is show in figure 11 A linear two port device is unconditionally stable if the real parts of its input and output impedances remain positive for all passive load and source impedances. The circuit is unconditionally stable if >1, or if D < 1 and simultaneously K > 1 at all frequency. = S 11 S 22 - S 12 S 21 < 1 K= 1 - S 11 2 - S 22 2 + 2 2 S 12 S 21 1 - S 11 2 >1 = S 22 - S 11 + S 12 S 21 K, and parameters were calculated for 100 MHz f 6 GHz. Those conditions are always verified in this band frequency. 7/10 AN1465 - APPLICATION NOTE Figure 11: Stability Factor M ,k, The Magnitude Of The S-matrix 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 1000 2000 3000 f (Mhz) - - - 4000 5000 6000 Figure 12 is a partial representation of the LNA output spectrum. f1=1900MHz and f2 =1900,4MHz are equal amplitude input test tones. For this LNA we use -28dBm input power in order to reach -13dBm of output power for each test tones. Other signals besides f1 and f2 are generated as a result of non-linear device behavior. Figure 12: In-band Third Order Intermodulation Product Distorsion -13 f 3 Output Power (dBm) -87 f2- f1 2f1- f2 f1 f2 2f2- f1 frequency 8/10 AN1465 - APPLICATION NOTE The generated low frequency product (f2-f1) modulates the base-emitter and colle ctor-emitter voltages of the transistor. This modulation causes a base and collector voltages fluctuation that lowers the linearity of the amplifier. The base voltage, in fact, determines the quiescent current for the device and the collector voltage determines the saturation point. In order to reduce this effect a proper bypassing has been implemented at both c ollector and base. For that reason with the introduction of low frequency decoupling capacitors C6 (47nF) on the collector and C4 (47nF) on the base improves the IP3 significantly. The Output IP3 is calculated as follows: IM3 IP3out = ------------- + Pout 2 where IM3 (please refer figure 13) is the difference between one of two equal amplitude test tones present at the amplifier output, and the level of the highest 3rd -order distortion product. The IM3 measured is 74dB. So we have: IM 3 74 IP3out = ------------- + Pout = ----- + ( - 13 ) = 24dBm 2 2 Figure 13: Output IP3 Measurement 9/10 AN1465 - APPLICATION NOTE Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Isreal - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 10/10 |
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