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SI9183 vishay siliconix new product document number: 71258 s-02730?rev. c, 12-dec-00 www.vishay.com 1 high-performance, size saving 150-ma cmos ldo regulator low 135-mv dropout at 150-ma load guaranteed 150-ma output current 300-ma peak output current capability uses low esr ceramic output capacitor fast load and line transient response low output noise 1- a maximum shutdown current built-in short circuit and thermal protection fixed 1.5-v, 1.8-v, 2.0-v, 2.5-v, 2.7-v, 2.8-v, 2.85-v, 3.0-v, 3.3-v, 3.6-v, 5.0-v or adjustable output voltage options (version b) sot-23 5-pin package

battery powered portable systems cellular phones pdas, palmtops pagers post regulators for multi-output converters notebook computers

the SI9183 is a high performance yet size saving 150-ma cmos ldo (low dropout) voltage regulator. its ultra low ground current and dropout voltage prolong battery life in portable electronics. the device provides line/load transient response and ripple rejection superior to that of bipolar or bicmos ldo regulators. it is designed to maintain regulation while delivering 300-ma peak current. the SI9183 drives lower cost ceramic, as well as tantalum, output capacitors. stability is guaranteed from maximum load current down to 0-ma load. an external noise bypass capacitor connected to the device?s c bp pin will reduce the ldo?s self-noise for low noise applications. the SI9183 includes a shutdown feature that allows users to completely disable the device and save power when no output is required. the SI9183, in sot23-5 packaging, is available in two versions (version a or b). version a offers low noise performance, while version b features adjustable output voltage.

figure 1. version a with low output noise figure 2. version b with adjustable output 3 2 SI9183-a 1 4 5 v in gnd sd v out bp v in sd v out 1 f 2.2 f sot-23, 5-lead 3 2 SI9183-b 1 4 5 v in gnd sd v out fb v in sd v out 1 f 2.2 f sot-23, 5-lead 0.1 f on off on off
SI9183 vishay siliconix new product www.vishay.com 2 document number: 71258 s-02730 ? rev. c, 12-dec-00

input voltage, v in 6.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . sd input voltage, v sd ? 0.3 v to v in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output current, i out short circuit protected . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage, v out ? 0.3 v to v o(nom) + 0.3 v . . . . . . . . . . . . . . . . . . . . . . . . maximum junction temperature, t j(max) 150 c . . . . . . . . . . . . . . . . . . . . . . . storage temperature, t stg ? 65 c to 125 c . . . . . . . . . . . . . . . . . . . . . . . . . . esd (human body model) 2 kv . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . power dissipation (package) a , b 5-pin sot-23 555 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . thermal impedance ( ja ) 5-pin sot-23 180 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes a. device mounted with all leads soldered or welded to multi-layer (1s2p) jedec board, horizontal orientation. b. derate 5.5 mw/ c above t a = 25 c. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratin gs only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
input voltage, v in 2 v to 6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage, v out (adjustable version) 1.5 v to 5 v . . . . . . . . . . . . . . . . . . sd input voltage, v sd 0 v to v in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating ambient temperature, t a ? 40 c to 85 c . . . . . . . . . . . . . . . . . . . . operating junction temperature, t j ? 40 c to 125 c . . . . . . . . . . . . . . . . . . . c in = 1 f, c out = 2.2 f (ceramic, x5r or x7r type) , c bp = 0.1 f (ceramic) c out range = 1 f to 10 f ( 20% tolerance, 20% over temperature; esr = 0.4 to 4 at dc to 100 khz, 0 t0 0.4 > 100 khz) )

test conditions unless otherwise specified limits ? 40 to 85 c parameter symbol v in = v out(nom) + 1 v, i out = 1 ma c in = 1 f, c out = 2.2 f, v sd = 1.5 v temp a min b typ c max b unit input voltage range v in full 2 6 output voltage range adjustable version full 1.5 5 v output voltage accuracy v out room ? 1.5 1.5 output voltage accuracy (fixed versions) out 1 ma i out 150 ma full ? 2.5 2.5 % v o(nom) room 1.188 1.215 1.240 feedback voltage (adj version) v fb full 1.176 1.252 v line regulation (except 5-v version) from v in = v out(nom) + 1 v to v out(nom) + 2 v full ? 0.18 0.18 line regulation (5-v version) v out 100 v v from v in = 5.5 v to 6 v full ? 0.18 0.18 %/v v in v out(nom) v out = 1.5 v, from v in = 2.5 v to 3.5 v full ? 0.18 0.18 %/v line regulation (adj version) v out = 5 v, from v in = 5.5 v to 6 v full ? 0.18 0.18 i out = 10 ma room 1 20 dropout voltage d @v 2.5 v) v in ? v out room 135 170 @v out 2.5 v) in out i out = 150 ma full 180 220 mv dropout voltage d room 235 320 dropout voltage d (@v out 2.5 v, v in 2 v) v in ? v out i out = 150 ma full 380 i out = 0 ma room 150 ground pin current i gnd room 500 a gnd i out = 150 ma full 900 shutdown supply current i in(off) v sd = 0 v full 0.1 1 a fb pin current i fb v fb = 1.2 v room 2 100 na peak output current i o(peak) v out 0.95 x v out(nom) , t pw = 2 ms room 250 300 ma bw = 50 hz to 100 khz w/o c bp room 300 output noise voltage e n bw = 50 hz to 100 khz i out = 150 ma c bp = 0.1 f room 100 v (rms)
SI9183 vishay siliconix new product document number: 71258 s-02730 ? rev. c, 12-dec-00 www.vishay.com 3

limits ? 40 to 85 c test conditions unless otherwise specified v in = v out(nom) + 1 v, i out = 1 ma c in = 1 f, c out = 2.2 f, v sd = 1.5 v parameter unit max b typ c min b temp a test conditions unless otherwise specified v in = v out(nom) + 1 v, i out = 1 ma c in = 1 f, c out = 2.2 f, v sd = 1.5 v symbol f = 1 khz room 60 ripple rejection v out / v in i out = 150 ma f = 10 khz room 40 db out in out f = 100 khz room 30 dynamic line regulation v o(line) v in : v out(nom) + 1 v to v out(nom) + 2 v t r /t f = 5 s, i out = 150 ma room 10 mv dynamic load regulation v o(load) i out : 1 ma to 150 ma, t r /t f = 2 s room 30 mv v in = 4.3 v w/o c bp cap room 5 v out turn-on-time t on v in = 4.3 v v out = 3.3 v c bp = 0.1 f room 1000 s thermal shutdown thermal shutdown junction temp t j(s/d) room 165 thermal hysteresis t hyst room 20 c short circuit current i sc v out = 0 v room 400 ma shutdown input v ih high = regulator on (rising) full 1.5 v in sd input voltage v il low = regulator off (falling) full 0.4 v i il v sd = 0 v, regulator off room 0.01 sd input current e i ih v sd = 6 v, regulator on room 1.0 a shutdown hysteresis v hyst full 100 mv notes a. room = 25 c, full = ? 40 to 85 c. b. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. typical values are for design aid only, not guaranteed nor subject to production testing. typical values for dropout voltage at v out 2 v are measured at v out = 2.5 v, while typical values for dropout voltage at v out < 2 v are measured at v out = 1.8 v. d. dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-v differential, provided that v in does not not drop below 2.0 v. e. the device ? s shutdown pin includes a typical 6-m internal pull-down resistor connected to ground. f. v out is defined as the output voltage of the dut at 1 ma.
SI9183 vishay siliconix new product www.vishay.com 4 document number: 71258 s-02730 ? rev. c, 12-dec-00

v in 0.95 v nom v out v out v nom figure 3. timing diagram for power-up t on

3 2 sot-23, 5-pin 1 4 5 v in gnd sd v out bp (version a) fb (version b)

pin number name function 1 v in input supply pin. bypass this pin with a 1- f ceramic or tantalum capacitor to ground. 2 gnd ground pin. local ground for c bp and c out . 3 sd by applying less than 0.4 v to this pin, the device will be turned off. connect this pin to v in if unused. 4 (version a) bp noise bypass pin. for low noise applications, a 0.1- f or larger ceramic capacitor should be connected from this pin to ground. 4 (version b) fb connect to divided output voltage to adjust the regulation point. 5 v out output voltage. connect c out between this pin and ground.
SI9183 vishay siliconix new product document number: 71258 s-02730 ? rev. c, 12-dec-00 www.vishay.com 5

part number marking voltage temperature range package SI9183dt-15-t1 a1ll 1.5 v SI9183dt-18-t1 a2ll 1.8 v SI9183dt-20-t1 a3ll 2.0 v SI9183dt-25-t1 a4ll 2.5 v SI9183dt-27-t1 b1ll 2.7v SI9183dt-28-t1 a5ll 2.8 v SI9183dt-285-t1 b3ll 2.85 v ? 40 to 85 c sot23-5 SI9183dt-30-t1 a6ll 3.0 v SI9183dt-33-t1 a7ll 3.3 v SI9183dt-36-t1 b2ll 3.6 v SI9183dt-50-t1 a8ll 5.0 v SI9183dt-ad-t1 a9ll adjustable note: ll = lot code eval kit temperature range board type SI9183db ? 40 to 85 c surface mount

0 50 100 150 200 250 300 0 60 120 180 240 300 dropout voltage vs. load current i load (ma) (mv) v drop 0 25 50 75 100 125 150 175 200 225 250 275 300 325 350 375 ? 50 ? 25 0 25 50 75 100 125 150 dropout v oltage vs. t emperature 0.0 0.5 1.0 1.5 2.0 2.5 0123456 v in ? v out transfer characteristic v in (v) (v) v out junction temperature ( c) 0 100 200 300 400 500 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 dropout voltage vs. v out dropout voltage (mv) v out (mv) v drop i out = 0 ma i out = 150 ma i out = 10 ma i out = 75 ma v out = 2.5 v v out = 2.5 v i out = 10 ma i out = 75 ma i out = 150 ma i out = 300 ma i out = 300 ma r load = 16.6 r load = 250
SI9183 vishay siliconix new product www.vishay.com 6 document number: 71258 s-02730 ? rev. c, 12-dec-00

? 1.2 ? 1.0 ? 0.8 ? 0.6 ? 0.4 ? 0.2 ? 0.0 ? 40 ? 15 10 35 60 85 normalized v out vs. t emperature ambient temperature ( c) (%) v out 0 50 100 150 200 250 300 23456 no load gnd pin current vs. input voltage ( i gnd a) input voltage (v) i out = 0 ma i out = 150 ma i out = 75 ma ? 40 c 85 c 0 100 200 300 400 500 0 25 50 75 100 125 150 gnd current vs. load current ( i gnd a) load current (ma) 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 ? 40 ? 15 10 35 60 85 shutdown threshold vs. temperature (v) v il ambient temperature shutdown pin input current vs. temperature ambient temperature ? 0.75 ? 0.60 ? 0.45 ? 0.30 ? 0.15 0.00 0.15 0.30 0 25 50 75 100 125 150 normalized output voltage vs. load current output voltage (%) load current (ma) v in = v out(nom) + 1 v v out = 2.5 v v in = 3.5 v v in = v out(nom) + 1 v 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 ? 40 ? 15 10 35 60 85 ? 40 c 85 c v out = 2.5 v v sd = 6.5 v v out = 2.5 v v ih v il , v ih i ih
SI9183 vishay siliconix new product document number: 71258 s-02730 ? rev. c, 12-dec-00 www.vishay.com 7

? 80 ? 60 ? 40 ? 20 0 power supply rejection frequency (hz) gain (db) c in = 1 f c out = 2.2 f i load = 150 ma 0.25 0.35 0.45 0.55 0.65 0.75 ? 40 ? 15 10 35 60 85 i sc vs. t emperature ambient temperature v out = 2.5 v 10 100 1 k 10 k 100 k 1 m (a) i sc
v in = 4.2 v v out = 3.3 v c bp = 0.1 f i load = 350 ma turn-on delay 10.00 ms/div 5.00 s/div output noise v in = 4 v v out = 3 v i out = 150 ma c in = 1 f c out = 2.2 f c bp = 0.1 f bw = 10 hz to 1 mhz noise spectrum v in = 4 v v out = 3 i out = 150 ma c in = 1 f c out = 2.2 f c bp = 0.1 f 100 hz v out 2 v/div v in = 4.2 v v out = 3.3 v c bp = 0.1 f i load = 350 ma turn-off delay sd 2 v/div v out 2 v/div 1 ms/div v hz 1 mhz 10.0 0.01 sd 2 v/div 100 v/div
SI9183 vishay siliconix new product www.vishay.com 8 document number: 71258 s-02730 ? rev. c, 12-dec-00
load t ransient response-1 load transient response-2 m 5.00 s m 5.00 s load transient response-3 load transient response-4 m 5.00 s m 5.00 s v out 10 mv/div v out 10 mv/div i load 100 ma/div i load 100 ma/div v out 10 mv/div i load 100 ma/div v out 10 mv/div i load 100 ma/div m 20.0 s m 20.0 s v out 10 mv/div v out 10 mv/div v in 1 v/div v in 1 v/div v out = 3.0 v c out = 2.2 f i load = 1 to 150 ma t rise = 2 sec v out = 3.0 v c out = 2.2 f i load = 150 to 1 ma t fall = 2 sec v out = 3.0 v c out = 1.0 f i load = 1 to 150 ma t rise = 2 sec v out = 3.0 v c out = 1.0 f i load = 150 to 1 ma t fall = 2 sec v out = 3.0 v i load = 150 ma v in = 4 to 5 v c out = 2.2 f t rise = 5 sec v out = 3.0 v i load = 150 ma v in = 5 to 4 v c out = 2.2 f t fall = 5 sec line t ransient response-1 line transient response-2
SI9183 vishay siliconix new product document number: 71258 s-02730 ? rev. c, 12-dec-00 www.vishay.com 9
c in 1.0 f v in 1 sd 3 on off 2 gnd rfb2 rfb1 ? + 1.215 v v ref ? 4bp + 5 c out 2.2 f v out figure 4. 150-ma cmos ldo regulator (fixed output) 6 m c in 1.0 f v in 1 4 sd 3 on off 2 gnd fb ? + 1.215 v v ref ? + 5 c out 2.2 f v out figure 5. 150-ma cmos ldo regulator (adjustable output) 6 m r 2 r 1 v fb switches shown for device in normal operating mode (sd = high)
SI9183 vishay siliconix new product www.vishay.com 10 document number: 71258 s-02730 ? rev. c, 12-dec-00

the SI9183 is a low drop out, low quiescent current, linear regulator family with very fast transient response. it is primarily designed for battery powered applications where battery run time is at a premium. the low quiescent current allows extended standby time while low drop out voltage enables the system to fully utilize battery power before recharge. the SI9183 is a very fast regulator with bandwidth exceeding 50 khz while maintaining low quiescent current at light load conditions. with this bandwidth, the SI9183 is one of the fastest ldo available today. the SI9183 is stable with one of any output capacitor types from 1 f to 10.0 f. however, x5r or x7r ceramic capacitors are recommended for best output noise and transient performance. v in v in is the input supply pin. the bypass capacitor for this pin is not critical as long as the input supply has low enough source impedance. for practical circuits, a 1.0- f or larger ceramic capacitor is recommended. when the source impedance is not low enough and/or the source is several inches from the SI9183, then a larger input bypass capacitor is needed. it is required that the equivalent impedance (source impedance, wire, and trace impedance in parallel with input bypass capacitor impedance) must be smaller than the input impedance of the SI9183 for stable operation. when the source impedance, wire, and trace impedance are unknown, it is recommended that an input bypass capacitor be used of a value that is equal to or greater than the output capacitor. v out v out is the output voltage of the regulator. connect a bypass capacitor from v out to ground. the output capacitor can be any value from 1.0 f to 10.0 f. a ceramic capacitor with x5r or x7r dielectric type is recommended for best output noise, line transient, and load transient performance. gnd ground is the common ground connection for v in and v out . it is also the local ground connection for c bp , adj, and sd . adj for the adjustable output version, use a resistor divider r1 and r2, connect r1 from v out to adj and r2 from adj to ground. r2 should be in the 25-k to 150-k range for low power consumption, while maintaining adequate noise immunity. the formula below calculates the value of r1, given the desired output voltage and the r2 value, (1) r1 v out
v adj r2 v adj v adj is nominally 1.215 v. shutdown (sd ) sd controls the turning on and off of the SI9183. v out is guaranteed to be on when the sd pin voltage equals or is greater than 1.5 v. v out is guaranteed to be off when thesd pin voltage equals or is less than 0.4 v. during shutdown mode, the SI9183 will draw less than 1- a current from the source. to automatically turn on v out whenever the input is applied, tie the sd pin to v in . c bp for low noise application, connect a high frequency ceramic capacitor from c bp to ground. a 0.01- f or a 0.1- f x5r or x7r is recommended.

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