1 ultra low noise, precision voltage reference ISL21090 the ISL21090 is a ultra low noise, high dc accuracy precision voltage reference with wide input voltage range from 4.7v to 36v. the ISL21090 uses the new intersil advanced bipolar technology to achieve sub 2v p-p 0.1hz noise with an initial voltage accuracy of 0.02%. the ISL21090 offers a 2.5v ou tput voltage option with 7ppm/c temperature coefficient and also provides excellent line and load regulation. the device is offered in an 8 ld soic package. the ISL21090 is ideal for high -end instrumentation, data acquisition and processing appl ications requiring high dc precision where low noise performance is critical. features ? reference output voltage option - 2.5v (released) - 1.25v, 3.3v, 4.096v, 5v, 7v and 10v (coming soon) ? initial accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.02% ? output voltage noise . . . . . . . . . . . 1.9v p-p typ (0.1hz to 10hz) (2.5v option) ? supply current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 930a (typ) ? tempco . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7ppm/c max (3ppm/c coming soon) ? output current capability . . . . . . . . . . . . . . . . . . . . . . . . 20ma ? line regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8ppm/v ? load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5ppm/ma ? operating temperature range. . . . . . . . . . .-40c to +125c applications ? high-end instrumentation ? precision voltage sources for data acquisition system, industrial control, comm unication infrastructure ? process control and instrumentations figure 1. ISL21090 typical application diagram figure 2. v out vs temperature 10f 0.1f chip select serial clock serial data i/o vdd vref sclk sdio csb outxs gnd dacoutx vin vref 0.1f outxf dac 1 2 3 4 dnc gnd vout trim 6 8 7 5 dnc dnc comp vin 2 . 4 9 8 0 2 . 4 9 8 5 2 . 4 9 9 0 2 . 5 0 0 0 2 . 5 0 0 5 2 . 5 0 1 0 -55 -35 -15 5 25 45 65 85 105 125 145 temperature (c) typical temperature v out (v) coefficient curve for 10 units 2 . 4 9 9 5 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas inc. 2011. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. june 8, 2011 fn6993.0
ISL21090 2 fn6993.0 june 8, 2011 pin configuration ISL21090 (8 ld soic) top view 1 2 3 4 dnc gnd vout trim 6 8 7 5 dnc dnc comp vin pin descriptions pin number pin name description 1 dnc do not connect 2 vin input voltage connection 3 comp compensation and noise reduction capacitor 4 gnd ground connection 5 trim voltage reference trim input 6 vout voltage reference output 7 dnc do not connect 8 dnc do not connect
ISL21090 3 fn6993.0 june 8, 2011 ordering information part number (notes 1, 2, 3) part marking v out option (v) grade (%) tempco (ppm/c) temp range (c) package tape & reel (pb-free) pkg. dwg. # ISL21090bfb825z-tk 21090 bfz25 2.5 0.02 7 -40 to +125 8 ld soic m8.15e notes: 1. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ spec ial pb-free material sets, molding compounds/die attach materials , and 100% matte tin plate plus anneal (e3 termination finish , which is rohs compliant and compatible wi th both snpb and pb-free soldering opera tions). intersil pb-free products are msl classified at pb-fr ee peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jed ec j std-020. 3. for moisture sensitivity level (msl), please see device information page for ISL21090 . for more information on msl please see tech brief tb363 .
ISL21090 4 fn6993.0 june 8, 2011 absolute maximum rating s thermal information max voltage v in to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to +40v v out to gnd (10s). . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5v to v out + 0.5v voltage on any pin to ground . . . . . . . . . . . . . . . . . . . -0.5v to +v out + 0.5v voltage on dnc pins . . . . . . . . . . . . . . . no connections permitted to these pins input voltage slew rate (max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1v/s esd ratings human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kv machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200v charged device model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kv thermal resistance (typical) ja (c/w) jc (c/w) 8 ld soic package (notes 4, 5) . . . . . . . . . 115 58 continuous power dissipation (t a = +125c) . . . . . . . . . . . . . . . . .217mw maximum junction temperature (t jmax ). . . . . . . . . . . . . . . . . . . . . .+150c storage temperature range. . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c pb-free reflow profile (note 6). . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/ pbfree/pb-freereflow.asp recommended operating conditions temperature range (industrial) . . . . . . . . . . . . . . . . . . . . .-40c to +125c caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ja is measured with the component mounted on a high effective thermal conductivity test board in free air. see tech brief tb379 for details. 5. for jc , the ?case temp? location is taken at the package top center. 6. post-reflow drift for the ISL21090 devices can exceed 100v to 1.0mv based on experimental results with devices on fr4 double sided boards. the engineer must take this into account when considering the reference voltage after assembly. electrical specifications v in = 5v (2.5v option), i out = 0, unless otherwise specified. boldface limits apply over the operating temperature range,-40c to +125c. parameter description conditions min (note 7) typ max (note 7) unit v out output voltage v in = 5v 2.5 v v oa v out accuracy @ t a = +25c all v out options -0.02 +0.02 % tc v out output voltage temperature coefficient ISL21090 b grade 7 ppm/c v in input voltage range (note 9) v out = 2.5v 4.7 36 v i in supply current 0.930 1.28 ma v out / v in line regulation v in = 4.7v to 36v, v out = 2.5v 8 18 ppm/v v out / i out load regulation sourcing: 0ma i out 20ma 2.5 17 ppm/ma sinking: -10ma i out 0ma 2.5 17 ppm/ma v d dropout voltage (note 8) v out = 2.5v @ 10ma 1.1 1.7 v i sc+ short circuit current t a = +25c, v out tied to gnd 55 ma i sc- short circuit current t a = +25c, v out tied to v in -61 ma t r turn-on settling time 90% of final value, c l = 1.0f, c c = open 150 s ripple rejection f = 120hz 90 db e n output voltage noise 0.1hz f 10hz, v out = 2.5v 1.9 v p-p v n broadband voltage noise 10hz f 1khz, v out = 2.5v 1.6 v rms noise density f = 1khz, v out = 2.5v 50 nv/ hz v out / t long term stability t a = +25c 20 ppm notes: 7. compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 8. v in -v out measured at the point where v out drops 1mv from the nominal measured value. 9. coming soon: v in (min) = 3.7v
ISL21090 5 fn6993.0 june 8, 2011 typical performance curves (ISL21090-2.5) figure 3. i in vs v in , three units figure 4. i in vs v in , three temperatures figure 5. line regulation, three units figure 6. line regulation, three temperatures figure 7. line transient with 1nf load ( v in = 500mv) figure 8. line transient with 100nf load ( v in = 500mv) 880 900 920 940 960 980 1000 4 9 14 19 24 29 34 39 i i n ( a ) v in (v) unit 1 unit 2 unit 3 600 700 800 900 1000 1100 1200 1300 4 9 14 19 24 29 34 39 i i n ( a ) v in (v) +25c -40c +125c 2.499690 2.499790 2.499890 2.499990 2.500090 2.500190 2.500290 2.500390 3 6 9 12151821242730333639 v in (v) unit 1 unit 2 unit 3 v out (v) 2.498800 2.499000 2.499200 2.499400 2.499600 2.499800 2.500000 4 9 14 19 24 29 34 39 2.500200 +25c -40c +125c v in (v) v out (v) -30 -20 -10 0 10 20 30 0 102030405060708090100 time (s) cl = 1nf amplitude (mv) -30 -20 -10 0 10 20 30 0 102030405060708090100 time (s) cl = 100nf amplitude (mv)
ISL21090 6 fn6993.0 june 8, 2011 figure 9. load regulation, three temperatures figure 10. load transient ( v in = 1ma) figure 11. turn-on time with 0.1f figure 12. turn-on time with 1f figure 13. z out vs frequency figure 14. ripple rejection at different capacitive loads typical performance curves (ISL21090-2.5) (continued) -40 -30 -20 -10 0 10 20 30 -25 -20 -15 -10 -5 0 5 10 15 20 (sourcing) (sinking) i load (ma) +25c -40c +125c v out (v) -6 -4 -2 0 2 4 6 0 20406080100120 time (s) amplitude (mv) cl = no load cl = 100nf cl = 1f -1 0 1 2 3 4 5 6 0 50 100 150 200 250 300 350 400 time (s) v out (v) cl = 0.1f vin -1 0 1 2 3 4 5 6 0 50 100 150 200 250 300 350 400 time (s) v out (v) cl = 1f vin 0.001 0.01 0.1 1.0 10.0 100.0 1000.0 frequency (hz) z out ( ? ) 10 100 1k 10k 100k 1m 10m cl = 1nf cl = 100nf cl = 10nf cl = no load -140 -120 -100 -80 -60 -40 -20 0 10 100 1k 10k 100k 1m 10m frequency (hz) psrr (db) cl = no load cl = 1nf cl = 100nf cl = 10nf
ISL21090 7 fn6993.0 june 8, 2011 figure 15. v out vs temperature, 10 units figure 16. short-circuit to v in figure 17. short-circuit to gnd figure 18. v out vs noise, 0.1hz to 10hz typical performance curves (ISL21090-2.5) (continued) 2 . 4 9 8 0 2 . 4 9 8 5 2 . 4 9 9 0 2 . 5 0 0 0 2 . 5 0 0 5 2 . 5 0 1 0 -55 -35 -15 5 25 45 65 85 105 125 145 temperature (c) typical temperature v out (v) coefficient curve for 10 units 2 . 4 9 9 5 30 40 50 60 70 80 90 3 8 13 18 23 28 33 38 v in (v) current (ma) +125c +25c -40c -65 -60 -55 -50 -45 -40 -35 -30 3 8 13 18 23 28 33 38 v in (v) current (ma) +125c +25c -40c x = 10s/div y = 1v/div
ISL21090 8 fn6993.0 june 8, 2011 device operation bandgap precision references the ISL21090 uses a bandgap architecture and special trimming circuitry to produce a temperature compensated, precision voltage reference with high input voltag e capability and moderate output current drive. applications information board mounting considerations for applications requiring the hi ghest accuracy, board mounting location should be reviewed. the device uses a plastic soic package, which subjects the di e to mild stresses when the printed circuit (pc) board is heated and cooled, which slightly changes the shape. because of these die stresses, placing the device in areas subject to slight twisting can cause degradation of reference voltage accuracy. it is normally best to place the device near the edge of a board, or on the shortest side, because the axis of bending is most limited in that location. mounting the device in a cutout also minimize s flex. obviously, mounting the device on flexprint or extremely thin pc material will likewise cause loss of reference accuracy. board assembly considerations some pc board assembly prec autions are necessary. normal output voltage shifts of 100v to 500v can be expected with pb-free reflow profiles or wave solder on multi-layer fr4 pc boards. precautions should be ta ken to avoid excessive heat or extended exposure to high reflow or wave solder temperatures. noise performance and reduction the output noise voltage in a 0.1h z to 10hz bandwidth is typically 1.9v p-p ( v out = 2.5v). the noise meas urement is made with a bandpass filter. the filter is made of a 1-pole high-pass filter, with a corner frequency at 0.1hz, and a 2-pole low-pass filter, with a corner frequency (3db) at 9.9hz, to create a filter with a 9.9hz bandwidth. noise in the 10hz to 1khz bandwidth is approximately 1.6v rms (v out = 2.5v), with 0.1f capacitance on the output. this noise measurement is made wi th a 2 decade bandpass filter. the filter is made of a 1-pole high-pass filter with a corner frequency at 10hz of the center frequency, and 1-pole low-pass filter with a corner frequency at 1khz. load capacitance up to 10f can be added but will result in only marginal improvements in output noise and transient response. turn-on time normal turn-on time is typically 150s, as shown in figure 12. the circuit designer must take this into account when looking at power-up delays or sequencing. temperature coefficient the limits stated for temperature coefficient (tempco) are governed by the method of measurement. the overwhelming standard for specifying the temperature drift of a reference is to measure the reference voltage at two temperatures, take the total variation, (v high ? v low ), and divide by the temperature extremes of measurement (t high ?t low ). the result is divided by the nominal reference voltage (at t = +25c) and multiplied by 10 6 to yield ppm/c. this is the ?box? method for specifying temperature coefficient. output voltage adjustment the output voltage can be adjusted above and below the factory-calibrated value via the trim terminal. the trim terminal is the negative feedback divider point of the output op amp. the positive input of the amplifier is about 1.216v, and in feedback, so will be the trim voltage. the trim terminal has a 5000 ? resistor to ground internally, and in the case of the 2.5v output version, there is a feedback resistor of approximately 5000 ? from v out to trim. the suggested method to adjust the output is to connect a very high value external resistor directly to the trim terminal and connect the other end to the wipe r of a potentiometer that has a much lower total resistance and whose outer terminals connect to v out and ground. if a 1m ? resistor is connected to trim, the output adjust range will be 6.3mv. it is important to minimize the capacitance on the trim terminal to preserve output amplifier stability. it is also best to conn ect the series resistor directly to the trim terminal, to minimize that capacitance and also to minimize noise injection. small trim adjustments will not disturb the factory-set temperature coefficient of the reference, but trimming near the extreme values can.
ISL21090 9 intersil products are manufactured, assembled and tested utilizing iso9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn6993.0 june 8, 2011 for additional products, see www.intersil.com/product_tree products intersil corporation is a leader in the design and manufacture of high-performance analog semico nductors. the company's product s address some of the industry's fastest growing markets, such as , flat panel displays, cell phones, handheld products, and noteb ooks. intersil's product families address power management and analog sign al processing functions. go to www.intersil.com/products for a complete list of intersil product families. *for a complete listing of applications, related documentation an d related parts, please see the respective device information page on intersil.com: ISL21090 to report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff fits are available from our website at: http://rel.intersil.co m/reports/search.php revision history the revision history provided is for inform ational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest revision. date revision change june 8, 2011 fn6993.0 initial release
ISL21090 10 fn6993.0 june 8, 2011 package outline drawing m8.15e 8 lead narrow body small outline plastic package rev 0, 08/09 unless otherwise specified, tolerance : decimal 0.05 the pin #1 identifier may be either a mold or mark feature. interlead flash or protrusions shall not exceed 0.25mm per side. dimension does not include interlead flash or protrusions. dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: detail "a" side view ?a typical recommended land pattern top view a b 4 4 0.25 a mc b c 0.10 c 5 id mark pin no.1 (0.35) x 45 seating plane gauge plane 0.25 (5.40) (1.50) 4.90 0.10 3.90 0.10 1.27 0.43 0.076 0.63 0.23 4 4 detail "a" 0.22 0.03 0.175 0.075 1.45 0.1 1.75 max (1.27) (0.60) 6.0 0.20 reference to jedec ms-012. 6. side view ?b?
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