? semiconductor components industries, llc, 2001 november, 2001 rev. 0 1 publication order number: nif62514/d nif62514 product preview hdplus n-channel self-protected field effect transistors w/ temperature and current limit hdplus devices are an advanced series of power mosfets which utilize on's latest mosfet technology process to achieve the lowest possible onresistance per silicon area while incorporating smart features. integrated thermal and current limits work together to provide short circuit protection. the devices feature an integrated draintogate clamp that enables them to withstand high energy in the avalanche mode. the clamp also provides additional safety margin against unexpected voltage transients. electrostatic discharge (esd) protection is provided by an integrated gatetosource clamp. features ? current limitation ? thermal shutdown with automatic restart ? short circuit protection ? low r ds(on) ? i dss specified at elevated temperature ? avalanche energy specified ? slew rate control for low noise switching ? overvoltage clamped protection absolute maximum ratings stresses beyond those listed may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in this specification is not implied. exposure to absolute maximum rated conditions for extended peri- ods may affect device reliability. mosfet maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit draintosource voltage v dss 40 vdc draintogate voltage (r gs = 1.0 m ) v dgr 40 vdc gatetosource voltage v gs 16 vdc drain current continuous @ t a = 25 c drain current continuous @ t a = 100 c drain current pulsed (t p 10 m s) i d i d i dm 2.8 1.8 8* adc adc apk total power dissipation @ t a = 25 c (note 1) total power dissipation @ t a = 25 c (note 2) p d p d 1.1 1.73 w thermal resistance junctiontoambient (note 1) junctiontoambient (note 2) r q ja r q ja 114 72.3 c/w single pulse draintosource avalanche energy (v dd = 25 vdc, v gs = 5.0 vdc, v ds = 40 vdc, i l = 2.8 apk, l = 80 mh, r g = 25 w ) e as 300 mj 1. mounted onto min pad board. 2. mounted onto 1 pad board. * limited by the current limit circuit. this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. 2.8 amperes 40 volts clamped r ds(on) = 125 m device package shipping ordering information nif62514 sot223 4000/tape & reel sot223 case 318e style 3 http://onsemi.com m pwr drain source temperature limit gate input drain gate drain source (top view) marking diagram 62514 lww 62514 = specific device code l = location code ww = work week 1 2 3 4 current limit current sense r g overvoltage protection esd protection
nif62514 http://onsemi.com 2 mosfet electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics draintosource clamped breakdown voltage (v gs = 0 vdc, i d = 250 m adc) (v gs = 0 vdc, i d = 250 m adc, t j = 150 c) v (br)dss 40 40 45 50 50 vdc mv/ c zero gate voltage drain current (v ds = 32 vdc, v gs = 0 vdc) (v ds = 32 vdc, v gs = 0 vdc, t j = 150 c) i dss 4.1 10 100 m adc gate input current (v gs = 5.0 vdc, v ds = 0 vdc) (v gs = 5.0 vdc, v ds = 0 vdc) i gss 50 450 100 1000 adc on characteristics gate threshold voltage (v ds = v gs , i d = 150 adc) threshold temperature coefficient (negative) v gs(th) 1.0 1.55 3.8 2.0 4.6 vdc mv/ c static draintosource onresistance (note 3) (v gs = 10 vdc, i d = 1.4 adc, t j @ 25 c) (v gs = 10 vdc, i d = 1.4 adc, t j @ 150 c) r ds(on) 105 190 125 215 m w static draintosource onresistance (note 3) (v gs = 5.0 vdc, i d = 1.4 adc, t j @ 25 c) (v gs = 5.0 vdc, i d = 1.4 adc, t j @ 150 c) r ds(on) 130 215 150 240 m w self protection characteristics (t j = 25 c unless otherwise noted) current limit (v gs = 5.0 vdc) (v gs = 5.0 vdc, t j = 150 c) i lim 7.5 4.5 adc current limit (v gs = 10 vdc) (v gs = 10 vdc, t j = 150 c) i lim 8.5 5.5 adc temperature limit (turnoff) v gs = 5.0 vdc t lim(off) 150 175 c temperature limit (circuit reset) v gs = 5.0 vdc t lim(on) 135 160 c temperature limit (turnoff) v gs = 10 vdc t lim(off) 150 160 c temperature limit (circuit reset) v gs = 10 vdc t lim(on) 135 145 c esd electrical characteristics (t j = 25 c unless otherwise noted) electrostatic discharge (esd) capability 1800 v charge device model (cdm) capability 2000 v 3. pulse test: pulse width = 300 m s, duty cycle = 2%.
nif62514 http://onsemi.com 3 package dimensions sot223 case 318e04 issue k h s f a b d g l 4 123 0.08 (0003) c m k j dim a min max min max millimeters 0.249 0.263 6.30 6.70 inches b 0.130 0.145 3.30 3.70 c 0.060 0.068 1.50 1.75 d 0.024 0.035 0.60 0.89 f 0.115 0.126 2.90 3.20 g 0.087 0.094 2.20 2.40 h 0.0008 0.0040 0.020 0.100 j 0.009 0.014 0.24 0.35 k 0.060 0.078 1.50 2.00 l 0.033 0.041 0.85 1.05 m 0 10 0 10 s 0.264 0.287 6.70 7.30 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. style 3: pin 1. gate 2. drain 3. source 4. drain
nif62514 http://onsemi.com 4 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. nif62514/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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