ICSLV218 mds lv218 a 1 revision 083105 integrated circuit systems, inc. 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com dual 1-to-8 low voltage clock buffer/translator preliminary information description the ICSLV218 is a high-speed clock buffer consisting of two independent single-input to eight-output low-skew, non-inverting clock drivers. the ICSLV218 has three independent supply rails: the input supply rail, vddin, operates from a fixed 2.5 v supply, while the output su pply rails, vdda and vddb, operate from 2.5 v-3.3 v and 1.8 v-2.5 v supplies respectively. this configur ation, combined with 3.3 v tolerance on the ina and inb inputs, allows for many different possibilities of up and/or down voltage translation. features ? dual 1:8 clock drivers ? pin-compatible with mk74cb218 ? independent supply rails on input and output banks for voltage translation ? 3.3 v input tolerance ? low skew outputs within same bank (150 ps) ? output enable tri-states both banks of eight ? clock speeds up to 200 mhz ? industrial temperature range (-40 to 85c) ? 28-pin ssop (150 mil body) pb (lead) free package block diagram vddin (2.5v) gnd oe (all outputs) qb5 qb7 qb4 qb6 qb1 qb3 qb0 qb2 vdda (2.5v-3.3v) vddb (1.8v-2.5v) inb (3.3v tolerant) qa5 qa7 qa4 qa6 qa1 qa3 qa0 qa2 (3.3v tolerant) inb
dual 1-to-8 low voltage clock buffer/translator mds lv218 a 2 revision 083105 integrated circuit systems, inc. 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com ICSLV218 preliminary information pin assignment suggested layout pin descriptions 18 7 17 8 16 9 15 qa3 10 qa4 11 gnd 12 qb4 13 gnd 14 qa5 gnd gnd qb5 qa6 qb6 vdd qa7 qb7 22 21 20 19 oe qb3 5 6 vdda vdda vddb 24 23 vddb 3 4 qa1 qa2 qb2 26 25 qb1 1 2 ina qa0 qb0 28 27 inb a g b g v g 0.01 f 0.01 f 0.01 f note: 33 ohm series termination resistors for each output are essential for operation. for simplicity, series termination resistors are not shown for the outputs, but should be placed as close to the device as possible. it is most critical to have the 0.01 f decoupling capacitors closest. a v b g = connect to vdda = connect to vdd = connect to vddb = connect to low inductance ground plane pin number pin name pin type pin description 1 ina input clock input for eight a outputs. 3.3 v tolerant. 2, 3, 4 qa0, qa1, qa2 output clock a outputs. 5, 6 vdda power power supply for qa outputs. connect to a voltage from 2.5 v to 3.3 v. 7, 8 qa3, qa4 output clock a outputs. 9, 10 gnd power connect to ground. 11, 12, 13 qa5, qa6, qa7 output clock a outputs. 14 oe input output enable. tri- states all clock outputs when this inpu t is low. internal pull-up to vddin. 15 vdd power power supply for inputs. connect to 2.5 v. 16, 17, 18 qb7, qb6, qb5 output clock b outputs. 19, 20 gnd power connect to ground. 21, 22 qb4, qb3 output clock b outputs. 23, 24 vddb power power supply for qb outputs. connect to a voltage from 1.8 v to 2.5 v. 25, 26, 27 qb2, qb1, qb0 output clock b outputs. 28 inb input clock input for eight b outputs. 3.3 v tolerant.
dual 1-to-8 low voltage clock buffer/translator mds lv218 a 3 revision 083105 integrated circuit systems, inc. 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com ICSLV218 preliminary information absolute maximum ratings stresses above the ratings listed below can cause permanent damage to the ICSLV218. these ratings, which are standard values for ics commercially rated parts, are stress ratings only. functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods can affect product reliability. electrical parameters are guaranteed only over the recommended operating temperature range. item rating supply voltages, vddin, vdda, or vddb (referenced to gnd) 5 v inputs ina and inb (referenced to gnd) -0.5 v to 3.6 v outputs -0.5 v to vdda+0.5 v or vddb+0.5 v ambient operating temperature -40 to +85 c storage temperature -65 c to 150 c soldering temperature 260 c (max. of 20 seconds)
dual 1-to-8 low voltage clock buffer/translator mds lv218 a 4 revision 083105 integrated circuit systems, inc. 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com ICSLV218 preliminary information dc electrical characteristics unless stated otherwise, vddin = vdda = vddb = 2.5 v 10%, ambient temperature = -40 to 85c note: short circuits may be applied indefinitely, but only one output may be shorted at a time to prevent exceeding the power dissipation rating of this package. parameter symbol conditions min. typ. max. units operating voltage vddin 2.375 2.5 2.75 v vdda 2.375 3.63 v vddb 1.62 2.75 v operating supply current iddin all outputs at 100 mhz, no load 25 a idda all outputs at 100 mhz, no load 17 ma iddb all outputs at 100 mhz, no load 17 ma input high voltage v ih ina, inb, oe pins 1.7 v input low voltage v il ina, inb, oe pins 0.7 v output high voltage, qa0-qa7 v oh vdda=3.3 v, i oh = -25 ma 2.0 v vdda=2.5 v, i oh = -16 ma 2.0 v output low voltage, qa0-qa7 v ol i ol = 25 ma 0.4 v vdda=2.5 v, i ol = 16 ma 0.4 v output high voltage, qb0-qb7 v oh vddb = 2.5 v, i oh = -16 ma 2v vddb = 1.8 v, i oh = -8 ma vdd-0.45 v output low voltage, qb0-qb7 v ol vddb = 2.5 v, i ol = 16 ma 0.4 v vddb = 1.8 v, i ol = 8 ma 0.45 v output impedance 15 ? short circuit current each output, vout=gnd or vdd 100 ma input capacitance c in 7pf on-chip pull-up resistor r pu oe 250 k ?
dual 1-to-8 low voltage clock buffer/translator mds lv218 a 5 revision 083105 integrated circuit systems, inc. 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com ICSLV218 preliminary information ac electrical characteristics unless stated otherwise, vddin = vdda = vddb = 2.5 v 10%, ambient temperature = -40 to 85c notes: 1. between any two a outputs, or any two b outputs, with equal loading. 2. between any clock a output and any clock b output with ina connected to inb, and equal loading. 3. care must be taken not to exceed the absolute maxi mum junction temperature or power dissipation rating of the package: power dissipated = (16 outputs x frequency x vdd 2 x c l ) < [(tj - ta) / ja ]. thermal characteristics parameter symbol conditions min. typ. max. units input clock frequency f in ina or inb, note 3 0 200 mhz propagation delay, ina to qa0-qa7 c l = 10 pf 5 ns propagation delay, inb to qb0-qb7 c l = 10 pf 5 ns output clock rise time 20% to 80%, c l =10 pf 2.5 ns output clock fall time 80% to 20%, c l =10 pf 2.5 ns output duty cycle c l =10 pf 45 48 55 % output to output skew measured on rising edge at vdd/2, note 1 100 150 ps output clock a to b skew at vdd/2, note 2 1500 ps output enable time oe high to output on 20 ns output disable time oe low to tri-state 20 ns parameter symbol conditions min. typ. max. units thermal resistance junction to ambient ja still air 100 c/w ja 1 m/s air flow 80 c/w ja 3 m/s air flow 67 c/w thermal resistance junction to case jc 60 c/w
dual 1-to-8 low voltage clock buffer/translator mds lv218 a 6 revision 083105 integrated circuit systems, inc. 525 race street, san jose, ca 95126 tel (408) 297-1201 www.icst.com ICSLV218 preliminary information package outline and package dimensions (28-pin ssop, 150 mil body) package dimensions are kept current with jedec publication no. 95, mo-153 ordering information parts that are ordered with a ?lf? suffix to the part nu mber are the pb-free configur ation and are rohs compliant. while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems (ics) assumes no responsibility for either its use or for the infringeme nt of any patents or other rights of third parties, which wou ld result from its use. no other circuits, patents, or licenses are implied. this product is intended for use in normal commercial applications. any other applications such as those requiring extended temperature range, high reliability, or other extraordina ry environmental requirements are not recommen ded without additional processing by ics. ics reserves the right to change any circuitry or specifications without notice. ics does not authoriz e or warrant any ics product for use in life support devices o r critical medical instruments. part / order number marking shipping packaging package temperature ICSLV218rilf ICSLV218rilf tubes 28-pin ssop -40 to +85 c ICSLV218rilft ICSLV218rilf tape and reel 28-pin ssop -40 to +85 c index area 1 2 28 d e1 e seating plane a 1 a a 2 e - c - b aaa c c l millimeters inches symbol min max min max a 1.351.75.053.069 a1 0.10 0.25 .0040 .010 a2 -- 1.50 -- .059 b 0.200.30.008.012 c 0.180.25.007.010 d 9.80 10.00 .386 .394 e 5.806.20.228.244 e1 3.80 4.00 .150 .157 e 0.635 basic 0.025 basic l 0.401.27.016.050 0 8 0 8 aaa -- 0.10 -- 0.004
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