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  npn silicon power transistor high voltage switchmode  series designed for use in electronic ballast (light ballast) and in switchmode power supplies up to 50 watts. main features include: ? improved efficiency due to: low base drive requirements (high and flat dc current gain h fe ) low power losses (onstate and switching operations) fast switching: t fi = 100 ns (typ) and t si = 3.2 m s (typ) @ i c = 2.0 a, i b1 = i b2 = 0.4 a ? full characterization at 125 c ? tight parametric distributions consistent lottolot maximum ratings rating symbol value unit collectoremitter sustaining voltage v ceo 400 vdc collectoremitter breakdown voltage v ces 700 vdc emitterbase voltage v ebo 9.0 vdc collector current e continuous e peak(1) i c i cm 5.0 10 adc base current i b 2.0 adc total device dissipation (t c = 25 c) derate above 25 c p d 75 0.6 watts w/ c operating and storage temperature t j , t stg 65 to 150 c thermal characteristics rating symbol max unit thermal resistance e junction to case e junction to ambient r q jc r q ja 1.65 62.5 c/w electrical characteristics (t c = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics collectoremitter sustaining voltage (i c = 100 ma, l = 25 mh) v ceo(sus) 400 e e vdc collector cutoff current (v ce = rated v ceo , i b = 0) i ceo e e 100 m adc collector cutoff current (v ce = rated v ces , v eb = 0) (t c = 125 c) i ces e e e e 10 100 m adc emitter cutoff current (v eb = 9.0 vdc, i c = 0) i ebo e e 100 m adc (1) pulse test: pulse width = 5.0 ms, duty cycle 10%. on semiconductor  ? semiconductor components industries, llc, 2002 april, 2002 rev. 6 1 publication order number: bul45/d bul45 power transistor 5.0 amperes 700 volts 35 and 75 watts bul45 case 221a06 to220ab style 1: pin 1. base 2. collector 3. emitter 4. collector 1 2 3 4
bul45 http://onsemi.com 2 electrical characteristics e continued (t c = 25 c unless otherwise noted) characteristic symbol min typ max unit on characteristics baseemitter saturation voltage (i c = 1.0 adc, i b = 0.2 adc) (i c = 2.0 adc, i b = 0.4 adc) v be(sat) e e 0.84 0.89 1.2 1.25 vdc collectoremitter saturation voltage (i c = 1.0 adc, i b = 0.2 adc) (t c = 125 c) v ce(sat) e e 0.175 0.150 0.25 e vdc collectoremitter saturation voltage (i c = 2.0 adc, i b = 0.4 adc) (t c = 125 c) v ce(sat) e e 0.25 0.275 0.4 e vdc dc current gain (i c = 0.3 adc, v ce = 5.0 vdc) (t c = 125 c) dc current gain (i c = 2.0 adc, v ce = 1.0 vdc) (t c = 125 c) dc current gain (i c = 10 madc, v ce = 5.0 vdc) h fe 14 e 7.0 5.0 10 e 32 14 12 22 34 e e e e e dynamic characteristics current gain bandwidth (i c = 0.5 adc, v ce = 10 vdc, f = 1.0 mhz) f t e 12 e mhz output capacitance (v cb = 10 vdc, i e = 0, f = 1.0 mhz) c ob e 50 75 pf input capacitance (v eb = 8.0 vdc) c ib e 920 1200 pf dynamic saturation volt- age: (i c = 1.0 adc i b1 = 100 madc 1.0 m s (t c = 125 c) e e 1.75 4.4 e e determined 1.0 m s and 3.0 m s respectively after i b1 = 100 madc v cc = 300 v) 3.0 m s (t c = 125 c) v ce e e 0.5 1.0 e e vdc 3 . 0 m s res ectively after rising i b1 reaches 90% of final i b1 (see figure 18) (i c = 2.0 adc i b1 = 400 madc 1.0 m s (t c = 125 c) v ce (dyn sat) e e 1.85 6.0 e e vdc ( see fi gure 18) i b1 = 400 madc v cc = 300 v) 3.0 m s (t c = 125 c) e e 0.5 1.0 e e
bul45 http://onsemi.com 3 switching characteristics: resistive load turnon time (i c = 2.0 adc, i b1 = i b2 = 0.4 adc pulse width = 20 m s, (t c = 125 c) duty cycle < 20% t on e e 75 120 110 e ns turnoff time duty cycle < 20% v cc = 300 v) (t c = 125 c) t off e e 2.8 3.5 3.5 e m s switching characteristics: inductive load (v cc = 15 vdc, l c = 200 m h, v clamp = 300 vdc) fall time (i c = 2.0 adc, i b1 = 0.4 adc i b2 = 0.4 adc) (t c = 125 c) t fi 70 e e 200 170 e ns storage time (t c = 125 c) t si 2.6 e e 4.2 3.8 e m s crossover time (t c = 125 c) t c e e 230 400 350 e ns fall time (i c = 1.0 adc, i b1 = 100 madc i b2 = 0.5 adc) (t c = 125 c) t fi e e 110 100 150 e ns storage time (t c = 125 c) t si e e 1.1 1.5 1.7 e m s crossover time (t c = 125 c) t c e e 170 170 250 e ns fall time (i c = 2.0 adc, i b1 = 250 madc i b2 = 2.0 adc) (t c = 125 c) t fi e 80 120 ns storage time (t c = 125 c) t si e 0.6 0.9 m s crossover time (t c = 125 c) t c e 175 300 ns
bul45 http://onsemi.com 4 i c , collector current (amps) 0.01 100 i c , collector current (amps) 10 1 1.00 10.00 100 10 1 0.01 0.10 1.00 10.00 2.0 0.01 i b , base current (amps) 10 1.0 0.01 0.01 i c , collector current (amps) 0.10 1.0 0.8 0.4 0.01 i c , collector current (amps) 0.10 1.00 10.00 1000 100 1 v ce , collector-emitter voltage (volts) 1 1000 1.0 0 0.1 1.00 10.00 10000 10 0.10 0.10 1.00 10.00 10 1.1 0.9 0.6 0.5 0.5 1.5 100 0.7 typical static characteristics c, capacitance (pf) h fe , dc current gain h fe , dc current gain v ce , voltage (volts) v ce , voltage (volts) v be , voltage (volts) figure 1. dc current gain @ 1 volt figure 2. dc current gain at @ 5 volts figure 3. collectoremitter saturation region figure 4. collectoremitter saturation voltage figure 5. baseemitter saturation region figure 6. capacitance v ce = 1 v t j = 125 c t j = 25 c t j = -20 c v ce = 5 v t j = 25 c t j = 125 c t j = -20 c t j = 25 c i c = 0.5 a 1.5 a 1 a 2a 3 a 4 a 5 a 6 a i c /i b = 10 i c /i b = 5 i c /i b = 10 i c /i b = 5 t j = 25 c t j = 125 c c ib c ob t j = 25 c f = 1 mhz t j = 25 c t j = 125 c
bul45 http://onsemi.com 5 i c , collector current (amps) i c , collector current (amps) i c , collector current (amps) 0 i c , collector current (amps) t, time (ns) 1000 0 46 2000 0 3500 3 h fe , forced gain 6 50 0 i c , collector current (amps) 150 0 2000 0 12 15 200 100 2 25 t si , storage time (ns) 200 150 100 400 500 1000 1500 2500 3000 t, time (ns) t, time (ns) 034 1000 1500 2500 9 t, time (ns) t, time (ns) 135 0 500 3000 4 5 7 8 10 11 13 14 250 50 300 1200 1 200 600 800 8 70 46 2 13 5 8 7 3500 2000 1000 1500 2500 500 3000 25 034 1 25 034 1 typical switching characteristics (i b2 = i c /2 for all switching) figure 7. resistive switching, t on figure 8. resistive switching, t off figure 9. inductive storage time, t si figure 10. inductive storage time, t si (h fe ) figure 11. inductive switching, t c & t fi , i c /i b = 5 figure 12. inductive switching, t c & t fi , i c /i b = 10 i c /i b = 10 i c /i b = 5 i c /i b = 5 i c /i b = 10 i b(off) = i c /2 v cc = 300 v pw = 20 m s t j = 25 c t j = 125 c i b(off) = i c /2 v cc = 300 v pw = 20 m s t j = 25 c t j = 125 c i c = 1 a v z = 300 v v cc = 15 v i b(off) = i c /2 l c = 200 m h i c /i b = 5 i c /i b = 10 t j = 25 c t j = 125 c i c = 2 a t j = 25 c t j = 125 c i b(off) = i c /2 l c = 200 m h v z = 300 v v cc = 15 v v cc = 15 v i b(off) = i c /2 l c = 200 m h v z = 300 v t j = 25 c t j = 125 c t c t fi t c t fi t j = 25 c t j = 125 c i b(off) = i c /2 v cc = 15 v v z = 300 v l c = 200 m h
bul45 http://onsemi.com 6 1.0 0.8 0.2 0 20 80 140 160 0.6 0.4 40 60 100 120 i c , collector current (amps) v ce , collector-emitter voltage (volts) h fe , forced gain t c , crossover time (ns) 3 150 h fe , forced gain t fi , fall time (ns) i c , collector current (amps) 90 515 200 50 100 10 v ce , collector-emitter voltage (volts) 6 0 300 400 t c , case temperature ( c) 1.0 0.01 3 600 800 4 100 1000 power derating factor 6 7 8 9 10 11 12 13 14 100 130 35 15 4 6 7 8 9 1011121314 300 100 10 0.1 500 2 1 4 5 110 120 there are two limitations on the power handling ability of a tran- sistor: average junction temperature and second breakdown. safe operating area curves indicate i c v ce limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. the data of figure 15 is based on t c = 25 c; t j(pk) is variable depend- ing on power level. second breakdown pulse limits are valid for duty cycles to 10% but must be derated when t c 25 c. second breakdown limitations do not derate the same as thermal limita- tions. allowable current at the voltages shown in figure 15 may be found at any case temperature by using the appropriate curve on figure 17. t j(pk) may be calculated from the data in figures 20. at any case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. for inductive loads, high voltage and current must be sustained simultaneously during turnoff with the base toemitter junction reversebiased. the safe level is specified as a reversebiased safe operating area (figure 16). this rating is ver- ified under clamped conditions so that the device is never sub- jected to an avalanche mode. 150 250 700 140 guaranteed safe operating area information 70 80 typical switching characteristics (i b2 = i c /2 for all switching) figure 13. inductive fall time, t fi (h fe ) figure 14. crossover time figure 15. forward bias safe operating area figure 16. reverse bias switching safe operating area figure 17. forward bias power derating i c = 1 a i b(off) = i c /2 v cc = 15 v v z = 300 v l c = 200 m h t j = 25 c t j = 125 c i c = 2 a v cc = 15 v v z = 300 v i b(off) = i c /2 l c = 200 m h i c = 1 a i c = 2 a t j = 25 c t j = 125 c 10 m s 1 m s 50 m s 1ms 5ms extended soa dc (bul45) t c 125 c i c /i b 4 l c = 500 m h -5 v second breakdown derating thermal derating -1.5 v v be(off) = 0 v
bul45 http://onsemi.com 7 -5 -4 -3 -2 -1 0 1 2 3 4 5 012345678 time v ce volts i b 1 m s 3 m s 90% i b dyn 1 m s dyn 3 m s 10 9 8 7 6 5 4 3 2 1 0 012 34567 8 time i b i c t si v clamp 10% v clamp 90% i b 1 10% i c t c 90% i c t fi table 1. inductive load switching drive circuit +15 v 1 m f 150 w 3 w 100 w 3 w mpf930 +10 v 50 w common -v off 500 m f mpf930 mtp8p10 mur105 mje210 mtp12n10 mtp8p10 150 w 3 w 100 m f i out a 1 m f i c peak v ce peak v ce i b i b 1 i b 2 v(br)ceo(sus) l = 10 mh rb2 = v cc = 20 volts i c (pk) = 100 ma inductive switching l = 200 m h rb2 = 0 v cc = 15 volts rb1 selected for desired i b 1 rbsoa l = 500 m h rb2 = 0 v cc = 15 volts rb1 selected for desired i b 1 r b2 r b1 figure 18. dynamic saturation voltage measurements figure 19. inductive switching measurements 0.01 0.2 0.02 d = 0.5 single pulse 0.01 0.10 1.00 10.00 100.00 1000.00 0.10 1.00 0.05 0.1 r(t) transient thermal resistance (normalized) r q jc (t) = r(t) r q jc r q jc = 2.5 c/w max d curves apply for power pulse train shown read time at t 1 t j(pk) - t c = p (pk) r q jc (t) duty cycle, d = t 1 /t 2 t 1 t 2 p (pk) typical thermal response t, time (ms) figure 20. typical thermal response (z q jc (t)) for bul45
bul45 http://onsemi.com 8 the bul45 bipolar power transistors were specially designed for use in electronic lamp ballasts. a circuit designed by on semiconductor applications was built to demonstrate how well these devices operate. the circuit and detailed component list are provided below. 5.5 mh l 10 nf c3 1000 v 0.1 m f 400 v c5 tube c4 15 m f 1000 v d6 1 w q2 d4 mur150 i c t1b t1a 47 w d5 q1 i c d3 mur150 1n4007 d1 1n5761 d2 100 v c2 0.1 m f 470 k w 385 v 22 m f c1 d10 d9 d7 d8 ac line 220 v ctn fuse 0.1 m f c6 400 v 1 w 47 w components lists q1 = q2 = bul45 transistor d1 = 1n4007 rectifier d2 = 1n5761 rectifier d3 = d4 = mur150 d5 = d6 = mur105 d7 = d8 = d9 = d10 = 1n400 ctn = 47 w @ 25 c l = rm10 core, a1 = 400, b51 (lcc) 75 turns, wire ? = 0.6 mm t1 = ft10 toroid, t4a (lcc) primary: 4 turns secondaries: t1a: 4 turns secondaries: t1b: 4 turns  all resistors are 1/4 watt, 5% r1 = 470 k w r2 = r3 = 47 w r4 = r5 = 1 w (these resistors are optional, and might be replaced by a short circuit) c1 = 22 m f/385 v c2 = 0.1 m f c3 = 10 nf/1000 v c4 = 15 nf/1000 v c5 = c6 = 0.1 m f/400 v notes: 1. since this design does not include the line input filter, it cannot be used aasiso in a practical industrial circuit. 2. the windings are given for a 55 watt load. for proper operation they must be recalculated with any other loads. figure 21. application example
bul45 http://onsemi.com 9 package dimensions case 221a09 issue aa to220ab notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 --- 1.15 --- z --- 0.080 --- 2.04 b q h z l v g n a k f 123 4 d seating plane t c s t u r j style 1: pin 1. base 2. collector 3. emitter 4. collector
bul45 http://onsemi.com 10 notes
bul45 http://onsemi.com 11 notes
bul45 http://onsemi.com 12 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. bul45/d switchmode is a trademark of semiconductor components industries, llc. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada


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